[Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT

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* [Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT
@ 2022-03-01 17:08 Matthew Auld
  2022-03-01 17:08 ` [Intel-gfx] [CI 2/3] drm/i915/fbdev: fixup setting screen_size Matthew Auld
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Matthew Auld @ 2022-03-01 17:08 UTC (permalink / raw)
  To: intel-gfx; +Cc: Thomas Hellström

The 2M alignment should only be needed for the ppGTT, when dealing with
platforms like DG2. When dealing with the GGTT we can safely limit to
64K.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Robert Beckett <bob.beckett@collabora.com>
---
 drivers/gpu/drm/i915/gt/intel_gtt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 4bcdfcab3642..a5f5b2dda332 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -234,7 +234,8 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass)
 	memset64(vm->min_alignment, I915_GTT_MIN_ALIGNMENT,
 		 ARRAY_SIZE(vm->min_alignment));
 
-	if (HAS_64K_PAGES(vm->i915) && NEEDS_COMPACT_PT(vm->i915)) {
+	if (HAS_64K_PAGES(vm->i915) && NEEDS_COMPACT_PT(vm->i915) &&
+	    subclass == VM_CLASS_PPGTT) {
 		vm->min_alignment[INTEL_MEMORY_LOCAL] = I915_GTT_PAGE_SIZE_2M;
 		vm->min_alignment[INTEL_MEMORY_STOLEN_LOCAL] = I915_GTT_PAGE_SIZE_2M;
 	} else if (HAS_64K_PAGES(vm->i915)) {
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [Intel-gfx] [CI 2/3] drm/i915/fbdev: fixup setting screen_size
  2022-03-01 17:08 [Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Matthew Auld
@ 2022-03-01 17:08 ` Matthew Auld
  2022-03-01 17:08 ` [Intel-gfx] [CI 3/3] drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation Matthew Auld
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Matthew Auld @ 2022-03-01 17:08 UTC (permalink / raw)
  To: intel-gfx

Since we are actually mapping the object and not the vma, when dealing
with LMEM, we should be careful and use the obj->base.size here, since
the vma could have all kinds of funny padding constraints.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbdev.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 2cd62a187df3..3167ae334684 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -290,7 +290,10 @@ static int intelfb_create(struct drm_fb_helper *helper,
 		goto out_unpin;
 	}
 	info->screen_base = vaddr;
-	info->screen_size = vma->node.size;
+	if (i915_gem_object_is_lmem(obj))
+		info->screen_size = vma->obj->base.size;
+	else
+		info->screen_size = vma->node.size;
 
 	drm_fb_helper_fill_info(info, &ifbdev->helper, sizes);
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [Intel-gfx] [CI 3/3] drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation
  2022-03-01 17:08 [Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Matthew Auld
  2022-03-01 17:08 ` [Intel-gfx] [CI 2/3] drm/i915/fbdev: fixup setting screen_size Matthew Auld
@ 2022-03-01 17:08 ` Matthew Auld
  2022-03-01 21:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Patchwork
  2022-03-01 22:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  3 siblings, 0 replies; 5+ messages in thread
From: Matthew Auld @ 2022-03-01 17:08 UTC (permalink / raw)
  To: intel-gfx

From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

Using i915_gem_object_pin_map_unlocked instead of
i915_gem_object_lmem_io_map, would eliminate the need
of using I915_BO_ALLOC_CONTIGUOUS, when calling
i915_vma_pin_iomap, because it supports non-contiguous
allocation as well.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/i915_vma.c | 27 ++++++++++++++++++++-------
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 94fcdb7bd21d..c3bfa1312507 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -562,10 +562,16 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 		 * of pages, that way we can also drop the
 		 * I915_BO_ALLOC_CONTIGUOUS when allocating the object.
 		 */
-		if (i915_gem_object_is_lmem(vma->obj))
-			ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
-							  vma->obj->base.size);
-		else
+		if (i915_gem_object_is_lmem(vma->obj)) {
+			ptr = (void __iomem *)
+			       i915_gem_object_pin_map_unlocked(vma->obj,
+								I915_MAP_WC);
+			if (IS_ERR(ptr)) {
+				err = PTR_ERR(ptr);
+				goto err;
+			}
+			ptr = page_pack_bits(ptr, 1);
+		} else
 			ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
 						vma->node.start,
 						vma->node.size);
@@ -575,7 +581,10 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 		}
 
 		if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) {
-			io_mapping_unmap(ptr);
+			if (page_unmask_bits(ptr))
+				__i915_gem_object_release_map(vma->obj);
+			else
+				io_mapping_unmap(ptr);
 			ptr = vma->iomap;
 		}
 	}
@@ -589,7 +598,7 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 	i915_vma_set_ggtt_write(vma);
 
 	/* NB Access through the GTT requires the device to be awake. */
-	return ptr;
+	return page_mask_bits(ptr);
 
 err_unpin:
 	__i915_vma_unpin(vma);
@@ -1748,7 +1757,11 @@ static void __i915_vma_iounmap(struct i915_vma *vma)
 	if (vma->iomap == NULL)
 		return;
 
-	io_mapping_unmap(vma->iomap);
+	if (page_unmask_bits(vma->iomap))
+		__i915_gem_object_release_map(vma->obj);
+	else
+		io_mapping_unmap(vma->iomap);
+
 	vma->iomap = NULL;
 }
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT
  2022-03-01 17:08 [Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Matthew Auld
  2022-03-01 17:08 ` [Intel-gfx] [CI 2/3] drm/i915/fbdev: fixup setting screen_size Matthew Auld
  2022-03-01 17:08 ` [Intel-gfx] [CI 3/3] drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation Matthew Auld
@ 2022-03-01 21:28 ` Patchwork
  2022-03-01 22:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2022-03-01 21:28 UTC (permalink / raw)
  To: Matthew Auld; +Cc: intel-gfx

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT
URL   : https://patchwork.freedesktop.org/series/100898/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
61b713195d33 drm/i915/gtt: reduce overzealous alignment constraints for GGTT
4144e1582c9f drm/i915/fbdev: fixup setting screen_size
5ba0a226203a drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation
-:36: CHECK:BRACES: Unbalanced braces around else statement
#36: FILE: drivers/gpu/drm/i915/i915_vma.c:574:
+		} else

total: 0 errors, 0 warnings, 1 checks, 51 lines checked



^ permalink raw reply	[flat|nested] 5+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT
  2022-03-01 17:08 [Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Matthew Auld
                   ` (2 preceding siblings ...)
  2022-03-01 21:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Patchwork
@ 2022-03-01 22:00 ` Patchwork
  3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2022-03-01 22:00 UTC (permalink / raw)
  To: Matthew Auld; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 7120 bytes --]

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT
URL   : https://patchwork.freedesktop.org/series/100898/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11306 -> Patchwork_22449
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_22449 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22449, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/index.html

Participating hosts (50 -> 42)
------------------------------

  Missing    (8): fi-kbl-soraka shard-tglu fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 bat-jsl-2 fi-bdw-samus 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_22449:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-cml-u2:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/fi-cml-u2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-cml-u2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_busy@basic@flip:
    - {bat-dg2-9}:        [INCOMPLETE][3] ([i915#5194]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/bat-dg2-9/igt@kms_busy@basic@flip.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/bat-dg2-9/igt@kms_busy@basic@flip.html

  
Known issues
------------

  Here are the changes found in Patchwork_22449 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@bad-flink:
    - fi-skl-6600u:       [PASS][5] -> [FAIL][6] ([i915#4547])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html

  * igt@gem_lmem_swapping@random-engines:
    - fi-ivb-3770:        NOTRUN -> [SKIP][7] ([fdo#109271]) +35 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-ivb-3770/igt@gem_lmem_swapping@random-engines.html

  * igt@i915_selftest@live@hangcheck:
    - bat-dg1-5:          [PASS][8] -> [DMESG-FAIL][9] ([i915#4494] / [i915#4957])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/bat-dg1-5/igt@i915_selftest@live@hangcheck.html

  * igt@kms_chamelium@dp-hpd-fast:
    - fi-ivb-3770:        NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-ivb-3770/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-c:
    - bat-adlp-4:         [PASS][11] -> [DMESG-WARN][12] ([i915#3576])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/bat-adlp-4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/bat-adlp-4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-blb-e6850:       [FAIL][13] ([i915#3194]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/fi-blb-e6850/igt@core_hotunplug@unbind-rebind.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-blb-e6850/igt@core_hotunplug@unbind-rebind.html

  * igt@fbdev@eof:
    - {bat-dg2-9}:        [FAIL][15] ([i915#5186]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/bat-dg2-9/igt@fbdev@eof.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/bat-dg2-9/igt@fbdev@eof.html

  * igt@i915_selftest@live@gt_pm:
    - {fi-jsl-1}:         [DMESG-FAIL][17] ([i915#1886]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/fi-jsl-1/igt@i915_selftest@live@gt_pm.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-jsl-1/igt@i915_selftest@live@gt_pm.html

  
#### Warnings ####

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [INCOMPLETE][19] ([i915#3303]) -> [INCOMPLETE][20] ([i915#4785])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@runner@aborted:
    - fi-skl-6600u:       [FAIL][21] ([i915#1436] / [i915#4312]) -> [FAIL][22] ([i915#4312])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11306/fi-skl-6600u/igt@runner@aborted.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/fi-skl-6600u/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#3194]: https://gitlab.freedesktop.org/drm/intel/issues/3194
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#5186]: https://gitlab.freedesktop.org/drm/intel/issues/5186
  [i915#5194]: https://gitlab.freedesktop.org/drm/intel/issues/5194


Build changes
-------------

  * Linux: CI_DRM_11306 -> Patchwork_22449

  CI-20190529: 20190529
  CI_DRM_11306: 0eb492df610222f39eb2ad5a903626dd3ad9aea2 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6361: 2372a4beb6a33c5f0799a4a8ccbb93794f52dbca @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_22449: 5ba0a226203a591fd784e820075855f68fc3b157 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5ba0a226203a drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation
4144e1582c9f drm/i915/fbdev: fixup setting screen_size
61b713195d33 drm/i915/gtt: reduce overzealous alignment constraints for GGTT

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22449/index.html

[-- Attachment #2: Type: text/html, Size: 8185 bytes --]

^ permalink raw reply	[flat|nested] 5+ messages in thread

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Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2022-03-01 17:08 [Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Matthew Auld
2022-03-01 17:08 ` [Intel-gfx] [CI 2/3] drm/i915/fbdev: fixup setting screen_size Matthew Auld
2022-03-01 17:08 ` [Intel-gfx] [CI 3/3] drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation Matthew Auld
2022-03-01 21:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Patchwork
2022-03-01 22:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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