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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 7/9] drm/i915: Properly write lock bw_state when it changes
Date: Thu,  3 Mar 2022 21:12:05 +0200	[thread overview]
Message-ID: <20220303191207.27931-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220303191207.27931-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The current code also forgets to call intel_atomic_lock_global_state()
when other stuff besides the final min_cdlck changes in the state.
That means we may throw away data which actually has changed, and
thus we can't be at all sure what the code ends up doing during
subsequent commits. Do the write lock properly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 0759bb95ea4b..56eebccd16e2 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -678,6 +678,28 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state)
 	return to_intel_bw_state(bw_state);
 }
 
+static bool intel_bw_state_changed(struct drm_i915_private *i915,
+				   const struct intel_bw_state *old_bw_state,
+				   const struct intel_bw_state *new_bw_state)
+{
+	enum pipe pipe;
+
+	for_each_pipe(i915, pipe) {
+		const struct intel_dbuf_bw *old_crtc_bw =
+			&old_bw_state->dbuf_bw[pipe];
+		const struct intel_dbuf_bw *new_crtc_bw =
+			&new_bw_state->dbuf_bw[pipe];
+		enum dbuf_slice slice;
+
+		for_each_dbuf_slice(i915, slice) {
+			if (old_crtc_bw->used_bw[slice] != new_crtc_bw->used_bw[slice])
+				return true;
+		}
+	}
+
+	return old_bw_state->min_cdclk != new_bw_state->min_cdclk;
+}
+
 static void skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state,
 				  const struct intel_crtc_state *crtc_state)
 {
@@ -765,7 +787,7 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state *state)
 
 	new_bw_state->min_cdclk = DIV_ROUND_UP(max_bw, 64);
 
-	if (new_bw_state->min_cdclk != old_bw_state->min_cdclk) {
+	if (intel_bw_state_changed(dev_priv, old_bw_state, new_bw_state)) {
 		int ret = intel_atomic_lock_global_state(&new_bw_state->base);
 
 		if (ret)
-- 
2.34.1


  parent reply	other threads:[~2022-03-03 19:12 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-03 19:11 [Intel-gfx] [PATCH v2 0/9] drm/i915: Fix bandwith related cdclk calculations Ville Syrjala
2022-03-03 19:11 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Tweak plane ddb allocation tracking Ville Syrjala
2022-03-03 19:12 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split plane data_rate into data_rate+data_rate_y Ville Syrjala
2022-03-03 19:12 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Pre-calculate plane relative data rate Ville Syrjala
2022-03-03 19:12 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Remove total[] and uv_total[] from ddb allocation Ville Syrjala
2022-03-03 19:12 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Nuke intel_bw_calc_min_cdclk() Ville Syrjala
2022-03-03 19:12 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Round up when calculating display bandwidth requirements Ville Syrjala
2022-03-10  7:46   ` Lisovskiy, Stanislav
2022-03-03 19:12 ` Ville Syrjala [this message]
2022-03-10  7:47   ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Properly write lock bw_state when it changes Lisovskiy, Stanislav
2022-03-03 19:12 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Fix DBUF bandwidth vs. cdclk handling Ville Syrjala
2022-03-10  8:22   ` Lisovskiy, Stanislav
2022-03-10  8:59     ` Ville Syrjälä
2022-03-10 12:37       ` Lisovskiy, Stanislav
2022-03-03 19:12 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Add "maximum pipe read bandwidth" checks Ville Syrjala
2022-03-10 14:06   ` Lisovskiy, Stanislav
2022-03-03 20:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bandwith related cdclk calculations (rev2) Patchwork
2022-03-03 20:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-03 20:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-04  9:14 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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