* [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP
@ 2022-03-10 20:05 José Roberto de Souza
2022-03-10 20:05 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: José Roberto de Souza @ 2022-03-10 20:05 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Commit 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel
powered off") completely broke short pulse handling for eDP as it is
usually generated by sink when it is displaying image and there is
some error or status that source needs to handle.
When power panel is enabled, this state is enough to power aux
transactions and VDD override is disabled, so intel_pps_have_power()
is always returning false causing short pulses to be ignored.
So here better naming this function that intends to check if aux
lines are powered to avoid the endless cycle mentioned in the commit
being fixed and fixing the check for what it is intended.
Fixes: 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel powered off")
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 4 ++--
drivers/gpu/drm/i915/display/intel_pps.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 619546441eae5..b029b064000d6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4867,7 +4867,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
struct intel_dp *intel_dp = &dig_port->dp;
if (dig_port->base.type == INTEL_OUTPUT_EDP &&
- (long_hpd || !intel_pps_have_power(intel_dp))) {
+ (long_hpd || !intel_pps_have_vdd_power(intel_dp))) {
/*
* vdd off can generate a long/short pulse on eDP which
* would require vdd on to handle it, and thus we
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 9c986e8932f87..d3e6083ad5b79 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1075,13 +1075,13 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
edp_panel_vdd_schedule_off(intel_dp);
}
-bool intel_pps_have_power(struct intel_dp *intel_dp)
+bool intel_pps_have_vdd_power(struct intel_dp *intel_dp)
{
intel_wakeref_t wakeref;
bool have_power = false;
with_intel_pps_lock(intel_dp, wakeref) {
- have_power = edp_have_panel_power(intel_dp) &&
+ have_power = edp_have_panel_power(intel_dp) ||
edp_have_panel_vdd(intel_dp);
}
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
index fbb47f6f453e4..948523ce32417 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -37,7 +37,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp);
void intel_pps_on(struct intel_dp *intel_dp);
void intel_pps_off(struct intel_dp *intel_dp);
void intel_pps_vdd_off_sync(struct intel_dp *intel_dp);
-bool intel_pps_have_power(struct intel_dp *intel_dp);
+bool intel_pps_have_vdd_power(struct intel_dp *intel_dp);
void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
void intel_pps_init(struct intel_dp *intel_dp);
--
2.35.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable
2022-03-10 20:05 [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP José Roberto de Souza
@ 2022-03-10 20:05 ` José Roberto de Souza
2022-03-10 20:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 10+ messages in thread
From: José Roberto de Souza @ 2022-03-10 20:05 UTC (permalink / raw)
To: intel-gfx; +Cc: Charlton Lin
If a error happens and sink_not_reliable is set, PSR should be disabled
for good but that is not happening.
It would be disabled by the function handling the PSR error but then
on the next fastset it would be enabled again in
_intel_psr_post_plane_update().
It would only be disabled for good in the next modeset where has_psr
will be set false.
v2:
- release psr lock before continue
Fixes: 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if there is active planes")
Reported-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Reported-by: Charlton Lin <charlton.lin@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bbd581ed08159..80002ca6a6ebe 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1853,6 +1853,9 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
mutex_lock(&psr->lock);
+ if (psr->sink_not_reliable)
+ goto exit;
+
drm_WARN_ON(&dev_priv->drm, psr->enabled && !crtc_state->active_planes);
/* Only enable if there is active planes */
@@ -1863,6 +1866,7 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
if (crtc_state->crc_enabled && psr->enabled)
psr_force_hw_tracking_exit(intel_dp);
+exit:
mutex_unlock(&psr->lock);
}
}
--
2.35.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP
2022-03-10 20:05 [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP José Roberto de Souza
2022-03-10 20:05 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
@ 2022-03-10 20:52 ` Patchwork
2022-03-10 21:52 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
2022-03-10 22:53 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
3 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2022-03-10 20:52 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7259 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP
URL : https://patchwork.freedesktop.org/series/101248/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11349 -> Patchwork_22533
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/index.html
Participating hosts (51 -> 41)
------------------------------
Additional (1): bat-jsl-2
Missing (11): fi-cml-u2 fi-ilk-m540 shard-tglu fi-hsw-4200u fi-icl-u2 fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 shard-rkl shard-dg1 fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_22533 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-bsw-n3050: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/fi-bsw-n3050/igt@amdgpu/amd_cs_nop@fork-gfx0.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [PASS][2] -> [DMESG-FAIL][3] ([i915#4957])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
* igt@runner@aborted:
- fi-bdw-5557u: NOTRUN -> [FAIL][4] ([i915#2426] / [i915#4312])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/fi-bdw-5557u/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@active:
- {bat-rpls-2}: [DMESG-WARN][5] ([i915#4391]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/bat-rpls-2/igt@i915_selftest@live@active.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/bat-rpls-2/igt@i915_selftest@live@active.html
* igt@i915_selftest@live@execlists:
- fi-bsw-n3050: [INCOMPLETE][7] ([i915#2940]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@hugepages:
- {bat-rpls-2}: [DMESG-WARN][9] ([i915#5278]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/bat-rpls-2/igt@i915_selftest@live@hugepages.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/bat-rpls-2/igt@i915_selftest@live@hugepages.html
* igt@i915_selftest@live@reset:
- {bat-rpls-2}: [INCOMPLETE][11] ([i915#4983]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/bat-rpls-2/igt@i915_selftest@live@reset.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/bat-rpls-2/igt@i915_selftest@live@reset.html
* igt@kms_busy@basic@flip:
- {bat-dg2-9}: [DMESG-WARN][13] ([i915#5195]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/bat-dg2-9/igt@kms_busy@basic@flip.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/bat-dg2-9/igt@kms_busy@basic@flip.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-6}: [DMESG-WARN][15] ([i915#3576]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/bat-adlp-6/igt@kms_busy@basic@modeset.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/bat-adlp-6/igt@kms_busy@basic@modeset.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u: [DMESG-FAIL][17] ([i915#295]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/fi-cfl-8109u/igt@kms_frontbuffer_tracking@basic.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/fi-cfl-8109u/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@read-crc-pipe-b:
- fi-cfl-8109u: [DMESG-WARN][19] ([i915#295]) -> [PASS][20] +10 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5193]: https://gitlab.freedesktop.org/drm/intel/issues/5193
[i915#5195]: https://gitlab.freedesktop.org/drm/intel/issues/5195
[i915#5270]: https://gitlab.freedesktop.org/drm/intel/issues/5270
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5275]: https://gitlab.freedesktop.org/drm/intel/issues/5275
[i915#5276]: https://gitlab.freedesktop.org/drm/intel/issues/5276
[i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_11349 -> Patchwork_22533
CI-20190529: 20190529
CI_DRM_11349: 47cea122bb4617b37f3974d066b9bea91b5c6581 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6374: f187d4eb6c765e3b2b5a7acf22522fc6a22a9254 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22533: 3ffcbd59e6570d72669936f493a692212ca5d89a @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
3ffcbd59e657 drm/i915/display: Do not re-enable PSR after it was marked as not reliable
845a8903ca60 drm/i915/display: Fix HPD short pulse handling for eDP
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/index.html
[-- Attachment #2: Type: text/html, Size: 6862 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP
2022-03-10 20:05 [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP José Roberto de Souza
2022-03-10 20:05 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
2022-03-10 20:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP Patchwork
@ 2022-03-10 21:52 ` Ville Syrjälä
2022-03-11 13:05 ` Souza, Jose
2022-03-10 22:53 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
3 siblings, 1 reply; 10+ messages in thread
From: Ville Syrjälä @ 2022-03-10 21:52 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: Jani Nikula, intel-gfx
On Thu, Mar 10, 2022 at 12:05:17PM -0800, José Roberto de Souza wrote:
> Commit 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel
> powered off") completely broke short pulse handling for eDP as it is
> usually generated by sink when it is displaying image and there is
> some error or status that source needs to handle.
>
> When power panel is enabled, this state is enough to power aux
> transactions and VDD override is disabled, so intel_pps_have_power()
> is always returning false causing short pulses to be ignored.
I think the times that we use the vdd override should be
limited to:
- aux transfers while the display off
- potentially short periods of time during the modeset sequence
So I guess what you're saying here is that during those times
some panel is triggering an IRQ_HPD which, if ignored, causes
some problem for us?
>
> So here better naming this function that intends to check if aux
> lines are powered to avoid the endless cycle mentioned in the commit
> being fixed and fixing the check for what it is intended.
>
> Fixes: 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel powered off")
> Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_pps.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_pps.h | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 619546441eae5..b029b064000d6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4867,7 +4867,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
> struct intel_dp *intel_dp = &dig_port->dp;
>
> if (dig_port->base.type == INTEL_OUTPUT_EDP &&
> - (long_hpd || !intel_pps_have_power(intel_dp))) {
> + (long_hpd || !intel_pps_have_vdd_power(intel_dp))) {
> /*
> * vdd off can generate a long/short pulse on eDP which
> * would require vdd on to handle it, and thus we
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 9c986e8932f87..d3e6083ad5b79 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -1075,13 +1075,13 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
> edp_panel_vdd_schedule_off(intel_dp);
> }
>
> -bool intel_pps_have_power(struct intel_dp *intel_dp)
> +bool intel_pps_have_vdd_power(struct intel_dp *intel_dp)
> {
> intel_wakeref_t wakeref;
> bool have_power = false;
>
> with_intel_pps_lock(intel_dp, wakeref) {
> - have_power = edp_have_panel_power(intel_dp) &&
> + have_power = edp_have_panel_power(intel_dp) ||
> edp_have_panel_vdd(intel_dp);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> index fbb47f6f453e4..948523ce32417 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.h
> +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> @@ -37,7 +37,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp);
> void intel_pps_on(struct intel_dp *intel_dp);
> void intel_pps_off(struct intel_dp *intel_dp);
> void intel_pps_vdd_off_sync(struct intel_dp *intel_dp);
> -bool intel_pps_have_power(struct intel_dp *intel_dp);
> +bool intel_pps_have_vdd_power(struct intel_dp *intel_dp);
> void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
>
> void intel_pps_init(struct intel_dp *intel_dp);
> --
> 2.35.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP
2022-03-10 21:52 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
@ 2022-03-11 13:05 ` Souza, Jose
2022-03-11 17:02 ` Ville Syrjälä
0 siblings, 1 reply; 10+ messages in thread
From: Souza, Jose @ 2022-03-11 13:05 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com
Cc: Nikula, Jani, intel-gfx@lists.freedesktop.org
On Thu, 2022-03-10 at 23:52 +0200, Ville Syrjälä wrote:
> On Thu, Mar 10, 2022 at 12:05:17PM -0800, José Roberto de Souza wrote:
> > Commit 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel
> > powered off") completely broke short pulse handling for eDP as it is
> > usually generated by sink when it is displaying image and there is
> > some error or status that source needs to handle.
> >
> > When power panel is enabled, this state is enough to power aux
> > transactions and VDD override is disabled, so intel_pps_have_power()
> > is always returning false causing short pulses to be ignored.
>
> I think the times that we use the vdd override should be
> limited to:
> - aux transfers while the display off
> - potentially short periods of time during the modeset sequence
>
> So I guess what you're saying here is that during those times
> some panel is triggering an IRQ_HPD which, if ignored, causes
> some problem for us?
No, not in those times.
When panel is on scanning out frames, PPS is enabled and VDD is disabled.
So any short pulse HPD was being ignored because (edp_have_panel_power() && edp_have_panel_vdd()) is always false.
>
> >
> > So here better naming this function that intends to check if aux
> > lines are powered to avoid the endless cycle mentioned in the commit
> > being fixed and fixing the check for what it is intended.
> >
> > Fixes: 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel powered off")
> > Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Uma Shankar <uma.shankar@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_pps.c | 4 ++--
> > drivers/gpu/drm/i915/display/intel_pps.h | 2 +-
> > 3 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 619546441eae5..b029b064000d6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4867,7 +4867,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
> > struct intel_dp *intel_dp = &dig_port->dp;
> >
> > if (dig_port->base.type == INTEL_OUTPUT_EDP &&
> > - (long_hpd || !intel_pps_have_power(intel_dp))) {
> > + (long_hpd || !intel_pps_have_vdd_power(intel_dp))) {
> > /*
> > * vdd off can generate a long/short pulse on eDP which
> > * would require vdd on to handle it, and thus we
> > diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> > index 9c986e8932f87..d3e6083ad5b79 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pps.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> > @@ -1075,13 +1075,13 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
> > edp_panel_vdd_schedule_off(intel_dp);
> > }
> >
> > -bool intel_pps_have_power(struct intel_dp *intel_dp)
> > +bool intel_pps_have_vdd_power(struct intel_dp *intel_dp)
> > {
> > intel_wakeref_t wakeref;
> > bool have_power = false;
> >
> > with_intel_pps_lock(intel_dp, wakeref) {
> > - have_power = edp_have_panel_power(intel_dp) &&
> > + have_power = edp_have_panel_power(intel_dp) ||
> > edp_have_panel_vdd(intel_dp);
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> > index fbb47f6f453e4..948523ce32417 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pps.h
> > +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> > @@ -37,7 +37,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp);
> > void intel_pps_on(struct intel_dp *intel_dp);
> > void intel_pps_off(struct intel_dp *intel_dp);
> > void intel_pps_vdd_off_sync(struct intel_dp *intel_dp);
> > -bool intel_pps_have_power(struct intel_dp *intel_dp);
> > +bool intel_pps_have_vdd_power(struct intel_dp *intel_dp);
> > void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
> >
> > void intel_pps_init(struct intel_dp *intel_dp);
> > --
> > 2.35.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP
2022-03-11 13:05 ` Souza, Jose
@ 2022-03-11 17:02 ` Ville Syrjälä
0 siblings, 0 replies; 10+ messages in thread
From: Ville Syrjälä @ 2022-03-11 17:02 UTC (permalink / raw)
To: Souza, Jose; +Cc: Nikula, Jani, intel-gfx@lists.freedesktop.org
On Fri, Mar 11, 2022 at 01:05:49PM +0000, Souza, Jose wrote:
> On Thu, 2022-03-10 at 23:52 +0200, Ville Syrjälä wrote:
> > On Thu, Mar 10, 2022 at 12:05:17PM -0800, José Roberto de Souza wrote:
> > > Commit 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel
> > > powered off") completely broke short pulse handling for eDP as it is
> > > usually generated by sink when it is displaying image and there is
> > > some error or status that source needs to handle.
> > >
> > > When power panel is enabled, this state is enough to power aux
> > > transactions and VDD override is disabled, so intel_pps_have_power()
> > > is always returning false causing short pulses to be ignored.
> >
> > I think the times that we use the vdd override should be
> > limited to:
> > - aux transfers while the display off
> > - potentially short periods of time during the modeset sequence
> >
> > So I guess what you're saying here is that during those times
> > some panel is triggering an IRQ_HPD which, if ignored, causes
> > some problem for us?
>
> No, not in those times.
> When panel is on scanning out frames, PPS is enabled and VDD is disabled.
> So any short pulse HPD was being ignored because (edp_have_panel_power() && edp_have_panel_vdd()) is always false.
>
> >
> > >
> > > So here better naming this function that intends to check if aux
> > > lines are powered to avoid the endless cycle mentioned in the commit
> > > being fixed and fixing the check for what it is intended.
> > >
> > > Fixes: 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel powered off")
> > > Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Cc: Uma Shankar <uma.shankar@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> > > drivers/gpu/drm/i915/display/intel_pps.c | 4 ++--
> > > drivers/gpu/drm/i915/display/intel_pps.h | 2 +-
> > > 3 files changed, 4 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index 619546441eae5..b029b064000d6 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -4867,7 +4867,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
> > > struct intel_dp *intel_dp = &dig_port->dp;
> > >
> > > if (dig_port->base.type == INTEL_OUTPUT_EDP &&
> > > - (long_hpd || !intel_pps_have_power(intel_dp))) {
> > > + (long_hpd || !intel_pps_have_vdd_power(intel_dp))) {
> > > /*
> > > * vdd off can generate a long/short pulse on eDP which
> > > * would require vdd on to handle it, and thus we
> > > diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> > > index 9c986e8932f87..d3e6083ad5b79 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_pps.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> > > @@ -1075,13 +1075,13 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
> > > edp_panel_vdd_schedule_off(intel_dp);
> > > }
> > >
> > > -bool intel_pps_have_power(struct intel_dp *intel_dp)
> > > +bool intel_pps_have_vdd_power(struct intel_dp *intel_dp)
> > > {
> > > intel_wakeref_t wakeref;
> > > bool have_power = false;
> > >
> > > with_intel_pps_lock(intel_dp, wakeref) {
> > > - have_power = edp_have_panel_power(intel_dp) &&
Ah, that s/&&/||/ is the bug you're fixing. I didn't even notice,
probably because of the broken indentation in the code here. I just
read it and thought it only checks for panel power and not vdd.
Can you also fix up the indentation a bit so the code doesn't
look so weird?
I think I'd call the function intel_pps_have_panel_power_or_vdd()
(or something along those lines) to make it clear what it does.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > + have_power = edp_have_panel_power(intel_dp) ||
> > > edp_have_panel_vdd(intel_dp);
> > > }
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> > > index fbb47f6f453e4..948523ce32417 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_pps.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> > > @@ -37,7 +37,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp);
> > > void intel_pps_on(struct intel_dp *intel_dp);
> > > void intel_pps_off(struct intel_dp *intel_dp);
> > > void intel_pps_vdd_off_sync(struct intel_dp *intel_dp);
> > > -bool intel_pps_have_power(struct intel_dp *intel_dp);
> > > +bool intel_pps_have_vdd_power(struct intel_dp *intel_dp);
> > > void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
> > >
> > > void intel_pps_init(struct intel_dp *intel_dp);
> > > --
> > > 2.35.1
> >
>
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP
2022-03-10 20:05 [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP José Roberto de Souza
` (2 preceding siblings ...)
2022-03-10 21:52 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
@ 2022-03-10 22:53 ` Patchwork
3 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2022-03-10 22:53 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30305 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP
URL : https://patchwork.freedesktop.org/series/101248/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11349_full -> Patchwork_22533_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_22533_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22533_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22533_full:
### IGT changes ###
#### Warnings ####
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-skl: [SKIP][1] ([fdo#109271] / [i915#658]) -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl4/igt@i915_pm_dc@dc3co-vpb-simulation.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl4/igt@i915_pm_dc@dc3co-vpb-simulation.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- {shard-rkl}: [SKIP][3] ([i915#5286]) -> [SKIP][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-2/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
Known issues
------------
Here are the changes found in Patchwork_22533_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-apl: NOTRUN -> [DMESG-WARN][5] ([i915#4991])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl8/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@legacy-engines-hang@blt:
- shard-skl: NOTRUN -> [SKIP][6] ([fdo#109271]) +58 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@gem_ctx_persistence@legacy-engines-hang@blt.html
* igt@gem_eio@in-flight-contexts-1us:
- shard-snb: [PASS][7] -> [FAIL][8] ([i915#4409])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-snb4/igt@gem_eio@in-flight-contexts-1us.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-snb7/igt@gem_eio@in-flight-contexts-1us.html
* igt@gem_exec_balancer@parallel:
- shard-kbl: NOTRUN -> [DMESG-WARN][9] ([i915#5076]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl7/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_fair@basic-deadline:
- shard-skl: NOTRUN -> [FAIL][10] ([i915#2846])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][11] -> [FAIL][12] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-iclb6/igt@gem_exec_fair@basic-none-share@rcs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-glk1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][15] ([i915#2842])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb1/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: NOTRUN -> [FAIL][16] ([i915#2842])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_huc_copy@huc-copy:
- shard-kbl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#2190])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl3/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-verify-multi:
- shard-kbl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl7/igt@gem_lmem_swapping@heavy-verify-multi.html
* igt@gem_lmem_swapping@verify-random:
- shard-iclb: NOTRUN -> [SKIP][19] ([i915#4613])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@gem_lmem_swapping@verify-random.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-glk: [PASS][20] -> [DMESG-WARN][21] ([i915#118])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-glk4/igt@gem_partial_pwrite_pread@writes-after-reads.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk5/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [PASS][22] -> [FAIL][23] ([i915#644])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk2/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-iclb: NOTRUN -> [SKIP][24] ([i915#4270])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@gem_pxp@regular-baseline-src-copy-readible.html
* igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs:
- shard-iclb: NOTRUN -> [SKIP][25] ([i915#768]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb5/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs.html
* igt@gem_userptr_blits@input-checking:
- shard-kbl: NOTRUN -> [DMESG-WARN][26] ([i915#4991])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl3/igt@gem_userptr_blits@input-checking.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-iclb: NOTRUN -> [SKIP][27] ([i915#2856])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@gen9_exec_parse@bb-start-cmd.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [PASS][28] -> [FAIL][29] ([i915#454])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-iclb8/igt@i915_pm_dc@dc6-dpms.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-apl: NOTRUN -> [SKIP][30] ([fdo#109271]) +70 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl8/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@kms_async_flips@crc:
- shard-skl: NOTRUN -> [FAIL][31] ([i915#4272])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl6/igt@kms_async_flips@crc.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-iclb: NOTRUN -> [SKIP][32] ([i915#5286])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3777]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-apl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3777]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-iclb: NOTRUN -> [SKIP][35] ([fdo#110723])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-iclb: NOTRUN -> [SKIP][36] ([fdo#109278] / [i915#3886]) +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3886]) +4 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl7/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +6 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl7/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium@dp-frame-dump:
- shard-glk: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +5 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk4/igt@kms_chamelium@dp-frame-dump.html
* igt@kms_chamelium@hdmi-aspect-ratio:
- shard-skl: NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@kms_chamelium@hdmi-aspect-ratio.html
* igt@kms_chamelium@vga-hpd-for-each-pipe:
- shard-kbl: NOTRUN -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +8 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl7/igt@kms_chamelium@vga-hpd-for-each-pipe.html
* igt@kms_color@pipe-d-degamma:
- shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109278] / [i915#1149])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_color@pipe-d-degamma.html
* igt@kms_color_chamelium@pipe-a-ctm-green-to-red:
- shard-apl: NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +5 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl6/igt@kms_color_chamelium@pipe-a-ctm-green-to-red.html
* igt@kms_color_chamelium@pipe-a-gamma:
- shard-iclb: NOTRUN -> [SKIP][45] ([fdo#109284] / [fdo#111827]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_color_chamelium@pipe-a-gamma.html
* igt@kms_cursor_crc@pipe-b-cursor-512x512-sliding:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109278] / [fdo#109279]) +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_cursor_crc@pipe-b-cursor-512x512-sliding.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-skl: [PASS][47] -> [INCOMPLETE][48] ([i915#300])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-apl: [PASS][49] -> [DMESG-WARN][50] ([i915#180]) +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_cursor_crc@pipe-d-cursor-256x85-random:
- shard-glk: NOTRUN -> [SKIP][51] ([fdo#109271]) +43 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk4/igt@kms_cursor_crc@pipe-d-cursor-256x85-random.html
* igt@kms_cursor_edge_walk@pipe-d-128x128-top-edge:
- shard-iclb: NOTRUN -> [SKIP][52] ([fdo#109278]) +14 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_cursor_edge_walk@pipe-d-128x128-top-edge.html
* igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
- shard-iclb: NOTRUN -> [SKIP][53] ([fdo#109274] / [fdo#109278])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [PASS][54] -> [FAIL][55] ([i915#2346] / [i915#533])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
- shard-apl: [PASS][56] -> [FAIL][57] ([i915#2346] / [i915#533])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-4tiled:
- shard-iclb: NOTRUN -> [SKIP][58] ([i915#5287])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb5/igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-4tiled.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109274])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: [PASS][60] -> [FAIL][61] ([i915#2122])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: [PASS][62] -> [DMESG-WARN][63] ([i915#180]) +4 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl4/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-glk: [PASS][64] -> [FAIL][65] ([i915#4911])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-iclb: NOTRUN -> [SKIP][66] ([fdo#109280]) +11 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-kbl: NOTRUN -> [SKIP][67] ([fdo#109271]) +77 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_hdr@bpc-switch-dpms@bpc-switch-dpms-edp-1-pipe-a:
- shard-skl: [PASS][68] -> [FAIL][69] ([i915#1188])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl7/igt@kms_hdr@bpc-switch-dpms@bpc-switch-dpms-edp-1-pipe-a.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl10/igt@kms_hdr@bpc-switch-dpms@bpc-switch-dpms-edp-1-pipe-a.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- shard-glk: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#533]) +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
- shard-skl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#533])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl6/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d:
- shard-kbl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl6/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-skl: NOTRUN -> [FAIL][73] ([fdo#108145] / [i915#265])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-kbl: NOTRUN -> [FAIL][75] ([fdo#108145] / [i915#265])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-glk: NOTRUN -> [FAIL][76] ([fdo#108145] / [i915#265])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-skl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl6/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658]) +1 similar issue
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl6/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][79] -> [SKIP][80] ([fdo#109441]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-iclb: NOTRUN -> [SKIP][81] ([i915#3555])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb5/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [PASS][82] -> [DMESG-WARN][83] ([i915#180] / [i915#295])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-skl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2437])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl6/igt@kms_writeback@writeback-invalid-parameters.html
* igt@nouveau_crc@pipe-d-source-outp-complete:
- shard-iclb: NOTRUN -> [SKIP][85] ([fdo#109278] / [i915#2530])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@nouveau_crc@pipe-d-source-outp-complete.html
* igt@perf@polling-parameterized:
- shard-iclb: [PASS][86] -> [FAIL][87] ([i915#1542])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-iclb2/igt@perf@polling-parameterized.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb1/igt@perf@polling-parameterized.html
* igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name:
- shard-iclb: NOTRUN -> [SKIP][88] ([fdo#109291])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb6/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html
* igt@prime_vgem@fence-write-hang:
- shard-iclb: NOTRUN -> [SKIP][89] ([fdo#109295])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb5/igt@prime_vgem@fence-write-hang.html
* igt@sysfs_clients@recycle-many:
- shard-kbl: NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#2994])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl7/igt@sysfs_clients@recycle-many.html
#### Possible fixes ####
* igt@gem_exec_balancer@parallel-balancer:
- shard-iclb: [SKIP][91] ([i915#4525]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-iclb8/igt@gem_exec_balancer@parallel-balancer.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb4/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_capture@pi@vcs0:
- shard-iclb: [INCOMPLETE][93] ([i915#3371]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-iclb1/igt@gem_exec_capture@pi@vcs0.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-iclb5/igt@gem_exec_capture@pi@vcs0.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [FAIL][95] ([i915#2842]) -> [PASS][96] +1 similar issue
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-tglb7/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-kbl: [FAIL][97] ([i915#2842]) -> [PASS][98] +1 similar issue
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-kbl7/igt@gem_exec_fair@basic-none@vecs0.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl6/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][99] ([i915#2190]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-tglb7/igt@gem_huc_copy@huc-copy.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-tglb3/igt@gem_huc_copy@huc-copy.html
* igt@i915_pm_rps@reset:
- {shard-dg1}: [FAIL][101] ([i915#3719]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-dg1-15/igt@i915_pm_rps@reset.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-dg1-18/igt@i915_pm_rps@reset.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [DMESG-WARN][103] ([i915#180]) -> [PASS][104] +2 similar issues
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_async_flips@async-flip-with-page-flip-events:
- {shard-rkl}: [SKIP][105] ([i915#1845]) -> [PASS][106] +6 similar issues
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-1/igt@kms_async_flips@async-flip-with-page-flip-events.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-6/igt@kms_async_flips@async-flip-with-page-flip-events.html
* igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent:
- {shard-rkl}: [SKIP][107] ([fdo#112022] / [i915#4070]) -> [PASS][108] +2 similar issues
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-1/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
* igt@kms_cursor_edge_walk@pipe-a-64x64-left-edge:
- {shard-rkl}: [SKIP][109] ([i915#1849] / [i915#4070]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-1/igt@kms_cursor_edge_walk@pipe-a-64x64-left-edge.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-6/igt@kms_cursor_edge_walk@pipe-a-64x64-left-edge.html
* igt@kms_cursor_legacy@all-pipes-forked-bo:
- {shard-rkl}: [INCOMPLETE][111] -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-5/igt@kms_cursor_legacy@all-pipes-forked-bo.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-1/igt@kms_cursor_legacy@all-pipes-forked-bo.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [FAIL][113] ([i915#2346]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions:
- shard-skl: [FAIL][115] ([i915#3927]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl2/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl2/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions.html
* igt@kms_dp_aux_dev:
- {shard-rkl}: [SKIP][117] ([i915#1257]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-1/igt@kms_dp_aux_dev.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-6/igt@kms_dp_aux_dev.html
* igt@kms_draw_crc@draw-method-xrgb2101010-render-ytiled:
- {shard-rkl}: [SKIP][119] ([fdo#111314] / [i915#4369]) -> [PASS][120] +1 similar issue
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-1/igt@kms_draw_crc@draw-method-xrgb2101010-render-ytiled.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb2101010-render-ytiled.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [INCOMPLETE][121] ([i915#180] / [i915#636]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][123] ([i915#2122]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-glk2/igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-glk6/igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [FAIL][125] ([i915#2122]) -> [PASS][126] +2 similar issues
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_frontbuffer_tracking@basic:
- {shard-tglu}: [FAIL][127] ([i915#2546] / [i915#402]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-tglu-1/igt@kms_frontbuffer_tracking@basic.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-tglu-3/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- {shard-rkl}: [SKIP][129] ([i915#1849]) -> [PASS][130] +7 similar issues
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_hdr@bpc-switch@bpc-switch-edp-1-pipe-a:
- shard-skl: [FAIL][131] ([i915#1188]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-skl3/igt@kms_hdr@bpc-switch@bpc-switch-edp-1-pipe-a.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-skl4/igt@kms_hdr@bpc-switch@bpc-switch-edp-1-pipe-a.html
* igt@kms_invalid_mode@uint-max-clock:
- {shard-rkl}: [SKIP][133] ([i915#4278]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-rkl-1/igt@kms_invalid_mode@uint-max-clock.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/shard-rkl-6/igt@kms_invalid_mode@uint-max-clock.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [DMESG-WARN][135] ([i915#180]) -> [PASS][136] +2 similar issues
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11349/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[136]: https://intel-gfx
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22533/index.html
[-- Attachment #2: Type: text/html, Size: 33475 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH 1/2] Revert "drm/i915/edp: Ignore short pulse when panel powered off"
@ 2022-03-08 15:41 José Roberto de Souza
2022-03-08 15:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
0 siblings, 1 reply; 10+ messages in thread
From: José Roberto de Souza @ 2022-03-08 15:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
This reverts commit 13ea6db2cf24a797ac8c9922e3079fcb897fd32c.
This patch complete broke eDP short pulse handling as VDD is
only enabled when doing aux transactions or when port is disabled.
Checked on several older kernel versions and that is the behavior
that i915 always had on VDD.
So all legit short pulses done by all the eDP panels are being
ignored and no panel interruption errors are being handled.
Still trying to understand why VDD is not always left enabled but
if it can't, those Sharp panels will need another workaround.
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 7 +++----
drivers/gpu/drm/i915/display/intel_pps.c | 13 -------------
drivers/gpu/drm/i915/display/intel_pps.h | 1 -
3 files changed, 3 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 619546441eae5..8ad5788e5375d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4866,13 +4866,12 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
struct intel_dp *intel_dp = &dig_port->dp;
- if (dig_port->base.type == INTEL_OUTPUT_EDP &&
- (long_hpd || !intel_pps_have_power(intel_dp))) {
+ if (long_hpd && dig_port->base.type == INTEL_OUTPUT_EDP) {
/*
- * vdd off can generate a long/short pulse on eDP which
+ * vdd off can generate a long pulse on eDP which
* would require vdd on to handle it, and thus we
* would end up in an endless cycle of
- * "vdd off -> long/short hpd -> vdd on -> detect -> vdd off -> ..."
+ * "vdd off -> long hpd -> vdd on -> detect -> vdd off -> ..."
*/
drm_dbg_kms(&i915->drm,
"ignoring %s hpd on eDP [ENCODER:%d:%s]\n",
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 9c986e8932f87..724947f57664e 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1075,19 +1075,6 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
edp_panel_vdd_schedule_off(intel_dp);
}
-bool intel_pps_have_power(struct intel_dp *intel_dp)
-{
- intel_wakeref_t wakeref;
- bool have_power = false;
-
- with_intel_pps_lock(intel_dp, wakeref) {
- have_power = edp_have_panel_power(intel_dp) &&
- edp_have_panel_vdd(intel_dp);
- }
-
- return have_power;
-}
-
static void pps_init_timestamps(struct intel_dp *intel_dp)
{
intel_dp->pps.panel_power_off_time = ktime_get_boottime();
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
index fbb47f6f453e4..799439aba6565 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -37,7 +37,6 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp);
void intel_pps_on(struct intel_dp *intel_dp);
void intel_pps_off(struct intel_dp *intel_dp);
void intel_pps_vdd_off_sync(struct intel_dp *intel_dp);
-bool intel_pps_have_power(struct intel_dp *intel_dp);
void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
void intel_pps_init(struct intel_dp *intel_dp);
--
2.35.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable
2022-03-08 15:41 [Intel-gfx] [PATCH 1/2] Revert "drm/i915/edp: Ignore short pulse when panel powered off" José Roberto de Souza
@ 2022-03-08 15:41 ` José Roberto de Souza
2022-03-09 13:51 ` Hogander, Jouni
0 siblings, 1 reply; 10+ messages in thread
From: José Roberto de Souza @ 2022-03-08 15:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Charlton Lin
If a error happens and sink_not_reliable is set, PSR should be disabled
for good but that is not happening.
It would be disabled by the function handling the PSR error but then
on the next fastset it would be enabled again in
_intel_psr_post_plane_update().
It would only be disabled for good in the next modeset where has_psr
will be set false.
Fixes: 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if there is active planes")
Reported-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Reported-by: Charlton Lin <charlton.lin@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bbd581ed08159..cd05e5fdc8ca9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1853,6 +1853,9 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
mutex_lock(&psr->lock);
+ if (psr->sink_not_reliable)
+ continue;
+
drm_WARN_ON(&dev_priv->drm, psr->enabled && !crtc_state->active_planes);
/* Only enable if there is active planes */
--
2.35.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable
2022-03-08 15:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
@ 2022-03-09 13:51 ` Hogander, Jouni
2022-03-09 17:58 ` Souza, Jose
0 siblings, 1 reply; 10+ messages in thread
From: Hogander, Jouni @ 2022-03-09 13:51 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, Souza, Jose
Hello Jose,
See my question/comment below.
On Tue, 2022-03-08 at 07:41 -0800, José Roberto de Souza wrote:
> If a error happens and sink_not_reliable is set, PSR should be
> disabled
> for good but that is not happening.
> It would be disabled by the function handling the PSR error but then
> on the next fastset it would be enabled again in
> _intel_psr_post_plane_update().
> It would only be disabled for good in the next modeset where has_psr
> will be set false.
How about invalidate/flush? If you get error between
intel_psr_invalidate and intel_psr_flush psr is activated
even sink_not_reliable is true?
>
> Fixes: 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if
> there is active planes")
> Reported-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
> Reported-by: Charlton Lin <charlton.lin@intel.com>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index bbd581ed08159..cd05e5fdc8ca9 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1853,6 +1853,9 @@ static void _intel_psr_post_plane_update(const
> struct intel_atomic_state *state,
>
> mutex_lock(&psr->lock);
>
> + if (psr->sink_not_reliable)
> + continue;
> +
> drm_WARN_ON(&dev_priv->drm, psr->enabled &&
> !crtc_state->active_planes);
>
> /* Only enable if there is active planes */
BR,
Jouni Högander
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable
2022-03-09 13:51 ` Hogander, Jouni
@ 2022-03-09 17:58 ` Souza, Jose
0 siblings, 0 replies; 10+ messages in thread
From: Souza, Jose @ 2022-03-09 17:58 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, Hogander, Jouni
On Wed, 2022-03-09 at 13:51 +0000, Hogander, Jouni wrote:
> Hello Jose,
>
> See my question/comment below.
>
> On Tue, 2022-03-08 at 07:41 -0800, José Roberto de Souza wrote:
> > If a error happens and sink_not_reliable is set, PSR should be
> > disabled
> > for good but that is not happening.
> > It would be disabled by the function handling the PSR error but then
> > on the next fastset it would be enabled again in
> > _intel_psr_post_plane_update().
> > It would only be disabled for good in the next modeset where has_psr
> > will be set false.
>
> How about invalidate/flush? If you get error between
> intel_psr_invalidate and intel_psr_flush psr is activated
> even sink_not_reliable is true?
enabled != activated.
flush and invalidate functions checks if PSR is enabled, if not it returns and do a thing.
>
> >
> > Fixes: 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if
> > there is active planes")
> > Reported-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
> > Reported-by: Charlton Lin <charlton.lin@intel.com>
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index bbd581ed08159..cd05e5fdc8ca9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1853,6 +1853,9 @@ static void _intel_psr_post_plane_update(const
> > struct intel_atomic_state *state,
> >
> > mutex_lock(&psr->lock);
> >
> > + if (psr->sink_not_reliable)
> > + continue;
> > +
> > drm_WARN_ON(&dev_priv->drm, psr->enabled &&
> > !crtc_state->active_planes);
> >
> > /* Only enable if there is active planes */
>
> BR,
>
> Jouni Högander
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-03-11 17:02 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-03-10 20:05 [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP José Roberto de Souza
2022-03-10 20:05 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
2022-03-10 20:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP Patchwork
2022-03-10 21:52 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
2022-03-11 13:05 ` Souza, Jose
2022-03-11 17:02 ` Ville Syrjälä
2022-03-10 22:53 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
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2022-03-08 15:41 [Intel-gfx] [PATCH 1/2] Revert "drm/i915/edp: Ignore short pulse when panel powered off" José Roberto de Souza
2022-03-08 15:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
2022-03-09 13:51 ` Hogander, Jouni
2022-03-09 17:58 ` Souza, Jose
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