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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 01/15] drm/i915: Pass intel_connector to intel_vrr_is_capable()
Date: Tue, 10 May 2022 13:42:28 +0300	[thread overview]
Message-ID: <20220510104242.6099-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220510104242.6099-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pass intel_connector instead of drm_connector to
intel_vrr_is_capable(). Will result in less ugly casts.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_vrr.c | 14 +++++++-------
 drivers/gpu/drm/i915/display/intel_vrr.h |  4 ++--
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e4a79c11fd25..8637959b5de2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4524,7 +4524,7 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
 	edid = intel_dp_get_edid(intel_dp);
 	connector->detect_edid = edid;
 
-	vrr_capable = intel_vrr_is_capable(&connector->base);
+	vrr_capable = intel_vrr_is_capable(connector);
 	drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] VRR capable: %s\n",
 		    connector->base.base.id, connector->base.name, str_yes_no(vrr_capable));
 	drm_connector_set_vrr_capable_property(&connector->base, vrr_capable);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 396f2f994fa0..081e52dd6c4e 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -9,17 +9,17 @@
 #include "intel_display_types.h"
 #include "intel_vrr.h"
 
-bool intel_vrr_is_capable(struct drm_connector *connector)
+bool intel_vrr_is_capable(struct intel_connector *connector)
 {
+	const struct drm_display_info *info = &connector->base.display_info;
+	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct intel_dp *intel_dp;
-	const struct drm_display_info *info = &connector->display_info;
-	struct drm_i915_private *i915 = to_i915(connector->dev);
 
-	if (connector->connector_type != DRM_MODE_CONNECTOR_eDP &&
-	    connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
+	    connector->base.connector_type != DRM_MODE_CONNECTOR_DisplayPort)
 		return false;
 
-	intel_dp = intel_attached_dp(to_intel_connector(connector));
+	intel_dp = intel_attached_dp(connector);
 	/*
 	 * DP Sink is capable of VRR video timings if
 	 * Ignore MSA bit is set in DPCD.
@@ -97,7 +97,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 	const struct drm_display_info *info = &connector->base.display_info;
 	int vmin, vmax;
 
-	if (!intel_vrr_is_capable(&connector->base))
+	if (!intel_vrr_is_capable(connector))
 		return;
 
 	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 1c2da572693d..9fda1135b0dd 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -8,15 +8,15 @@
 
 #include <linux/types.h>
 
-struct drm_connector;
 struct drm_connector_state;
 struct intel_atomic_state;
+struct intel_connector;
 struct intel_crtc;
 struct intel_crtc_state;
 struct intel_dp;
 struct intel_encoder;
 
-bool intel_vrr_is_capable(struct drm_connector *connector);
+bool intel_vrr_is_capable(struct intel_connector *connector);
 void intel_vrr_check_modeset(struct intel_atomic_state *state);
 void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 			      struct drm_connector_state *conn_state);
-- 
2.35.1


  reply	other threads:[~2022-05-10 10:42 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 10:42 [Intel-gfx] [PATCH 00/15] drm/i915/bios: PNPID->panel_type matching Ville Syrjala
2022-05-10 10:42 ` Ville Syrjala [this message]
2022-05-10 10:42 ` [Intel-gfx] [PATCH 02/15] drm/i915: Extract intel_edp_fixup_vbt_bpp() Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 03/15] drm/i915/pps: Split pps_init_delays() into distinct parts Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 04/15] drm/i915/pps: Introduce pps_delays_valid() Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 05/15] drm/i915/pps: Don't apply quirks/etc. to the VBT PPS delays if they haven't been initialized Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 06/15] drm/i915/pps: Stash away original BIOS programmed PPS delays Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 07/15] drm/i915/pps: Split PPS init+sanitize in two Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 08/15] drm/i915/pps: Reinit PPS delays after VBT has been fully parsed Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 09/15] drm/i915/pps: Keep VDD enabled during eDP probe Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 10/15] drm/i915/bios: Split parse_driver_features() into two parts Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 11/15] drm/i915/bios: Split VBT parsing to global vs. panel specific parts Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 12/15] drm/i915/bios: Split VBT data into per-panel vs. global parts Ville Syrjala
2022-05-25  8:44   ` Jani Nikula
2022-05-25 10:40     ` Ville Syrjälä
2022-05-25 10:55       ` Jani Nikula
2022-05-10 10:42 ` [Intel-gfx] [PATCH 13/15] drm/i915/bios: Determine panel type via PNPID match Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 14/15] drm/edid: Extract drm_edid_decode_mfg_id() Ville Syrjala
2022-05-10 10:42 ` [Intel-gfx] [PATCH 15/15] drm/i915/bios: Dump PNPID and panel name Ville Syrjala
2022-05-11 16:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/bios: PNPID->panel_type matching (rev2) Patchwork
2022-05-11 16:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-11 21:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-25  8:47 ` [Intel-gfx] [PATCH 00/15] drm/i915/bios: PNPID->panel_type matching Jani Nikula

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