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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk
Date: Wed, 22 Jun 2022 18:54:52 +0300	[thread overview]
Message-ID: <20220622155452.32587-10-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220622155452.32587-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The watermark code for ctg/elk has been atomic ready for a long time
so let's just flip the switch now that some of the last CxSR issues
have been sorted out (which granted was a problem for vlv/chv as well
despite them already having atomic enabled by default).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_driver.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 0e224761d0ed..d4e544d6b28f 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -841,8 +841,11 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (IS_ERR(i915))
 		return PTR_ERR(i915);
 
-	/* Disable nuclear pageflip by default on pre-ILK */
-	if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
+	/* Disable nuclear pageflip by default on pre-CTG/ELK */
+	if (!i915->params.nuclear_pageflip &&
+	    match_info->display.ver < 5 &&
+	    match_info->platform != INTEL_G45 &&
+	    match_info->platform != INTEL_GM45)
 		i915->drm.driver_features &= ~DRIVER_ATOMIC;
 
 	ret = pci_enable_device(pdev);
-- 
2.35.1


  parent reply	other threads:[~2022-06-22 15:55 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() " Ville Syrjala
2022-09-21 15:07   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation Ville Syrjala
2022-09-21 15:10   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv " Ville Syrjala
2022-09-21 15:13   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout Ville Syrjala
2022-09-21 15:14   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes Ville Syrjala
2022-10-07  5:57   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms Ville Syrjala
2022-10-07  6:01   ` Lisovskiy, Stanislav
2022-10-07  6:21     ` Ville Syrjälä
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes " Ville Syrjala
2022-10-07  6:03   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` Ville Syrjala [this message]
2022-06-23 18:34   ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk Jani Nikula
2022-06-22 23:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3) Patchwork
2022-06-27 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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