From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes on gmch platforms
Date: Fri, 7 Oct 2022 09:03:24 +0300 [thread overview]
Message-ID: <Yz/BLO2PQklPXfRX@intel.com> (raw)
In-Reply-To: <20220622155452.32587-9-ville.syrjala@linux.intel.com>
On Wed, Jun 22, 2022 at 06:54:51PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We've excluded gmch platforms from writing the final watermarks
> for any disabled pipe. IIRC the reason was perhaps some lingering
> issue with the watermark merging across the pipes. But I can't
> really see any reason for this anymore, so let's unify this behaviour.
> The main benefit being more consistency in register dumps when
> we don't have stale watermarks hanging around in the registers.
> Functionally there should be no difference as the hardware just
> ignore all of it when the pipe is disabled.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 903226e2a626..2c5dadc62c55 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7192,9 +7192,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> intel_fbc_disable(crtc);
> intel_disable_shared_dpll(old_crtc_state);
>
> - /* FIXME unify this for all platforms */
> - if (!new_crtc_state->hw.active &&
> - !HAS_GMCH(dev_priv))
> + if (!new_crtc_state->hw.active)
> intel_initial_watermarks(state, crtc);
> }
>
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-10-07 6:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() " Ville Syrjala
2022-09-21 15:07 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation Ville Syrjala
2022-09-21 15:10 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv " Ville Syrjala
2022-09-21 15:13 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout Ville Syrjala
2022-09-21 15:14 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes Ville Syrjala
2022-10-07 5:57 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms Ville Syrjala
2022-10-07 6:01 ` Lisovskiy, Stanislav
2022-10-07 6:21 ` Ville Syrjälä
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes " Ville Syrjala
2022-10-07 6:03 ` Lisovskiy, Stanislav [this message]
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk Ville Syrjala
2022-06-23 18:34 ` Jani Nikula
2022-06-22 23:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3) Patchwork
2022-06-27 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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