Re: [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv watermark sanitation

["Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>]

On Wed, Jun 22, 2022 at 06:54:47PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We can simplify the vlv watermark sanitation by reusing the
> second half of vlv_compute_pipe_wm() to convert the sanitized
> raw watermarks into the proper form to be used as the
> optimal/intermediate watermarks.
> 
> Also to be consistent with normal watermark computation the sanitized
> watermarks should be all 0 for any disabled plane. Previously we
> zeroed out the watermarks only up to the level (ie. PM2/5/DVDFS)
> that was enabled.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 15 ++++++---------
>  1 file changed, 6 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 556fcdfb75f1..45ec00e2e3c4 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7100,30 +7100,27 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
>  			to_intel_crtc_state(crtc->base.state);
>  		struct intel_plane_state *plane_state =
>  			to_intel_plane_state(plane->base.state);
> -		struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
> -		const struct vlv_fifo_state *fifo_state =
> -			&crtc_state->wm.vlv.fifo_state;
>  		enum plane_id plane_id = plane->id;
> -		int level;
> +		int level, num_levels = intel_wm_num_levels(dev_priv);
>  
>  		if (plane_state->uapi.visible)
>  			continue;
>  
> -		for (level = 0; level < wm_state->num_levels; level++) {
> +		for (level = 0; level < num_levels; level++) {
>  			struct g4x_pipe_wm *raw =
>  				&crtc_state->wm.vlv.raw[level];
>  
>  			raw->plane[plane_id] = 0;
> -
> -			wm_state->wm[level].plane[plane_id] =
> -				vlv_invert_wm_value(raw->plane[plane_id],
> -						    fifo_state->plane[plane_id]);
>  		}
>  	}
>  
>  	for_each_intel_crtc(&dev_priv->drm, crtc) {
>  		struct intel_crtc_state *crtc_state =
>  			to_intel_crtc_state(crtc->base.state);
> +		int ret;
> +
> +		ret = _vlv_compute_pipe_wm(crtc_state);
> +		drm_WARN_ON(&dev_priv->drm, ret);
>  
>  		crtc_state->wm.vlv.intermediate =
>  			crtc_state->wm.vlv.optimal;
> -- 
> 2.35.1
>