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From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 21/21] drm/i915/mtl: Do not update GV point, mask value
Date: Thu, 18 Aug 2022 16:42:02 -0700	[thread overview]
Message-ID: <20220818234202.451742-22-radhakrishna.sripada@intel.com> (raw)
In-Reply-To: <20220818234202.451742-1-radhakrishna.sripada@intel.com>

No need to update mask value/restrict because
"Pcode only wants to use GV bandwidth value, not the mask value."
for Display version greater than 14.

Bspec: 646365
Cc: Matt Roper <matthew.d.roper@intel.com>
Original Author: Caz Yokoyama
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d09e9e5f4481..47869fe964ba 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3924,6 +3924,14 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
 {
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 
+	/*
+	 * No need to update mask value/restrict because
+	 * "Pcode only wants to use GV bandwidth value, not the mask value."
+	 * for DISPLAY_VER() >= 14.
+	 */
+	if (DISPLAY_VER(i915) >= 14)
+		return;
+
 	/*
 	 * Just return if we can't control SAGV or don't have it.
 	 * This is different from situation when we have SAGV but just can't
@@ -3944,6 +3952,16 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state)
 {
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 
+	/*
+	 * No need to update mask value/restrict because
+	 * "Pcode only wants to use GV bandwidth value, not the mask value."
+	 * for DISPLAY_VER() >= 14.
+	 *
+	 * GV bandwidth will be set by intel_pmdemand_post_plane_update()
+	 */
+	if (DISPLAY_VER(i915) >= 14)
+		return;
+
 	/*
 	 * Just return if we can't control SAGV or don't have it.
 	 * This is different from situation when we have SAGV but just can't
-- 
2.25.1


  parent reply	other threads:[~2022-08-18 23:43 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 23:41 [Intel-gfx] [PATCH v2 00/21] Initial Meteorlake Support Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 01/21] drm/i915: Read graphics/media/display arch version from hw Radhakrishna Sripada
2022-08-19 19:04   ` Matt Roper
2022-08-24 10:10     ` Jani Nikula
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 02/21] drm/i915: Parse and set stepping for platforms with GMD Radhakrishna Sripada
2022-08-24  8:11   ` Balasubramani Vivekanandan
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 03/21] drm/i915/mtl: MMIO range is now 4MB Radhakrishna Sripada
2022-08-24 13:25   ` Balasubramani Vivekanandan
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 04/21] drm/i915/mtl: Don't mask off CCS according to DSS fusing Radhakrishna Sripada
2022-08-24 14:54   ` Balasubramani Vivekanandan
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 05/21] drm/i915/mtl: Define engine context layouts Radhakrishna Sripada
2022-08-25 10:33   ` Balasubramani Vivekanandan
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 06/21] drm/i915/mtl: Add PCH support Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 07/21] drm/i915/mtl: Add gmbus and gpio support Radhakrishna Sripada
2022-08-19 19:17   ` Matt Roper
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 08/21] drm/i915/mtl: Add VBT port and AUX_CH mapping Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 09/21] drm/i915/mtl: Add support for MTL in Display Init sequences Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 10/21] drm/i915/mtl: Add display power wells Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 11/21] drm/i915/mtl: Add DP AUX support on TypeC ports Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 12/21] drm/i915/mtl: Fix rawclk for Meteorlake PCH Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 13/21] drm/i915: Extract wm latency adjustment to its own function Radhakrishna Sripada
2022-08-19 19:26   ` Matt Roper
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 14/21] drm/i915/mtl: memory latency data from LATENCY_LPX_LPY for WM Radhakrishna Sripada
2022-08-19 19:31   ` Matt Roper
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 15/21] drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox Radhakrishna Sripada
2022-08-27  0:03   ` Matt Roper
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 16/21] drm/i915/mtl: Update memory bandwidth parameters Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 17/21] drm/i915/mtl: Update MBUS_DBOX credits Radhakrishna Sripada
2022-08-18 23:41 ` [Intel-gfx] [PATCH v2 18/21] drm/i915/mtl: Reuse adl-p DBUF calculations Radhakrishna Sripada
2022-08-18 23:42 ` [Intel-gfx] [PATCH v2 19/21] drm/i915/display/mtl: Extend MBUS programming Radhakrishna Sripada
2022-08-18 23:42 ` [Intel-gfx] [PATCH v2 20/21] drm/i915/mtl: Update CHICKEN_TRANS* register addresses Radhakrishna Sripada
2022-08-18 23:42 ` Radhakrishna Sripada [this message]
2022-08-19 19:46   ` [Intel-gfx] [PATCH v2 21/21] drm/i915/mtl: Do not update GV point, mask value Matt Roper
2022-08-24 21:26 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Initial Meteorlake Support (rev3) Patchwork

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