public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2
Date: Tue, 23 Aug 2022 20:41:38 +0000	[thread overview]
Message-ID: <20220823204155.8178-3-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20220823204155.8178-1-umesh.nerlige.ramappa@intel.com>

Add new OA formats for DG2. Some of the newer OA formats are not
multples of 64 bytes and are not powers of 2. For those formats, adjust
hw_tail accordingly when checking for new reports.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramampa@intel.com>
---
 drivers/gpu/drm/i915/i915_perf.c | 63 ++++++++++++++++++++------------
 include/uapi/drm/i915_drm.h      |  6 +++
 2 files changed, 46 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 735244a3aedd..c8331b549d31 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -306,7 +306,8 @@ static u32 i915_oa_max_sample_rate = 100000;
 
 /* XXX: beware if future OA HW adds new report formats that the current
  * code assumes all reports have a power-of-two size and ~(size - 1) can
- * be used as a mask to align the OA tail pointer.
+ * be used as a mask to align the OA tail pointer. In some of the
+ * formats, R is used to denote reserved field.
  */
 static const struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
 	[I915_OA_FORMAT_A13]	    = { 0, 64 },
@@ -320,6 +321,10 @@ static const struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
 	[I915_OA_FORMAT_A12]		    = { 0, 64 },
 	[I915_OA_FORMAT_A12_B8_C8]	    = { 2, 128 },
 	[I915_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
+	[I915_OAR_FORMAT_A32u40_A4u32_B8_C8]    = { 5, 256 },
+	[I915_OA_FORMAT_A24u40_A14u32_B8_C8]    = { 5, 256 },
+	[I915_OAR_FORMAT_A36u64_B8_C8]		= { 1, 384 },
+	[I915_OA_FORMAT_A38u64_R2u64_B8_C8]	= { 1, 448 },
 };
 
 #define SAMPLE_OA_REPORT      (1<<0)
@@ -467,6 +472,7 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
 	bool pollin;
 	u32 hw_tail;
 	u64 now;
+	u32 partial_report_size;
 
 	/* We have to consider the (unlikely) possibility that read() errors
 	 * could result in an OA buffer reset which might reset the head and
@@ -476,10 +482,16 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
 
 	hw_tail = stream->perf->ops.oa_hw_tail_read(stream);
 
-	/* The tail pointer increases in 64 byte increments,
-	 * not in report_size steps...
+	/* The tail pointer increases in 64 byte increments, whereas report
+	 * sizes need not be integral multiples or 64 or powers of 2.
+	 * Compute potentially partially landed report in the OA buffer
 	 */
-	hw_tail &= ~(report_size - 1);
+	partial_report_size = OA_TAKEN(hw_tail, stream->oa_buffer.tail);
+	partial_report_size %= report_size;
+
+	/* Subtract partial amount off the tail */
+	hw_tail = gtt_offset + ((hw_tail - partial_report_size) &
+				(stream->oa_buffer.vma->size - 1));
 
 	now = ktime_get_mono_fast_ns();
 
@@ -601,6 +613,8 @@ static int append_oa_sample(struct i915_perf_stream *stream,
 {
 	int report_size = stream->oa_buffer.format_size;
 	struct drm_i915_perf_record_header header;
+	int report_size_partial;
+	u8 *oa_buf_end;
 
 	header.type = DRM_I915_PERF_RECORD_SAMPLE;
 	header.pad = 0;
@@ -614,7 +628,19 @@ static int append_oa_sample(struct i915_perf_stream *stream,
 		return -EFAULT;
 	buf += sizeof(header);
 
-	if (copy_to_user(buf, report, report_size))
+	oa_buf_end = stream->oa_buffer.vaddr +
+		     stream->oa_buffer.vma->size;
+	report_size_partial = oa_buf_end - report;
+
+	if (report_size_partial < report_size) {
+		if(copy_to_user(buf, report, report_size_partial))
+			return -EFAULT;
+		buf += report_size_partial;
+
+		if(copy_to_user(buf, stream->oa_buffer.vaddr,
+				report_size - report_size_partial))
+			return -EFAULT;
+	} else if (copy_to_user(buf, report, report_size))
 		return -EFAULT;
 
 	(*offset) += header.size;
@@ -684,8 +710,8 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
 	 * all a power of two).
 	 */
 	if (drm_WARN_ONCE(&uncore->i915->drm,
-			  head > OA_BUFFER_SIZE || head % report_size ||
-			  tail > OA_BUFFER_SIZE || tail % report_size,
+			  head > stream->oa_buffer.vma->size ||
+			  tail > stream->oa_buffer.vma->size,
 			  "Inconsistent OA buffer pointers: head = %u, tail = %u\n",
 			  head, tail))
 		return -EIO;
@@ -699,22 +725,6 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
 		u32 ctx_id;
 		u32 reason;
 
-		/*
-		 * All the report sizes factor neatly into the buffer
-		 * size so we never expect to see a report split
-		 * between the beginning and end of the buffer.
-		 *
-		 * Given the initial alignment check a misalignment
-		 * here would imply a driver bug that would result
-		 * in an overrun.
-		 */
-		if (drm_WARN_ON(&uncore->i915->drm,
-				(OA_BUFFER_SIZE - head) < report_size)) {
-			drm_err(&uncore->i915->drm,
-				"Spurious OA head ptr: non-integral report offset\n");
-			break;
-		}
-
 		/*
 		 * The reason field includes flags identifying what
 		 * triggered this specific report (mostly timer
@@ -4513,6 +4523,13 @@ static void oa_init_supported_formats(struct i915_perf *perf)
 		oa_format_add(perf, I915_OA_FORMAT_C4_B8);
 		break;
 
+	case INTEL_DG2:
+		oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8);
+		oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8);
+		oa_format_add(perf, I915_OAR_FORMAT_A36u64_B8_C8);
+		oa_format_add(perf, I915_OA_FORMAT_A38u64_R2u64_B8_C8);
+		break;
+
 	default:
 		MISSING_CASE(platform);
 	}
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 520ad2691a99..d20d723925b5 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -2650,6 +2650,12 @@ enum drm_i915_oa_format {
 	I915_OA_FORMAT_A12_B8_C8,
 	I915_OA_FORMAT_A32u40_A4u32_B8_C8,
 
+	/* DG2 */
+	I915_OAR_FORMAT_A32u40_A4u32_B8_C8,
+	I915_OA_FORMAT_A24u40_A14u32_B8_C8,
+	I915_OAR_FORMAT_A36u64_B8_C8,
+	I915_OA_FORMAT_A38u64_R2u64_B8_C8,
+
 	I915_OA_FORMAT_MAX	    /* non-ABI */
 };
 
-- 
2.25.1


  parent reply	other threads:[~2022-08-24 20:36 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-23 20:41 [Intel-gfx] [PATCH 00/19] Add DG2 OA support Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode Umesh Nerlige Ramappa
2022-09-06 14:33   ` Lionel Landwerlin
2022-09-06 17:39     ` Umesh Nerlige Ramappa
2022-09-06 18:39       ` Lionel Landwerlin
2022-09-14 22:26         ` Umesh Nerlige Ramappa
2022-09-14 23:13           ` Umesh Nerlige Ramappa
2022-09-15 22:49             ` Umesh Nerlige Ramappa
2022-09-20  3:22               ` Dixit, Ashutosh
2022-09-22  3:51                 ` Dixit, Ashutosh
2022-09-22 11:05             ` Lionel Landwerlin
2022-09-09 23:47   ` Dixit, Ashutosh
2022-09-13  3:08     ` Dixit, Ashutosh
2022-09-14 23:37       ` Umesh Nerlige Ramappa
2022-09-14 23:36     ` Umesh Nerlige Ramappa
2022-09-22  3:44     ` Dixit, Ashutosh
2022-09-22  3:49       ` Dixit, Ashutosh
2022-08-23 20:41 ` Umesh Nerlige Ramappa [this message]
2022-09-06 19:35   ` [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2 Lionel Landwerlin
2022-09-06 19:46     ` Umesh Nerlige Ramappa
2022-09-06 19:59       ` Lionel Landwerlin
2022-09-13 15:40   ` Dixit, Ashutosh
2022-09-14 20:54     ` Umesh Nerlige Ramappa
2022-09-14 21:16       ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 03/19] drm/i915/perf: Fix noa wait predication " Umesh Nerlige Ramappa
2022-09-20  0:35   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 04/19] drm/i915/perf: Determine gen12 oa ctx offset at runtime Umesh Nerlige Ramappa
2022-09-06 19:48   ` Lionel Landwerlin
2022-09-06 20:35     ` Umesh Nerlige Ramappa
2022-09-08 18:32       ` Lionel Landwerlin
2022-09-08 23:04         ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 05/19] drm/i915/perf: Enable commands per clock reporting in OA Umesh Nerlige Ramappa
2022-09-06 19:51   ` Lionel Landwerlin
2022-09-14  0:19   ` Dixit, Ashutosh
2022-09-15  0:04     ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 06/19] drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size Umesh Nerlige Ramappa
2022-09-14 16:04   ` Dixit, Ashutosh
2022-09-14 18:19     ` Umesh Nerlige Ramappa
2022-09-14 19:07       ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 07/19] drm/i915/perf: Simply use stream->ctx Umesh Nerlige Ramappa
2022-09-06 19:52   ` Lionel Landwerlin
2022-08-23 20:41 ` [Intel-gfx] [PATCH 08/19] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf Umesh Nerlige Ramappa
2022-09-06 19:54   ` Lionel Landwerlin
2022-09-14 18:20   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 09/19] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops Umesh Nerlige Ramappa
2022-09-14 19:04   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 10/19] drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers Umesh Nerlige Ramappa
2022-09-06 19:56   ` Lionel Landwerlin
2022-09-06 20:28     ` Umesh Nerlige Ramappa
2022-09-06 20:31       ` Lionel Landwerlin
2022-08-23 20:41 ` [Intel-gfx] [PATCH 11/19] drm/i915/perf: Store a pointer to oa_format in oa_buffer Umesh Nerlige Ramappa
2022-09-06 19:56   ` Lionel Landwerlin
2022-09-14 20:43   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 12/19] drm/i915/perf: Parse 64bit report header formats correctly Umesh Nerlige Ramappa
2022-09-16  0:47   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 13/19] drm/i915/perf: Add Wa_16010703925:dg2 Umesh Nerlige Ramappa
2022-09-16  1:08   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2 Umesh Nerlige Ramappa
2022-08-29 14:04   ` Jani Nikula
2022-09-16  1:21   ` Dixit, Ashutosh
2022-09-16 18:19     ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 15/19] drm/i915/perf: Add Wa_1508761755:dg2 Umesh Nerlige Ramappa
2022-09-16  1:34   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 16/19] drm/i915/perf: Apply Wa_18013179988 Umesh Nerlige Ramappa
2022-09-16  5:16   ` Dixit, Ashutosh
2022-09-16 15:22     ` Dixit, Ashutosh
2022-09-16 19:04       ` Umesh Nerlige Ramappa
2022-09-16 18:56     ` Umesh Nerlige Ramappa
2022-09-16 19:57       ` Dixit, Ashutosh
2022-09-16 20:25         ` Umesh Nerlige Ramappa
2022-09-16 21:00           ` Dixit, Ashutosh
2022-09-19 21:21             ` Umesh Nerlige Ramappa
2022-09-20  1:24               ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 17/19] drm/i915/perf: Save/restore EU flex counters across reset Umesh Nerlige Ramappa
2022-09-16  5:40   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 18/19] drm/i915/guc: Support OA when Wa_16011777198 is enabled Umesh Nerlige Ramappa
2022-09-16 21:41   ` Dixit, Ashutosh
2022-09-16 21:48     ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 19/19] drm/i915/perf: Enable OA for DG2 Umesh Nerlige Ramappa
2022-08-23 21:11 ` [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats " Umesh Nerlige Ramappa
2022-08-23 21:12 ` [Intel-gfx] [PATCH 19/19] drm/i915/perf: Enable OA " Umesh Nerlige Ramappa
2022-08-23 22:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DG2 OA support (rev2) Patchwork
2022-08-23 22:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-08-23  0:03 [Intel-gfx] [PATCH 00/19] Add DG2 OA support Umesh Nerlige Ramappa
2022-08-23  0:03 ` [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2 Umesh Nerlige Ramappa

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220823204155.8178-3-umesh.nerlige.ramappa@intel.com \
    --to=umesh.nerlige.ramappa@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox