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* [Intel-gfx] [PATCH] drm/i915/dsc: Add is_dsc_supported()
@ 2022-11-03  6:02 Swati Sharma
  2022-11-03  8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Swati Sharma @ 2022-11-03  6:02 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula

Lets use RUNTIME_INFO->has_dsc since platforms supporting dsc has this
flag enabled.

This is done based on the review comments received on
https://patchwork.freedesktop.org/patch/509393/

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c   | 6 +++---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 7 ++++++-
 drivers/gpu/drm/i915/display/intel_vdsc.h | 2 ++
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7400d6b4c587..eb908da80f2b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1012,7 +1012,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	 * Output bpp is stored in 6.4 format so right shift by 4 to get the
 	 * integer value since we support only integer values of bpp.
 	 */
-	if (DISPLAY_VER(dev_priv) >= 10 &&
+	if (is_dsc_supported(dev_priv) &&
 	    drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) {
 		/*
 		 * TBD pass the connector BPC,
@@ -2906,7 +2906,7 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
 	intel_dp_set_max_sink_lane_count(intel_dp);
 
 	/* Read the eDP DSC DPCD registers */
-	if (DISPLAY_VER(dev_priv) >= 10)
+	if (is_dsc_supported(dev_priv))
 		intel_dp_get_dsc_sink_cap(intel_dp);
 
 	/*
@@ -4691,7 +4691,7 @@ intel_dp_detect(struct drm_connector *connector,
 	}
 
 	/* Read DP Sink DSC Cap DPCD regs for DP v1.4 */
-	if (DISPLAY_VER(dev_priv) >= 11)
+	if (is_dsc_supported(dev_priv))
 		intel_dp_get_dsc_sink_cap(intel_dp);
 
 	intel_dp_configure_mst(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 269f9792390d..e7c1169538da 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -338,13 +338,18 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
 	return &rc_parameters[row_index][column_index];
 }
 
+bool is_dsc_supported(struct drm_i915_private *dev_priv)
+{
+	return RUNTIME_INFO(dev_priv)->has_dsc;
+}
+
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
 {
 	const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
-	if (!RUNTIME_INFO(i915)->has_dsc)
+	if (!is_dsc_supported(i915))
 		return false;
 
 	if (DISPLAY_VER(i915) >= 12)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 8763f00fa7e2..049e8b95fdde 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -12,7 +12,9 @@ enum transcoder;
 struct intel_crtc;
 struct intel_crtc_state;
 struct intel_encoder;
+struct drm_i915_private;
 
+bool is_dsc_supported(struct drm_i915_private *dev_priv);
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
 void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-11-10  9:32 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-11-03  6:02 [Intel-gfx] [PATCH] drm/i915/dsc: Add is_dsc_supported() Swati Sharma
2022-11-03  8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-11-03 19:20 ` [Intel-gfx] [PATCH] " Navare, Manasi
2022-11-04 10:28   ` Jani Nikula
2022-11-10  9:32     ` Swati Sharma
2022-11-03 19:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork

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