Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 8/9] drm/i915: Don't enable the AUX_IO power for combo-PHY external DP port main links
Date: Tue,  8 Nov 2022 17:18:27 +0200	[thread overview]
Message-ID: <20221108151828.3761358-5-imre.deak@intel.com> (raw)
In-Reply-To: <20221107170917.3566758-9-imre.deak@intel.com>

Combo PHY ports require the AUX_IO power only for eDP/PSR, so don't
enable it otherwise on these ports. So far the external DP and eDP case
was handled the same way due to unclarity when AUX_IO for the main link
is needed. However Bspec is clear in which cases it's required:

- eDP/PSR on all ports and platforms (presumably due to HW/FW initiated
  PSR transactions that won't enable AUX_IO)
  Bspec: 4301, 49296
- TypeC PHY ports on platforms before MTL in all TypeC modes (TBT,
  DP-alt, legacy) and for both HDMI and DP. The next patch will take
  into account the pre-MTL platform dependency.
  Bspec: 22243, 53339, 21750, 49190, 49191, 55424, 65448, 65750, 49294,
         55480, 65380

v2:
- Rebased on checking intel_encoder_can_psr() instead of crtc->has_psr.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 22 +++++++++-------------
 1 file changed, 9 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 21f1a68a57598..cc4bc529a78a5 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -846,8 +846,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 }
 
 static enum intel_display_power_domain
-intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
-			       const struct intel_crtc_state *crtc_state)
+intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
@@ -867,20 +866,18 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
 	 */
 	if (intel_encoder_can_psr(&dig_port->base))
 		return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
-	else if (intel_crtc_has_dp_encoder(crtc_state) ||
-		 intel_phy_is_tc(i915, phy))
+	else if (intel_phy_is_tc(i915, phy))
 		return intel_aux_power_domain(dig_port);
 	else
 		return POWER_DOMAIN_INVALID;
 }
 
 static void
-main_link_aux_power_domain_get(struct intel_digital_port *dig_port,
-			       const struct intel_crtc_state *crtc_state)
+main_link_aux_power_domain_get(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum intel_display_power_domain domain =
-		intel_ddi_main_link_aux_domain(dig_port, crtc_state);
+		intel_ddi_main_link_aux_domain(dig_port);
 
 	drm_WARN_ON(&i915->drm, dig_port->aux_wakeref);
 
@@ -891,13 +888,12 @@ main_link_aux_power_domain_get(struct intel_digital_port *dig_port,
 }
 
 static void
-main_link_aux_power_domain_put(struct intel_digital_port *dig_port,
-			       const struct intel_crtc_state *crtc_state)
+main_link_aux_power_domain_put(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	intel_wakeref_t wf = fetch_and_zero(&dig_port->aux_wakeref);
 	enum intel_display_power_domain domain =
-		intel_ddi_main_link_aux_domain(dig_port, crtc_state);
+		intel_ddi_main_link_aux_domain(dig_port);
 
 	if (!wf)
 		return;
@@ -928,7 +924,7 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
 								   dig_port->ddi_io_power_domain);
 	}
 
-	main_link_aux_power_domain_get(dig_port, crtc_state);
+	main_link_aux_power_domain_get(dig_port);
 }
 
 void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
@@ -2767,7 +2763,7 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
 		intel_ddi_post_disable_dp(state, encoder, old_crtc_state,
 					  old_conn_state);
 
-	main_link_aux_power_domain_put(dig_port, old_crtc_state);
+	main_link_aux_power_domain_put(dig_port);
 
 	if (is_tc_port)
 		intel_tc_port_put_link(dig_port);
@@ -3088,7 +3084,7 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
 	if (is_tc_port)
 		intel_tc_port_get_link(dig_port, crtc_state->lane_count);
 
-	main_link_aux_power_domain_get(dig_port, crtc_state);
+	main_link_aux_power_domain_get(dig_port);
 
 	if (is_tc_port && !intel_tc_port_in_tbt_alt_mode(dig_port))
 		/*
-- 
2.37.1


  reply	other threads:[~2022-11-08 15:23 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-07 17:09 [Intel-gfx] [PATCH v2 0/9] drm/i915/tgl+: Enable DC power states on all eDP ports Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Allocate power domain set wakerefs dynamically Imre Deak
2022-11-08  8:54   ` Jani Nikula
2022-11-08 13:45     ` Imre Deak
2022-11-08 15:18   ` [Intel-gfx] [PATCH v3 " Imre Deak
2022-11-10 19:11     ` Ville Syrjälä
2022-11-10 19:55       ` Imre Deak
2022-11-10 21:49         ` Ville Syrjälä
2022-11-11 12:37           ` Imre Deak
2022-11-11 13:43             ` Ville Syrjälä
2022-11-11 13:52               ` Ville Syrjälä
2022-11-11 15:47                 ` Imre Deak
2022-11-11 18:30                   ` Ville Syrjälä
2022-11-11 18:56                     ` Imre Deak
2022-11-11 19:23                       ` Ville Syrjälä
2022-11-11 21:38                         ` Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Move the POWER_DOMAIN_AUX_IO_A definition to its logical place Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Use the AUX_IO power domain only for eDP/PSR port Imre Deak
2022-11-08 15:18   ` [Intel-gfx] [PATCH v3 " Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 4/9] drm/i915/tgl+: Enable display DC power states on all eDP ports Imre Deak
2022-11-08 15:18   ` [Intel-gfx] [PATCH v3 " Imre Deak
2022-11-10 18:52     ` Ville Syrjälä
2022-11-10 18:57       ` Ville Syrjälä
2022-11-10 19:10         ` Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing AUX_IO_A power domain->well mappings Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Add missing DC_OFF " Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Factor out function to get/put AUX_IO power for main link Imre Deak
2022-11-08 15:18   ` [Intel-gfx] [PATCH v3 " Imre Deak
2022-11-10 10:21     ` Ville Syrjälä
2022-11-10 10:44       ` Jani Nikula
2022-11-10 12:29       ` Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Don't enable the AUX_IO power for combo-PHY external DP port main links Imre Deak
2022-11-08 15:18   ` Imre Deak [this message]
2022-11-10 10:37     ` [Intel-gfx] [PATCH v3 " Ville Syrjälä
2022-11-10 12:27       ` Imre Deak
2022-11-07 17:09 ` [Intel-gfx] [PATCH v2 9/9] drm/i915/mtl+: Don't enable the AUX_IO power for non-eDP " Imre Deak
2022-11-08 15:18   ` [Intel-gfx] [PATCH v3 " Imre Deak
2022-11-07 22:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl+: Enable DC power states on all eDP ports (rev2) Patchwork
2022-11-07 22:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-07 22:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-08  4:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-11-08 17:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl+: Enable DC power states on all eDP ports (rev8) Patchwork
2022-11-08 17:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-08 17:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-08 22:52 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221108151828.3761358-5-imre.deak@intel.com \
    --to=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox