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From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 02/11] drm/display/dp: Add helper function to get DSC bpp prescision
Date: Mon, 28 Nov 2022 15:49:13 +0530	[thread overview]
Message-ID: <20221128101922.217217-3-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20221128101922.217217-1-ankit.k.nautiyal@intel.com>

Add helper to get the DSC bits_per_pixel precision for the DP sink.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/display/drm_dp_helper.c | 27 +++++++++++++++++++++++++
 include/drm/display/drm_dp_helper.h     |  1 +
 2 files changed, 28 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c
index 16565a0a5da6..3b3e89e46f1c 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc,
 }
 EXPORT_SYMBOL(drm_dp_read_desc);
 
+/**
+ * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment
+ * @dsc_dpcd: DSC capabilities from DPCD
+ *
+ * Returns the bpp precision supported by the DP sink.
+ */
+u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+	u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT];
+
+	switch (bpp_increment_dpcd) {
+	case DP_DSC_BITS_PER_PIXEL_1_16:
+		return 16;
+	case DP_DSC_BITS_PER_PIXEL_1_8:
+		return 8;
+	case DP_DSC_BITS_PER_PIXEL_1_4:
+		return 4;
+	case DP_DSC_BITS_PER_PIXEL_1_2:
+		return 2;
+	case DP_DSC_BITS_PER_PIXEL_1:
+		return 1;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr);
+
 /**
  * drm_dp_dsc_sink_max_slice_count() - Get the max slice count
  * supported by the DSC sink.
diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
index ab55453f2d2c..0a0306b2e829 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 }
 
 /* DP/eDP DSC support */
+u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
 u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
 				   bool is_edp);
 u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
-- 
2.25.1


  parent reply	other threads:[~2022-11-28 10:18 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-28 10:19 [Intel-gfx] [PATCH 00/11] Add DSC fractional bpp support Ankit Nautiyal
2022-11-28 10:19 ` [Intel-gfx] [PATCH 01/11] drm/i915/dp: Check if force dsc bpc <= max requested bpc Ankit Nautiyal
2022-11-28 10:19 ` Ankit Nautiyal [this message]
2022-11-28 15:27   ` [Intel-gfx] [PATCH 02/11] drm/display/dp: Add helper function to get DSC bpp prescision kernel test robot
2022-11-28 10:19 ` [Intel-gfx] [PATCH 03/11] drm/i915/dp: Rename helpers to get DSC max pipe bpp and max output bpp Ankit Nautiyal
2022-11-28 10:19 ` [Intel-gfx] [PATCH 04/11] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2022-12-05  7:28   ` Lisovskiy, Stanislav
2022-12-06 10:15     ` Nautiyal, Ankit K
2022-11-28 10:19 ` [Intel-gfx] [PATCH 05/11] drm/i915/display: Store compressed bpp in U6.4 format Ankit Nautiyal
2022-11-28 10:19 ` [Intel-gfx] [PATCH 06/11] drm/i915/display: Consider fractional vdsc bpp while computing m_n values Ankit Nautiyal
2022-11-28 10:19 ` [Intel-gfx] [PATCH 07/11] drm/i915/audio : Consider fractional vdsc bpp while computing tu_data Ankit Nautiyal
2022-12-05  7:35   ` Lisovskiy, Stanislav
2022-12-06 10:19     ` Nautiyal, Ankit K
2022-11-28 10:19 ` [Intel-gfx] [PATCH 08/11] drm/i915/dsc/mtl: Add support for fractional bpp Ankit Nautiyal
2022-11-28 10:19 ` [Intel-gfx] [PATCH 09/11] drm/i915/dp: Iterate over output bpp with fractional step size Ankit Nautiyal
2022-11-28 10:19 ` [Intel-gfx] [PATCH 10/11] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Ankit Nautiyal
2022-11-28 10:19 ` [Intel-gfx] [PATCH 11/11] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs Ankit Nautiyal
2022-11-28 12:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DSC fractional bpp support Patchwork
2022-11-28 12:45 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-11-28 13:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-28 16:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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