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* [Intel-gfx] [PATCH] drm/i915: Implement workaround for DP2 UHBR bandwidth check
@ 2023-01-10 12:33 Stanislav Lisovskiy
  2023-01-10 16:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Implement workaround for DP2 UHBR bandwidth check (rev2) Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Stanislav Lisovskiy @ 2023-01-10 12:33 UTC (permalink / raw)
  To: intel-gfx

According to spec, we should check if output_bpp * pixel_rate is less
than DDI clock * 72, if UHBR is used.

HSDES: 1406899791
BSPEC: 49259

v2: - Removed wrong comment(Rodrigo Vivi)
    - Added HSDES to the commit msg(Rodrigo Vivi)
    - Moved UHBR check to the MST specific code

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 8b0e4defa3f1..1f1f7f5f6501 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -339,10 +339,19 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 		ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
 						  conn_state, &limits,
 						  pipe_config->dp_m_n.tu, false);
-	}
+		if (ret < 0)
+			return ret;
 
-	if (ret)
-		return ret;
+		if (intel_dp_is_uhbr(pipe_config)) {
+			int output_bpp = pipe_config->dsc.compressed_bpp;
+
+			if (output_bpp * adjusted_mode->crtc_clock >=
+			    pipe_config->port_clock * 72) {
+				drm_dbg_kms(&dev_priv->drm, "DP2 UHBR check failed\n");
+				return -EINVAL;
+			}
+		}
+	}
 
 	ret = intel_dp_mst_update_slots(encoder, pipe_config, conn_state);
 	if (ret)
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH] drm/i915: Implement workaround for DP2 UHBR bandwidth check
@ 2023-01-02 11:39 Stanislav Lisovskiy
  2023-01-03 16:32 ` Rodrigo Vivi
  0 siblings, 1 reply; 8+ messages in thread
From: Stanislav Lisovskiy @ 2023-01-02 11:39 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula

According to spec, we should check if output_bpp * pixel_rate is less
than DDI clock * 72, if UHBR is used.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index bf80f296a8fdb..13baf3cb5f934 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1582,6 +1582,17 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 		drm_dbg_kms(&dev_priv->drm, "DSC: compressed bpp %d slice count %d\n",
 			    pipe_config->dsc.compressed_bpp,
 			    pipe_config->dsc.slice_count);
+
+		/* wa1406899791 */
+		if (intel_dp_is_uhbr(pipe_config)) {
+			int output_bpp = pipe_config->dsc.compressed_bpp;
+
+			if (output_bpp * adjusted_mode->crtc_clock >=
+			    pipe_config->port_clock * 72) {
+				drm_dbg_kms(&dev_priv->drm, "DP2 UHBR check failed\n");
+				return -EINVAL;
+			}
+		}
 	}
 	/*
 	 * VDSC engine operates at 1 Pixel per clock, so if peak pixel rate
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-01-11  9:17 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-01-10 12:33 [Intel-gfx] [PATCH] drm/i915: Implement workaround for DP2 UHBR bandwidth check Stanislav Lisovskiy
2023-01-10 16:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Implement workaround for DP2 UHBR bandwidth check (rev2) Patchwork
2023-01-10 19:12 ` [Intel-gfx] [PATCH] drm/i915: Implement workaround for DP2 UHBR bandwidth check Rodrigo Vivi
2023-01-11  9:17   ` Lisovskiy, Stanislav
2023-01-10 21:20 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Implement workaround for DP2 UHBR bandwidth check (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-01-02 11:39 [Intel-gfx] [PATCH] drm/i915: Implement workaround for DP2 UHBR bandwidth check Stanislav Lisovskiy
2023-01-03 16:32 ` Rodrigo Vivi
2023-01-09 15:06   ` Lisovskiy, Stanislav

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