* [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR
@ 2023-02-02 9:47 Stanislav Lisovskiy
2023-02-02 9:47 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Stanislav Lisovskiy @ 2023-02-02 9:47 UTC (permalink / raw)
To: intel-gfx
According to BSpec UHBR might hit hw limitation which must be checked.
So this series adds first some generic checker function, which might
be used to add this or similar checks in future, then we introduce
that particular UHBR check.
Stanislav Lisovskiy (2):
drm/i915: Add generic constraint checker when determining DP MST DSC
bpp
drm/i915: Implement UHBR bandwidth check
drivers/gpu/drm/i915/display/intel_dp_mst.c | 28 +++++++++++++++++++--
1 file changed, 26 insertions(+), 2 deletions(-)
--
2.37.3
^ permalink raw reply [flat|nested] 8+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp 2023-02-02 9:47 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy @ 2023-02-02 9:47 ` Stanislav Lisovskiy 2023-02-02 10:04 ` Jani Nikula 2023-02-02 9:47 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy ` (2 subsequent siblings) 3 siblings, 1 reply; 8+ messages in thread From: Stanislav Lisovskiy @ 2023-02-02 9:47 UTC (permalink / raw) To: intel-gfx There are might be multiple contraints which we need to check while determining if we can use desired compressed bpp, so might be good idea to add a special helper, so that we don't overcomplicate the main bpp calculation function. Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 8b0e4defa3f1..e3e7c305fece 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -45,6 +45,13 @@ #include "intel_hotplug.h" #include "skl_scaler.h" +static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, + const struct drm_display_mode *adjusted_mode, + struct intel_crtc_state *crtc_state) +{ + return 0; +} + static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, int max_bpp, @@ -87,6 +94,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp); + ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state); + if (ret) + continue; + slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr, connector->port, crtc_state->pbn); @@ -104,8 +115,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, } } - /* Despite slots are non-zero, we still failed the atomic check */ - if (ret && slots >= 0) + /* We failed to find a proper bpp/timeslots, return error */ + if (ret) slots = ret; if (slots < 0) { -- 2.37.3 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp 2023-02-02 9:47 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy @ 2023-02-02 10:04 ` Jani Nikula 0 siblings, 0 replies; 8+ messages in thread From: Jani Nikula @ 2023-02-02 10:04 UTC (permalink / raw) To: Stanislav Lisovskiy, intel-gfx On Thu, 02 Feb 2023, Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> wrote: > There are might be multiple contraints which we need to check while determining > if we can use desired compressed bpp, so might be good idea to add a special > helper, so that we don't overcomplicate the main bpp calculation function. It is, but I don't see the value in adding an empty function like this. > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index 8b0e4defa3f1..e3e7c305fece 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -45,6 +45,13 @@ > #include "intel_hotplug.h" > #include "skl_scaler.h" > > +static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > + const struct drm_display_mode *adjusted_mode, > + struct intel_crtc_state *crtc_state) > +{ > + return 0; > +} > + > static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, > struct intel_crtc_state *crtc_state, > int max_bpp, > @@ -87,6 +94,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, > > drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp); > > + ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state); > + if (ret) > + continue; > + > slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr, > connector->port, > crtc_state->pbn); > @@ -104,8 +115,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, > } > } > > - /* Despite slots are non-zero, we still failed the atomic check */ > - if (ret && slots >= 0) > + /* We failed to find a proper bpp/timeslots, return error */ > + if (ret) > slots = ret; > > if (slots < 0) { -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-02-02 9:47 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy 2023-02-02 9:47 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy @ 2023-02-02 9:47 ` Stanislav Lisovskiy 2023-02-02 10:05 ` Jani Nikula 2023-02-02 10:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR (rev2) Patchwork 2023-02-02 16:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 1 reply; 8+ messages in thread From: Stanislav Lisovskiy @ 2023-02-02 9:47 UTC (permalink / raw) To: intel-gfx According to spec, we should check if output_bpp * pixel_rate is less than DDI clock * 72, if UHBR is used. HSDES: 1406899791 BSPEC: 49259 v2: - Removed wrong comment(Rodrigo Vivi) - Added HSDES to the commit msg(Rodrigo Vivi) - Moved UHBR check to the MST specific code v3: - Changed commit subject(Rodrigo Vivi) - Fixed the error message if check fails(Rodrigo Vivi) v4: - Move UHBR check to new helper function - Now both for non-DSC/DSC we use that new check as one of the constraints, when figuring out output bpp to be used(Ville Syrjälä) v5: - Use symbol clock (32 bit per lane for DP2) instead of port clock in the formula(Ville Syrjälä) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index e3e7c305fece..e63132557690 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -47,8 +47,21 @@ static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, const struct drm_display_mode *adjusted_mode, - struct intel_crtc_state *crtc_state) + struct intel_crtc_state *pipe_config) { + if (intel_dp_is_uhbr(pipe_config)) { + int output_bpp = bpp; + /* DisplayPort 2 128b/132b, bits per lane is always 32 */ + int symbol_clock = pipe_config->port_clock / 32; + + if (output_bpp * adjusted_mode->crtc_clock >= + symbol_clock * 72) { + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n", + output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72); + return -EINVAL; + } + } + return 0; } -- 2.37.3 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-02-02 9:47 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy @ 2023-02-02 10:05 ` Jani Nikula 0 siblings, 0 replies; 8+ messages in thread From: Jani Nikula @ 2023-02-02 10:05 UTC (permalink / raw) To: Stanislav Lisovskiy, intel-gfx On Thu, 02 Feb 2023, Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> wrote: > According to spec, we should check if output_bpp * pixel_rate is less > than DDI clock * 72, if UHBR is used. > > HSDES: 1406899791 > BSPEC: 49259 > > v2: - Removed wrong comment(Rodrigo Vivi) > - Added HSDES to the commit msg(Rodrigo Vivi) > - Moved UHBR check to the MST specific code > > v3: - Changed commit subject(Rodrigo Vivi) > - Fixed the error message if check fails(Rodrigo Vivi) > > v4: - Move UHBR check to new helper function > - Now both for non-DSC/DSC we use that new check as > one of the constraints, when figuring out output bpp > to be used(Ville Syrjälä) > > v5: - Use symbol clock (32 bit per lane for DP2) instead of port > clock in the formula(Ville Syrjälä) > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 ++++++++++++++- > 1 file changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index e3e7c305fece..e63132557690 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -47,8 +47,21 @@ > > static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > const struct drm_display_mode *adjusted_mode, > - struct intel_crtc_state *crtc_state) > + struct intel_crtc_state *pipe_config) Stick to crtc_state naming. > { > + if (intel_dp_is_uhbr(pipe_config)) { > + int output_bpp = bpp; > + /* DisplayPort 2 128b/132b, bits per lane is always 32 */ > + int symbol_clock = pipe_config->port_clock / 32; > + > + if (output_bpp * adjusted_mode->crtc_clock >= > + symbol_clock * 72) { > + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n", > + output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72); > + return -EINVAL; > + } > + } > + > return 0; > } -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR (rev2) 2023-02-02 9:47 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy 2023-02-02 9:47 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy 2023-02-02 9:47 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy @ 2023-02-02 10:34 ` Patchwork 2023-02-02 16:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2023-02-02 10:34 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 2981 bytes --] == Series Details == Series: We need to have additional checks for DP MST UHBR (rev2) URL : https://patchwork.freedesktop.org/series/112876/ State : success == Summary == CI Bug Log - changes from CI_DRM_12681 -> Patchwork_112876v2 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/index.html Participating hosts (25 -> 24) ------------------------------ Additional (1): fi-apl-guc Missing (2): bat-rpls-2 fi-snb-2520m Known issues ------------ Here are the changes found in Patchwork_112876v2 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@fbdev@write: - fi-blb-e6850: [PASS][1] -> [SKIP][2] ([fdo#109271]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/fi-blb-e6850/igt@fbdev@write.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/fi-blb-e6850/igt@fbdev@write.html * igt@gem_lmem_swapping@basic: - fi-apl-guc: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/fi-apl-guc/igt@gem_lmem_swapping@basic.html * igt@i915_selftest@live@gt_heartbeat: - fi-apl-guc: NOTRUN -> [DMESG-FAIL][4] ([i915#5334]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html * igt@kms_chamelium_hpd@vga-hpd-fast: - fi-apl-guc: NOTRUN -> [SKIP][5] ([fdo#109271]) +21 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/fi-apl-guc/igt@kms_chamelium_hpd@vga-hpd-fast.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983 [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334 [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699 [i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981 Build changes ------------- * Linux: CI_DRM_12681 -> Patchwork_112876v2 CI-20190529: 20190529 CI_DRM_12681: 8ee2ec597aa4b8331124bf852432c2ca2fd7b8d1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7143: c7b12dcc460fc2348e1fa7f4dcb791bb82e29e44 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_112876v2: 8ee2ec597aa4b8331124bf852432c2ca2fd7b8d1 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 3703d1bb3ac7 drm/i915: Implement UHBR bandwidth check 94fd266334e2 drm/i915: Add generic constraint checker when determining DP MST DSC bpp == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/index.html [-- Attachment #2: Type: text/html, Size: 3617 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for We need to have additional checks for DP MST UHBR (rev2) 2023-02-02 9:47 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy ` (2 preceding siblings ...) 2023-02-02 10:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR (rev2) Patchwork @ 2023-02-02 16:54 ` Patchwork 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2023-02-02 16:54 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 22261 bytes --] == Series Details == Series: We need to have additional checks for DP MST UHBR (rev2) URL : https://patchwork.freedesktop.org/series/112876/ State : success == Summary == CI Bug Log - changes from CI_DRM_12681_full -> Patchwork_112876v2_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/index.html Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in Patchwork_112876v2_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_flip@2x-plain-flip-fb-recreate@bc-hdmi-a1-hdmi-a2: - shard-glk: [PASS][1] -> [FAIL][2] ([i915#2122]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-glk4/igt@kms_flip@2x-plain-flip-fb-recreate@bc-hdmi-a1-hdmi-a2.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-glk5/igt@kms_flip@2x-plain-flip-fb-recreate@bc-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1: - shard-glk: [PASS][3] -> [FAIL][4] ([i915#79]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html #### Possible fixes #### * igt@drm_fdinfo@virtual-idle: - {shard-rkl}: [FAIL][5] ([i915#7742]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-2/igt@drm_fdinfo@virtual-idle.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-2/igt@drm_fdinfo@virtual-idle.html * igt@fbdev@info: - {shard-rkl}: [SKIP][7] ([i915#2582]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-4/igt@fbdev@info.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-6/igt@fbdev@info.html * igt@fbdev@write: - {shard-tglu}: [SKIP][9] ([i915#2582]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-tglu-6/igt@fbdev@write.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-tglu-2/igt@fbdev@write.html * igt@gem_ctx_exec@basic-nohangcheck: - {shard-rkl}: [FAIL][11] ([i915#6268]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_ctx_persistence@engines-hang@bcs0: - {shard-rkl}: [SKIP][13] ([i915#6252]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-5/igt@gem_ctx_persistence@engines-hang@bcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-1/igt@gem_ctx_persistence@engines-hang@bcs0.html * igt@gem_eio@in-flight-suspend: - {shard-rkl}: [FAIL][15] ([fdo#103375]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-3/igt@gem_eio@in-flight-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-2/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_endless@dispatch@bcs0: - {shard-rkl}: [SKIP][17] ([i915#6247]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-5/igt@gem_exec_endless@dispatch@bcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-1/igt@gem_exec_endless@dispatch@bcs0.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-glk: [FAIL][19] ([i915#2842]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-glk9/igt@gem_exec_fair@basic-none-rrul@rcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@gem_exec_flush@basic-batch-kernel-default-cmd: - {shard-rkl}: [SKIP][21] ([fdo#109313]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-6/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-5/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html * igt@gem_exec_reloc@basic-wc-read-noreloc: - {shard-rkl}: [SKIP][23] ([i915#3281]) -> [PASS][24] +12 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-3/igt@gem_exec_reloc@basic-wc-read-noreloc.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-5/igt@gem_exec_reloc@basic-wc-read-noreloc.html * igt@gem_mmap_gtt@coherency: - {shard-rkl}: [SKIP][25] ([fdo#111656]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-6/igt@gem_mmap_gtt@coherency.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-5/igt@gem_mmap_gtt@coherency.html * igt@gem_partial_pwrite_pread@writes-after-reads-uncached: - {shard-rkl}: [SKIP][27] ([i915#3282]) -> [PASS][28] +8 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-3/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html * igt@gen9_exec_parse@bb-chained: - {shard-rkl}: [SKIP][29] ([i915#2527]) -> [PASS][30] +2 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-2/igt@gen9_exec_parse@bb-chained.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-5/igt@gen9_exec_parse@bb-chained.html * igt@i915_pm_dc@dc9-dpms: - {shard-rkl}: [SKIP][31] ([i915#3361]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-5/igt@i915_pm_dc@dc9-dpms.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-1/igt@i915_pm_dc@dc9-dpms.html * igt@i915_pm_rpm@modeset-lpsp-stress: - {shard-tglu}: [SKIP][33] ([i915#1397]) -> [PASS][34] +1 similar issue [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-tglu-6/igt@i915_pm_rpm@modeset-lpsp-stress.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-tglu-2/igt@i915_pm_rpm@modeset-lpsp-stress.html * igt@i915_pm_sseu@full-enable: - {shard-rkl}: [SKIP][35] ([i915#4387]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-6/igt@i915_pm_sseu@full-enable.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-5/igt@i915_pm_sseu@full-enable.html * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow: - {shard-rkl}: [SKIP][37] ([i915#1845] / [i915#4098]) -> [PASS][38] +7 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-4/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-6/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html * igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_rc_ccs: - {shard-tglu}: [SKIP][39] ([i915#7651]) -> [PASS][40] +13 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-tglu-6/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_rc_ccs.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-tglu-7/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_rc_ccs.html * igt@kms_draw_crc@fill-fb: - {shard-tglu}: [SKIP][41] ([i915#1845]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-tglu-6/igt@kms_draw_crc@fill-fb.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-tglu-7/igt@kms_draw_crc@fill-fb.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt: - {shard-tglu}: [SKIP][43] ([i915#1849]) -> [PASS][44] +6 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-tglu-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary: - {shard-rkl}: [SKIP][45] ([i915#1849] / [i915#4098]) -> [PASS][46] +2 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html * igt@kms_psr@sprite_mmap_gtt: - {shard-rkl}: [SKIP][47] ([i915#1072]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-4/igt@kms_psr@sprite_mmap_gtt.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-6/igt@kms_psr@sprite_mmap_gtt.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - {shard-rkl}: [SKIP][49] ([i915#5461]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-4/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_universal_plane@universal-plane-pipe-c-sanity: - {shard-tglu}: [SKIP][51] ([fdo#109274]) -> [PASS][52] +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-tglu-6/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-tglu-2/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html * igt@kms_vblank@pipe-d-wait-forked-busy: - {shard-tglu}: [SKIP][53] ([i915#1845] / [i915#7651]) -> [PASS][54] +4 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-tglu-6/igt@kms_vblank@pipe-d-wait-forked-busy.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-tglu-2/igt@kms_vblank@pipe-d-wait-forked-busy.html * igt@perf_pmu@idle@rcs0: - {shard-rkl}: [FAIL][55] ([i915#4349]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-4/igt@perf_pmu@idle@rcs0.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-3/igt@perf_pmu@idle@rcs0.html * igt@prime_vgem@basic-write: - {shard-rkl}: [SKIP][57] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][58] +1 similar issue [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12681/shard-rkl-2/igt@prime_vgem@basic-write.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/shard-rkl-5/igt@prime_vgem@basic-write.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302 [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309 [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313 [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644 [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257 [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2532]: https://gitlab.freedesktop.org/drm/intel/issues/2532 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469 [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742 [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804 [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938 [i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966 [i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036 [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212 [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349 [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767 [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771 [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812 [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833 [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852 [i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854 [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859 [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860 [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880 [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881 [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885 [i915#5099]: https://gitlab.freedesktop.org/drm/intel/issues/5099 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288 [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461 [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563 [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227 [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247 [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248 [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301 [i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334 [i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355 [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433 [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590 [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768 [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944 [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946 [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953 [i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037 [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128 [i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276 [i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294 [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651 [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701 [i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707 [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949 [i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957 [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975 [i915#7984]: https://gitlab.freedesktop.org/drm/intel/issues/7984 [i915#7997]: https://gitlab.freedesktop.org/drm/intel/issues/7997 Build changes ------------- * Linux: CI_DRM_12681 -> Patchwork_112876v2 CI-20190529: 20190529 CI_DRM_12681: 8ee2ec597aa4b8331124bf852432c2ca2fd7b8d1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7143: c7b12dcc460fc2348e1fa7f4dcb791bb82e29e44 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_112876v2: 8ee2ec597aa4b8331124bf852432c2ca2fd7b8d1 @ git://anongit.freedesktop.org/gfx-ci/linux == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v2/index.html [-- Attachment #2: Type: text/html, Size: 15556 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR
@ 2023-01-16 11:19 Stanislav Lisovskiy
2023-01-16 11:19 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy
0 siblings, 1 reply; 8+ messages in thread
From: Stanislav Lisovskiy @ 2023-01-16 11:19 UTC (permalink / raw)
To: intel-gfx
According to BSpec UHBR might hit hw limitation which must be checked.
So this series adds first some generic checker function, which might
be used to add this or similar checks in future, then we introduce
that particular UHBR check.
Stanislav Lisovskiy (2):
drm/i915: Add generic constraint checker when determining DP MST DSC
bpp
drm/i915: Implement UHBR bandwidth check
drivers/gpu/drm/i915/display/intel_dp_mst.c | 26 +++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
--
2.37.3
^ permalink raw reply [flat|nested] 8+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp 2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy @ 2023-01-16 11:19 ` Stanislav Lisovskiy 0 siblings, 0 replies; 8+ messages in thread From: Stanislav Lisovskiy @ 2023-01-16 11:19 UTC (permalink / raw) To: intel-gfx There are might be multiple contraints which we need to check while determining if we can use desired compressed bpp, so might be good idea to add a special helper, so that we don't overcomplicate the main bpp calculation function. Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 8b0e4defa3f1..e3e7c305fece 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -45,6 +45,13 @@ #include "intel_hotplug.h" #include "skl_scaler.h" +static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, + const struct drm_display_mode *adjusted_mode, + struct intel_crtc_state *crtc_state) +{ + return 0; +} + static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, int max_bpp, @@ -87,6 +94,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp); + ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state); + if (ret) + continue; + slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr, connector->port, crtc_state->pbn); @@ -104,8 +115,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, } } - /* Despite slots are non-zero, we still failed the atomic check */ - if (ret && slots >= 0) + /* We failed to find a proper bpp/timeslots, return error */ + if (ret) slots = ret; if (slots < 0) { -- 2.37.3 ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-02-02 16:54 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-02-02 9:47 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy 2023-02-02 9:47 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy 2023-02-02 10:04 ` Jani Nikula 2023-02-02 9:47 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy 2023-02-02 10:05 ` Jani Nikula 2023-02-02 10:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR (rev2) Patchwork 2023-02-02 16:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy 2023-01-16 11:19 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy
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