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* [Intel-gfx] [PATCH 0/2] Aux invalidation
@ 2023-03-20 19:41 Andi Shyti
  2023-03-20 19:41 ` [Intel-gfx] [PATCH 1/2] drm/i915/gt: Ensure memory quiesced before invalidation Andi Shyti
                   ` (5 more replies)
  0 siblings, 6 replies; 8+ messages in thread
From: Andi Shyti @ 2023-03-20 19:41 UTC (permalink / raw)
  To: intel-gfx, dri-devel, Jonathan Cavitt; +Cc: Andi Shyti, Nirmoy Das

Hi,

I'm just respinning these two aux invalidation patches from
Jonathan. They have been sent some times ago and need to be
reviewed.

Thanks,
Andi

Jonathan Cavitt (2):
  drm/i915/gt: Ensure memory quiesced before invalidation
  drm/i915/gt: Poll aux invalidation register bit on invalidation

 drivers/gpu/drm/i915/gt/gen8_engine_cs.c     | 24 ++++++++++++++++----
 drivers/gpu/drm/i915/gt/intel_gpu_commands.h |  1 +
 2 files changed, 21 insertions(+), 4 deletions(-)

-- 
2.39.2


^ permalink raw reply	[flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/gt: Ensure memory quiesced before invalidation
@ 2023-02-21 22:13 Jonathan Cavitt
  2023-02-21 22:13 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Poll aux invalidation register bit on invalidation Jonathan Cavitt
  0 siblings, 1 reply; 8+ messages in thread
From: Jonathan Cavitt @ 2023-02-21 22:13 UTC (permalink / raw)
  To: intel-gfx
  Cc: jonathan.cavitt, gregory.f.germano, saurabhg.gupta,
	chris.p.wilson

All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index e1c76e5bfa82..6f830f80eb0f 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -181,6 +181,13 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
 {
 	struct intel_engine_cs *engine = rq->engine;
 
+	/*
+	 * Aux invalidations on Aux CCS platforms require
+	 * memory traffic is quiesced prior.
+	 */
+	if (!HAS_FLAT_CCS(engine->i915))
+		mode |= EMIT_FLUSH;
+
 	if (mode & EMIT_FLUSH) {
 		u32 flags = 0;
 		u32 *cs;
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-03-21 11:39 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-03-20 19:41 [Intel-gfx] [PATCH 0/2] Aux invalidation Andi Shyti
2023-03-20 19:41 ` [Intel-gfx] [PATCH 1/2] drm/i915/gt: Ensure memory quiesced before invalidation Andi Shyti
2023-03-20 19:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Poll aux invalidation register bit on invalidation Andi Shyti
2023-03-21  7:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Aux invalidation Patchwork
2023-03-21  7:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-21  7:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-21 11:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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2023-02-21 22:13 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Ensure memory quiesced before invalidation Jonathan Cavitt
2023-02-21 22:13 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Poll aux invalidation register bit on invalidation Jonathan Cavitt

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