From: fei.yang@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
Chris Wilson <chris.p.wilson@linux.intel.com>,
dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 6/7] drm/i915: make sure correct pte encode is used
Date: Fri, 31 Mar 2023 23:38:29 -0700 [thread overview]
Message-ID: <20230401063830.438127-7-fei.yang@intel.com> (raw)
In-Reply-To: <20230401063830.438127-1-fei.yang@intel.com>
From: Fei Yang <fei.yang@intel.com>
PTE encode is platform dependent. After replacing cache_level with
pat_index, the newly introduced mtl_pte_encode is actually generic
for all gen12 platforms, thus rename it to gen12_pte_encode and
apply it to all gen12 platforms.
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f76ec2cb29ef..e393e20b5894 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -60,7 +60,7 @@ static u64 gen8_pte_encode(dma_addr_t addr,
return pte;
}
-static u64 mtl_pte_encode(dma_addr_t addr,
+static u64 gen12_pte_encode(dma_addr_t addr,
unsigned int pat_index,
u32 flags)
{
@@ -999,8 +999,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
*/
ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
- if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
- ppgtt->vm.pte_encode = mtl_pte_encode;
+ if (GRAPHICS_VER(gt->i915) >= 12)
+ ppgtt->vm.pte_encode = gen12_pte_encode;
else
ppgtt->vm.pte_encode = gen8_pte_encode;
--
2.25.1
next prev parent reply other threads:[~2023-04-01 6:37 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-01 6:38 [Intel-gfx] [PATCH 0/7] drm/i915/mtl: Define MOCS and PAT tables for MTL fei.yang
2023-04-01 6:38 ` [Intel-gfx] [PATCH 1/7] " fei.yang
2023-04-03 12:50 ` Jani Nikula
2023-04-06 8:16 ` Andi Shyti
2023-04-06 18:22 ` Yang, Fei
2023-04-06 8:28 ` Das, Nirmoy
2023-04-06 14:55 ` Yang, Fei
2023-04-06 18:13 ` Das, Nirmoy
2023-04-01 6:38 ` [Intel-gfx] [PATCH 2/7] drm/i915/mtl: workaround coherency issue for Media fei.yang
2023-04-01 6:38 ` [Intel-gfx] [PATCH 3/7] drm/i915/mtl: end support for set caching ioctl fei.yang
2023-04-01 6:38 ` [Intel-gfx] [PATCH 4/7] drm/i915: preparation for using PAT index fei.yang
2023-04-01 6:38 ` [Intel-gfx] [PATCH 5/7] drm/i915: use pat_index instead of cache_level fei.yang
2023-04-03 14:50 ` Ville Syrjälä
2023-04-03 16:57 ` Yang, Fei
2023-04-03 17:14 ` Ville Syrjälä
2023-04-03 19:39 ` Yang, Fei
2023-04-03 19:52 ` Ville Syrjälä
2023-04-06 6:28 ` Yang, Fei
2023-04-01 6:38 ` fei.yang [this message]
2023-04-01 6:38 ` [Intel-gfx] [PATCH 7/7] drm/i915: Allow user to set cache at BO creation fei.yang
2023-04-03 16:02 ` Ville Syrjälä
2023-04-03 16:35 ` Matt Roper
2023-04-03 16:48 ` Ville Syrjälä
2023-04-04 22:15 ` Kenneth Graunke
2023-04-04 7:29 ` Lionel Landwerlin
2023-04-04 16:04 ` Yang, Fei
2023-04-05 7:45 ` Lionel Landwerlin
2023-04-05 20:26 ` Jordan Justen
2023-04-10 8:23 ` Jordan Justen
2023-04-13 20:49 ` Yang, Fei
2023-04-05 23:06 ` Yang, Fei
2023-04-06 9:11 ` Matthew Auld
2023-04-01 7:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Define MOCS and PAT tables for MTL Patchwork
2023-04-01 7:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-01 7:20 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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