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From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 09/11] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines
Date: Fri, 16 Jun 2023 17:11:58 +0530	[thread overview]
Message-ID: <20230616114200.3228284-10-dnyaneshwar.bhadane@intel.com> (raw)
In-Reply-To: <20230616114200.3228284-1-dnyaneshwar.bhadane@intel.com>

From: Anusha Srivatsa <anusha.srivatsa@intel.com>

Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c        | 2 +-
 drivers/gpu/drm/i915/i915_drv.h                 | 2 +-
 drivers/gpu/drm/i915/intel_step.c               | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
index 852bea0208ce..cc9569af7f0c 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
@@ -94,7 +94,7 @@ static int guc_hwconfig_fill_buffer(struct intel_guc *guc, struct intel_hwconfig
 
 static bool has_table(struct drm_i915_private *i915)
 {
-	if (IS_ALDERLAKE_P(i915) && !IS_ADLP_N(i915))
+	if (IS_ALDERLAKE_P(i915) && !IS_ALDERLAKE_P_N(i915))
 		return true;
 	if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55))
 		return true;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index d408856ae4c0..dfb2837a3ed4 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -279,7 +279,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
 	 * ADL-S, otherwise the GuC might attempt to fetch a config table that
 	 * does not exist.
 	 */
-	if (IS_ADLP_N(i915))
+	if (IS_ALDERLAKE_P_N(i915))
 		p = INTEL_ALDERLAKE_S;
 
 	GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all));
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index aa9689a1683f..6dee940e6913 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -587,7 +587,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12)
 #define IS_ADLS_RPLS(i915) \
 	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
-#define IS_ADLP_N(i915) \
+#define IS_ALDERLAKE_P_N(i915) \
 	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
 #define IS_ALDERLAKE_P_RPLP(i915) \
 	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 9072f4ccd3c1..fe447063a064 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -192,7 +192,7 @@ void intel_step_init(struct drm_i915_private *i915)
 	} else if (IS_XEHPSDV(i915)) {
 		revids = xehpsdv_revids;
 		size = ARRAY_SIZE(xehpsdv_revids);
-	} else if (IS_ADLP_N(i915)) {
+	} else if (IS_ALDERLAKE_P_N(i915)) {
 		revids = adlp_n_revids;
 		size = ARRAY_SIZE(adlp_n_revids);
 	} else if (IS_ALDERLAKE_P_RPLP(i915)) {
-- 
2.34.1


  parent reply	other threads:[~2023-06-16 11:42 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-15  9:54 [Intel-gfx] [PATCH 00/11] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 01/11] drm/i915/TGL: s/TGL/TIGERLAKE for platform/subplatform defines Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 02/11] drm/i915/MTL: s/MTL/METEORLAKE " Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 03/11] drm/i915/TGL: s/RKL/ROCKETLAKE " Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 04/11] drm/i915/JSL: s/JSL/JASPERLAKE " Dnyaneshwar Bhadane
2023-06-19  8:46   ` Jani Nikula
2023-06-20 14:36     ` Srivatsa, Anusha
2023-06-15  9:54 ` [Intel-gfx] [PATCH 05/11] drm/i915/KBL: s/KBL/KABYLAKE " Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 06/11] drm/i915/SKL: s/SKL/SKYLAKE " Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 07/11] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 08/11] drm/i915/rplp: s/ADLP/ALDERLAKE_P for RPLP defines Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 09/11] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines Dnyaneshwar Bhadane
2023-06-15  9:54 ` [Intel-gfx] [PATCH 10/11] drm/i915/adls: s/ADLS/ALDERLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane
2023-06-15 21:51   ` Srivatsa, Anusha
2023-06-15  9:54 ` [Intel-gfx] [PATCH 11/11] drm/i915/rplu: s/ADLP/ALDERLAKE_P in RPLU defines Dnyaneshwar Bhadane
2023-06-15 18:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Replace acronym with full platform name in defines Patchwork
2023-06-15 18:26 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-06-15 18:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-06-16  0:13 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-06-16 11:41 ` [Intel-gfx] [PATCH 00/11] " Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 01/11] drm/i915/skl: s/SKL/SKYLAKE for platform/subplatform defines Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 02/11] drm/i915/kbl: s/KBL/KABYLAKE " Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 03/11] drm/i915/tgl: s/RKL/ROCKETLAKE " Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 04/11] drm/i915/jsl: s/JSL/JASPERLAKE " Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 05/11] drm/i915/tgl: s/TGL/TIGERLAKE " Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 06/11] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 07/11] drm/i915/rplp: s/ADLP/ALDERLAKE_P for RPLP defines Dnyaneshwar Bhadane
2023-06-16 11:41   ` [Intel-gfx] [PATCH 08/11] drm/i915/rplu: s/ADLP/ALDERLAKE_P in RPLU defines Dnyaneshwar Bhadane
2023-06-16 11:41   ` Dnyaneshwar Bhadane [this message]
2023-06-16 11:41   ` [Intel-gfx] [PATCH 10/11] drm/i915/adls: s/ADLS/ALDERLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane
2023-06-16 11:42   ` [Intel-gfx] [PATCH 11/11] drm/i915/mtl: s/MTL/METEORLAKE for platform/subplatform defines Dnyaneshwar Bhadane
2023-06-16 12:05     ` Tvrtko Ursulin
2023-06-16 12:07       ` Tvrtko Ursulin
2023-06-22 17:42         ` Bhadane, Dnyaneshwar
2023-06-21 21:11       ` Matt Roper
2023-06-22  9:38         ` Tvrtko Ursulin
2023-06-30 11:40     ` [Intel-gfx] [v2] " Dnyaneshwar Bhadane
2023-07-06 17:45       ` Srivatsa, Anusha
2023-07-10 10:58     ` [Intel-gfx] [v3] " Dnyaneshwar Bhadane
2023-07-10 13:44       ` Bhadane, Dnyaneshwar
2023-07-12 17:20         ` Srivatsa, Anusha
2023-07-13  8:38         ` Tvrtko Ursulin
2023-07-13  9:39           ` Jani Nikula
2023-07-13 11:56             ` Tvrtko Ursulin
2023-07-13 12:12               ` Bhadane, Dnyaneshwar
2023-07-13 12:24                 ` Tvrtko Ursulin
2023-07-13 12:43                   ` Bhadane, Dnyaneshwar
2023-07-13 12:55                     ` Jani Nikula
2023-07-13 12:57                       ` Jani Nikula
2023-07-17  6:42               ` Bhadane, Dnyaneshwar
2023-07-17 11:00                 ` Tvrtko Ursulin
2023-06-20 16:30 ` [Intel-gfx] [PATCH 00/11] Replace acronym with full platform name in defines Jani Nikula
2023-06-21 10:30   ` Tvrtko Ursulin
2023-06-21 11:25     ` Jani Nikula
2023-06-21 17:30   ` Srivatsa, Anusha
2023-07-10 13:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Replace acronym with full platform name in defines. (rev3) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-06-15  5:00 [Intel-gfx] [PATCH 00/11] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-06-15  5:00 ` [Intel-gfx] [PATCH 09/11] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines Dnyaneshwar Bhadane

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