From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
matthew.d.roper@intel.com
Subject: [Intel-gfx] [PATCH v4 09/14] drm/i915/tgl: s/TGL/TIGERLAKE for platform/subplatform defines
Date: Thu, 27 Jul 2023 01:36:52 +0530 [thread overview]
Message-ID: <20230726200657.2773903-10-dnyaneshwar.bhadane@intel.com> (raw)
In-Reply-To: <20230726200657.2773903-1-dnyaneshwar.bhadane@intel.com>
Follow consistent naming convention. Replace TGL with
TIGERLAKE.Replace IS_TGL_DISPLAY_STEP with
IS_TIGERLAKE() && IS_DISPLAY_STEP().
v2:
- s/TGL/tgl in the subject prefix(Anusha)
v3:
- Unrolled wrapper IS_TGL_DISPLAY_STEP and Replace
- Replace IS_PLATFORM && DISPLAY_STEP (Jani/Tvrtko).
v4:
- Removed unused macros
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 2 +-
drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 5 +----
drivers/gpu/drm/i915/intel_step.c | 2 +-
4 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 35e6e3a5ddf1..de809e2d9cac 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1410,7 +1410,7 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (crtc_state->port_clock > 270000) {
- if (IS_TGL_UY(dev_priv)) {
+ if (IS_TIGERLAKE_UY(dev_priv)) {
return intel_get_buf_trans(&tgl_uy_combo_phy_trans_dp_hbr2,
n_entries);
} else {
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 6b01a0b68b97..4ed1244c1a17 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2196,7 +2196,7 @@ static bool gen12_plane_has_mc_ccs(struct drm_i915_private *i915,
/* Wa_14010477008 */
if (IS_DG1(i915) || IS_ROCKETLAKE(i915) ||
- IS_TGL_DISPLAY_STEP(i915, STEP_A0, STEP_D0))
+ (IS_TIGERLAKE(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_D0)))
return false;
/* Wa_22011186057 */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 704c0991e7d3..44f3a368607e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -646,15 +646,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_ICL_WITH_PORT_F(i915) \
IS_SUBPLATFORM(i915, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
-#define IS_TGL_UY(i915) \
+#define IS_TIGERLAKE_UY(i915) \
IS_SUBPLATFORM(i915, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_UY)
-#define IS_TGL_DISPLAY_STEP(__i915, since, until) \
- (IS_TIGERLAKE(__i915) && \
- IS_DISPLAY_STEP(__i915, since, until))
#define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 5e4816417b99..4ca22d0c945b 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -213,7 +213,7 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_ROCKETLAKE(i915)) {
revids = rkl_revids;
size = ARRAY_SIZE(rkl_revids);
- } else if (IS_TGL_UY(i915)) {
+ } else if (IS_TIGERLAKE_UY(i915)) {
revids = tgl_uy_revids;
size = ARRAY_SIZE(tgl_uy_revids);
} else if (IS_TIGERLAKE(i915)) {
--
2.34.1
next prev parent reply other threads:[~2023-07-26 20:07 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-26 20:06 [Intel-gfx] [PATCH v4 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 01/14] drm/i915/hsw: s/HSW/HASWELL for platform/subplatform defines Dnyaneshwar Bhadane
2023-07-31 15:02 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 02/14] drm/i915/bdw: s/BDW/BROADWELL " Dnyaneshwar Bhadane
2023-07-31 15:06 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 03/14] drm/i915/skl: s/SKL/SKYLAKE " Dnyaneshwar Bhadane
2023-07-31 15:09 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 04/14] drm/i915/kbl: s/KBL/KABYLAKE " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 05/14] drm/i915/cfl: s/CFL/COFFEELAKE " Dnyaneshwar Bhadane
2023-07-31 15:16 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 06/14] drm/i915/cml: s/CML/COMETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:17 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 07/14] drm/i915/rkl: s/RKL/ROCKETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:24 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 08/14] drm/i915/jsl: s/JSL/JASPERLAKE " Dnyaneshwar Bhadane
2023-08-01 9:53 ` [Intel-gfx] [Patch v5, " Dnyaneshwar Bhadane
2023-08-01 10:04 ` Dnyaneshwar Bhadane
2023-08-01 11:47 ` [Intel-gfx] [PATCH v5 " Dnyaneshwar Bhadane
2023-07-26 20:06 ` Dnyaneshwar Bhadane [this message]
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 10/14] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v2 11/14] drm/i915/rplp: s/ADLP_RPLP/RAPTORLAKE_P for RPLP defines Dnyaneshwar Bhadane
2023-07-31 15:27 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines Dnyaneshwar Bhadane
2023-07-31 15:49 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 13/14] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane
2023-07-31 15:53 ` Srivatsa, Anusha
2023-07-26 21:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Replace acronym with full platform name in defines Patchwork
2023-07-31 10:58 ` Jani Nikula
2023-07-26 21:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-07-26 21:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-27 1:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-08-01 13:36 ` [Intel-gfx] [PATCH v4 00/14] " Jani Nikula
-- strict thread matches above, loose matches on Subject: below --
2023-08-01 13:53 [Intel-gfx] [PATCH v1 " Dnyaneshwar Bhadane
2023-08-01 13:53 ` [Intel-gfx] [PATCH v4 09/14] drm/i915/tgl: s/TGL/TIGERLAKE for platform/subplatform defines Dnyaneshwar Bhadane
2023-07-26 19:33 [Intel-gfx] [PATCH v4 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 09/14] drm/i915/tgl: s/TGL/TIGERLAKE for platform/subplatform defines Dnyaneshwar Bhadane
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