From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: matthew.d.roper@intel.com
Subject: [Intel-gfx] [PATCH v4 13/14] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines
Date: Thu, 27 Jul 2023 01:36:56 +0530 [thread overview]
Message-ID: <20230726200657.2773903-14-dnyaneshwar.bhadane@intel.com> (raw)
In-Reply-To: <20230726200657.2773903-1-dnyaneshwar.bhadane@intel.com>
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_step.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
index 852bea0208ce..cc9569af7f0c 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
@@ -94,7 +94,7 @@ static int guc_hwconfig_fill_buffer(struct intel_guc *guc, struct intel_hwconfig
static bool has_table(struct drm_i915_private *i915)
{
- if (IS_ALDERLAKE_P(i915) && !IS_ADLP_N(i915))
+ if (IS_ALDERLAKE_P(i915) && !IS_ALDERLAKE_P_N(i915))
return true;
if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55))
return true;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 7aadad5639c3..5ccf452e32bf 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -295,7 +295,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
* ADL-S, otherwise the GuC might attempt to fetch a config table that
* does not exist.
*/
- if (IS_ADLP_N(i915))
+ if (IS_ALDERLAKE_P_N(i915))
p = INTEL_ALDERLAKE_S;
GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all));
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d3a621e5a36b..853687d9e3f8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -586,7 +586,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12)
#define IS_ADLS_RPLS(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
-#define IS_ADLP_N(i915) \
+#define IS_ALDERLAKE_P_N(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
#define IS_RAPTORLAKE_P(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 7601122765b7..5553de469fa0 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -192,7 +192,7 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_XEHPSDV(i915)) {
revids = xehpsdv_revids;
size = ARRAY_SIZE(xehpsdv_revids);
- } else if (IS_ADLP_N(i915)) {
+ } else if (IS_ALDERLAKE_P_N(i915)) {
revids = adlp_n_revids;
size = ARRAY_SIZE(adlp_n_revids);
} else if (IS_RAPTORLAKE_P(i915)) {
--
2.34.1
next prev parent reply other threads:[~2023-07-26 20:08 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-26 20:06 [Intel-gfx] [PATCH v4 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 01/14] drm/i915/hsw: s/HSW/HASWELL for platform/subplatform defines Dnyaneshwar Bhadane
2023-07-31 15:02 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 02/14] drm/i915/bdw: s/BDW/BROADWELL " Dnyaneshwar Bhadane
2023-07-31 15:06 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 03/14] drm/i915/skl: s/SKL/SKYLAKE " Dnyaneshwar Bhadane
2023-07-31 15:09 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 04/14] drm/i915/kbl: s/KBL/KABYLAKE " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 05/14] drm/i915/cfl: s/CFL/COFFEELAKE " Dnyaneshwar Bhadane
2023-07-31 15:16 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 06/14] drm/i915/cml: s/CML/COMETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:17 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 07/14] drm/i915/rkl: s/RKL/ROCKETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:24 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 08/14] drm/i915/jsl: s/JSL/JASPERLAKE " Dnyaneshwar Bhadane
2023-08-01 9:53 ` [Intel-gfx] [Patch v5, " Dnyaneshwar Bhadane
2023-08-01 10:04 ` Dnyaneshwar Bhadane
2023-08-01 11:47 ` [Intel-gfx] [PATCH v5 " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 09/14] drm/i915/tgl: s/TGL/TIGERLAKE " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 10/14] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v2 11/14] drm/i915/rplp: s/ADLP_RPLP/RAPTORLAKE_P for RPLP defines Dnyaneshwar Bhadane
2023-07-31 15:27 ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines Dnyaneshwar Bhadane
2023-07-31 15:49 ` Srivatsa, Anusha
2023-07-26 20:06 ` Dnyaneshwar Bhadane [this message]
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane
2023-07-31 15:53 ` Srivatsa, Anusha
2023-07-26 21:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Replace acronym with full platform name in defines Patchwork
2023-07-31 10:58 ` Jani Nikula
2023-07-26 21:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-07-26 21:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-27 1:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-08-01 13:36 ` [Intel-gfx] [PATCH v4 00/14] " Jani Nikula
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