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From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
	matthew.d.roper@intel.com
Subject: [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines
Date: Thu, 27 Jul 2023 01:36:57 +0530	[thread overview]
Message-ID: <20230726200657.2773903-15-dnyaneshwar.bhadane@intel.com> (raw)
In-Reply-To: <20230726200657.2773903-1-dnyaneshwar.bhadane@intel.com>

Driver refers to the platform Alderlake S as ADLS_RPLS in places
and RAPTORLAKE_S in some.

v2:
- Unrolled wrapper IS_ADLS_GRAPHICS_STEP

v3:
- Replace IS_RAPTORLAKE_S instead of IS_ADLS_RPLS. (Tvrtko/Lucas).
- Remove unused macro IS_ADLS_GRAPHICS/DISPLAY_STEP
- Change the subject 

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c               | 2 +-
 drivers/gpu/drm/i915/i915_drv.h                     | 9 +--------
 drivers/gpu/drm/i915/intel_step.c                   | 2 +-
 4 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 8286e79522d1..dcb272327281 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -858,7 +858,7 @@ void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
 	BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->port_mask) < I915_MAX_PORTS);
 
 	/* Wa_14011765242: adl-s A0,A1 */
-	if (IS_ADLS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
+	if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
 		for_each_pipe(i915, pipe)
 			display_runtime->num_scalers[pipe] = 0;
 	else if (DISPLAY_VER(i915) >= 11) {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 18250fb64bd8..98b103375b7a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -43,7 +43,7 @@ static void uc_expand_default_options(struct intel_uc *uc)
 	}
 
 	/* Intermediate platforms are HuC authentication only */
-	if (IS_ALDERLAKE_S(i915) && !IS_ADLS_RPLS(i915)) {
+	if (IS_ALDERLAKE_S(i915) && !IS_RAPTORLAKE_S(i915)) {
 		i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
 		return;
 	}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 853687d9e3f8..9ddba8a8ab1a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -584,7 +584,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G11)
 #define IS_DG2_G12(i915) \
 	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12)
-#define IS_ADLS_RPLS(i915) \
+#define IS_RAPTORLAKE_S(i915) \
 	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
 #define IS_ALDERLAKE_P_N(i915) \
 	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
@@ -654,13 +654,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 
 
-#define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
-	(IS_ALDERLAKE_S(__i915) && \
-	 IS_DISPLAY_STEP(__i915, since, until))
-
-#define IS_ADLS_GRAPHICS_STEP(__i915, since, until) \
-	(IS_ALDERLAKE_S(__i915) && \
-	 IS_GRAPHICS_STEP(__i915, since, until))
 
 
 #define IS_XEHPSDV_GRAPHICS_STEP(__i915, since, until) \
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 5553de469fa0..c02a6f156a00 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -201,7 +201,7 @@ void intel_step_init(struct drm_i915_private *i915)
 	} else if (IS_ALDERLAKE_P(i915)) {
 		revids = adlp_revids;
 		size = ARRAY_SIZE(adlp_revids);
-	} else if (IS_ADLS_RPLS(i915)) {
+	} else if (IS_RAPTORLAKE_S(i915)) {
 		revids = adls_rpls_revids;
 		size = ARRAY_SIZE(adls_rpls_revids);
 	} else if (IS_ALDERLAKE_S(i915)) {
-- 
2.34.1


  parent reply	other threads:[~2023-07-26 20:07 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-26 20:06 [Intel-gfx] [PATCH v4 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 01/14] drm/i915/hsw: s/HSW/HASWELL for platform/subplatform defines Dnyaneshwar Bhadane
2023-07-31 15:02   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 02/14] drm/i915/bdw: s/BDW/BROADWELL " Dnyaneshwar Bhadane
2023-07-31 15:06   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 03/14] drm/i915/skl: s/SKL/SKYLAKE " Dnyaneshwar Bhadane
2023-07-31 15:09   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 04/14] drm/i915/kbl: s/KBL/KABYLAKE " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v1 05/14] drm/i915/cfl: s/CFL/COFFEELAKE " Dnyaneshwar Bhadane
2023-07-31 15:16   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 06/14] drm/i915/cml: s/CML/COMETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:17   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 07/14] drm/i915/rkl: s/RKL/ROCKETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:24   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 08/14] drm/i915/jsl: s/JSL/JASPERLAKE " Dnyaneshwar Bhadane
2023-08-01  9:53   ` [Intel-gfx] [Patch v5, " Dnyaneshwar Bhadane
2023-08-01 10:04   ` Dnyaneshwar Bhadane
2023-08-01 11:47   ` [Intel-gfx] [PATCH v5 " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 09/14] drm/i915/tgl: s/TGL/TIGERLAKE " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v3 10/14] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v2 11/14] drm/i915/rplp: s/ADLP_RPLP/RAPTORLAKE_P for RPLP defines Dnyaneshwar Bhadane
2023-07-31 15:27   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines Dnyaneshwar Bhadane
2023-07-31 15:49   ` Srivatsa, Anusha
2023-07-26 20:06 ` [Intel-gfx] [PATCH v4 13/14] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines Dnyaneshwar Bhadane
2023-07-26 20:06 ` Dnyaneshwar Bhadane [this message]
2023-07-31 15:53   ` [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines Srivatsa, Anusha
2023-07-26 21:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Replace acronym with full platform name in defines Patchwork
2023-07-31 10:58   ` Jani Nikula
2023-07-26 21:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-07-26 21:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-27  1:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-08-01 13:36 ` [Intel-gfx] [PATCH v4 00/14] " Jani Nikula
  -- strict thread matches above, loose matches on Subject: below --
2023-08-01 13:53 [Intel-gfx] [PATCH v1 " Dnyaneshwar Bhadane
2023-08-01 13:53 ` [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane
2023-07-26 19:33 [Intel-gfx] [PATCH v4 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane

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