[Intel-gfx] [PATCH 0/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Intel-gfx] [PATCH 0/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Jonathan Cavitt]

Align igt_spinner_create_request with the hang_create_request
implementation in selftest_hangcheck.c, since they perform the same
actions.  Additionally, refactor the hangcheck live selftest to use
igt_spinner functions and structures instead of those internally
declared for the same reason.

v2:
- Refactor hangcheck selftest to use igt_spinner.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
CC: Chris Wilson <chris.p.wilson@linux.intel.com>
CC: Saurabhg Gupta <saurabhg.gupta@intel.com>
CC: Andi Shyti <andi.shyti@intel.com>
CC: Stuart Summers <stuart.summers@intel.com>
CC: Nirmoy Das <nirmoy.das@intel.com>
CC: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
CC: Michal Winiarski <michal.winiarski@intel.com>
CC: Matt Roper <matthew.d.roper@intel.com>

Jonathan Cavitt (2):
  drm/i915/selftests: Align igt_spinner_create_request with hangcheck
  drm/i915/gt: Refactor hangcheck selftest to use igt_spinner

 drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 457 ++++++-------------
 drivers/gpu/drm/i915/selftests/igt_spinner.c |  18 +-
 drivers/gpu/drm/i915/selftests/igt_spinner.h |   9 +
 3 files changed, 158 insertions(+), 326 deletions(-)

-- 
2.25.1

[Intel-gfx] [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Jonathan Cavitt]

Align igt_spinner_create_request with the hang_create_request
implementation in selftest_hangcheck.c.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
 drivers/gpu/drm/i915/selftests/igt_spinner.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 0f064930ef11..8c3e1f20e5a1 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -179,6 +179,9 @@ igt_spinner_create_request(struct igt_spinner *spin,
 
 	*batch++ = arbitration_command;
 
+	memset32(batch, MI_NOOP, 128);
+	batch += 128;
+
 	if (GRAPHICS_VER(rq->i915) >= 8)
 		*batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1;
 	else if (IS_HASWELL(rq->i915))
-- 
2.25.1

Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Matt Roper]

On Tue, Aug 15, 2023 at 09:53:44AM -0700, Jonathan Cavitt wrote:
> Align igt_spinner_create_request with the hang_create_request
> implementation in selftest_hangcheck.c.
> 
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>


For the second patch in the series, the general direction looks good to
me, but I'm not familiar enough with the spinner implementation and
context handling to do a detailed review there.  Hopefully someone more
familiar with that code can take a look.


Matt

> ---
>  drivers/gpu/drm/i915/selftests/igt_spinner.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 0f064930ef11..8c3e1f20e5a1 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -179,6 +179,9 @@ igt_spinner_create_request(struct igt_spinner *spin,
>  
>  	*batch++ = arbitration_command;
>  
> +	memset32(batch, MI_NOOP, 128);
> +	batch += 128;
> +
>  	if (GRAPHICS_VER(rq->i915) >= 8)
>  		*batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1;
>  	else if (IS_HASWELL(rq->i915))
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Cavitt, Jonathan]

-----Original Message-----
From: Roper, Matthew D <matthew.d.roper@intel.com> 
Sent: Tuesday, August 15, 2023 12:29 PM
To: Cavitt, Jonathan <jonathan.cavitt@intel.com>
Cc: intel-gfx@lists.freedesktop.org; Dutt, Sudeep <sudeep.dutt@intel.com>; chris.p.wilson@linux.intel.com; Gupta, saurabhg <saurabhg.gupta@intel.com>; Shyti, Andi <andi.shyti@intel.com>; Summers, Stuart <stuart.summers@intel.com>; Das, Nirmoy <nirmoy.das@intel.com>; Belgaumkar, Vinay <vinay.belgaumkar@intel.com>; Winiarski, Michal <michal.winiarski@intel.com>
Subject: Re: [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck
> 
> On Tue, Aug 15, 2023 at 09:53:44AM -0700, Jonathan Cavitt wrote:
> > Align igt_spinner_create_request with the hang_create_request
> > implementation in selftest_hangcheck.c.
> > 
> > Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> 
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> 
> 
> For the second patch in the series, the general direction looks good to
> me, but I'm not familiar enough with the spinner implementation and
> context handling to do a detailed review there.  Hopefully someone more
> familiar with that code can take a look.
> 


Thank you for the RB!  If it's not too much trouble, could you please push
this patch (independent of the rest of the series) upstream?  Sudeep would
like to see this patch upstreamed as soon as possible to get MTL prepared
for PV.  I figured I'd ask you first since you provided the RB.

Of course, if you're busy, that's understandable as well.
-Jonathan Cavitt


> 
> Matt
> 
> > ---
> >  drivers/gpu/drm/i915/selftests/igt_spinner.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > index 0f064930ef11..8c3e1f20e5a1 100644
> > --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > @@ -179,6 +179,9 @@ igt_spinner_create_request(struct igt_spinner *spin,
> >  
> >  	*batch++ = arbitration_command;
> >  
> > +	memset32(batch, MI_NOOP, 128);
> > +	batch += 128;
> > +
> >  	if (GRAPHICS_VER(rq->i915) >= 8)
> >  		*batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1;
> >  	else if (IS_HASWELL(rq->i915))
> > -- 
> > 2.25.1
> > 
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
> 

Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Matt Roper]

On Wed, Aug 16, 2023 at 01:33:29PM -0700, Cavitt, Jonathan wrote:
> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com> 
> Sent: Tuesday, August 15, 2023 12:29 PM
> To: Cavitt, Jonathan <jonathan.cavitt@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Dutt, Sudeep <sudeep.dutt@intel.com>; chris.p.wilson@linux.intel.com; Gupta, saurabhg <saurabhg.gupta@intel.com>; Shyti, Andi <andi.shyti@intel.com>; Summers, Stuart <stuart.summers@intel.com>; Das, Nirmoy <nirmoy.das@intel.com>; Belgaumkar, Vinay <vinay.belgaumkar@intel.com>; Winiarski, Michal <michal.winiarski@intel.com>
> Subject: Re: [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck
> > 
> > On Tue, Aug 15, 2023 at 09:53:44AM -0700, Jonathan Cavitt wrote:
> > > Align igt_spinner_create_request with the hang_create_request
> > > implementation in selftest_hangcheck.c.
> > > 
> > > Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> > 
> > Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> > 
> > 
> > For the second patch in the series, the general direction looks good to
> > me, but I'm not familiar enough with the spinner implementation and
> > context handling to do a detailed review there.  Hopefully someone more
> > familiar with that code can take a look.
> > 
> 
> 
> Thank you for the RB!  If it's not too much trouble, could you please push
> this patch (independent of the rest of the series) upstream?  Sudeep would
> like to see this patch upstreamed as soon as possible to get MTL prepared
> for PV.  I figured I'd ask you first since you provided the RB.
> 
> Of course, if you're busy, that's understandable as well.

Since you'd previously sent this patch by itself, I used the CI results
from that submission, which were clean aside from false positive hits of
fdo#9121.

Applied to drm-intel-gt-next.  Thanks for the patch.


Matt


> -Jonathan Cavitt
> 
> 
> > 
> > Matt
> > 
> > > ---
> > >  drivers/gpu/drm/i915/selftests/igt_spinner.c | 3 +++
> > >  1 file changed, 3 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > > index 0f064930ef11..8c3e1f20e5a1 100644
> > > --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > > +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > > @@ -179,6 +179,9 @@ igt_spinner_create_request(struct igt_spinner *spin,
> > >  
> > >  	*batch++ = arbitration_command;
> > >  
> > > +	memset32(batch, MI_NOOP, 128);
> > > +	batch += 128;
> > > +
> > >  	if (GRAPHICS_VER(rq->i915) >= 8)
> > >  		*batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1;
> > >  	else if (IS_HASWELL(rq->i915))
> > > -- 
> > > 2.25.1
> > > 
> > 
> > -- 
> > Matt Roper
> > Graphics Software Engineer
> > Linux GPU Platform Enablement
> > Intel Corporation
> > 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Andi Shyti]

Hi Jonathan,

On Tue, Aug 15, 2023 at 09:53:44AM -0700, Jonathan Cavitt wrote:
> Align igt_spinner_create_request with the hang_create_request
> implementation in selftest_hangcheck.c.
> 
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>

Acked-by: Andi Shyti <andi.shyti@linux.intel.com> 

Andi

> ---
>  drivers/gpu/drm/i915/selftests/igt_spinner.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 0f064930ef11..8c3e1f20e5a1 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -179,6 +179,9 @@ igt_spinner_create_request(struct igt_spinner *spin,
>  
>  	*batch++ = arbitration_command;
>  
> +	memset32(batch, MI_NOOP, 128);
> +	batch += 128;
> +
>  	if (GRAPHICS_VER(rq->i915) >= 8)
>  		*batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1;
>  	else if (IS_HASWELL(rq->i915))
> -- 
> 2.25.1

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Refactor hangcheck selftest to use igt_spinner

[Jonathan Cavitt]

The hangcheck live selftest contains duplicate declarations of some
functions that already exist in igt_spinner.c, such as the creation and
deconstruction of a spinning batch buffer (spinner) that hangs an engine.
It's undesireable to have such code duplicated, as the requirements for
the spinner may change with hardware updates, necessitating both
execution paths be updated.  To avoid this, have the hangcheck live
selftest use the declaration from igt_spinner.  This eliminates the need
for the declarations in the selftest itself, as well as the associated
local helper structures, so we can erase those.

Suggested-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 457 ++++++-------------
 drivers/gpu/drm/i915/selftests/igt_spinner.c |  15 +-
 drivers/gpu/drm/i915/selftests/igt_spinner.h |   9 +
 3 files changed, 155 insertions(+), 326 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 0dd4d00ee894..36376a4ade8e 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -29,281 +29,40 @@
 
 #define IGT_IDLE_TIMEOUT 50 /* ms; time to wait after flushing between tests */
 
-struct hang {
-	struct intel_gt *gt;
-	struct drm_i915_gem_object *hws;
-	struct drm_i915_gem_object *obj;
-	struct i915_gem_context *ctx;
-	u32 *seqno;
-	u32 *batch;
-};
-
-static int hang_init(struct hang *h, struct intel_gt *gt)
-{
-	void *vaddr;
-	int err;
-
-	memset(h, 0, sizeof(*h));
-	h->gt = gt;
-
-	h->ctx = kernel_context(gt->i915, NULL);
-	if (IS_ERR(h->ctx))
-		return PTR_ERR(h->ctx);
-
-	GEM_BUG_ON(i915_gem_context_is_bannable(h->ctx));
-
-	h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
-	if (IS_ERR(h->hws)) {
-		err = PTR_ERR(h->hws);
-		goto err_ctx;
-	}
-
-	h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
-	if (IS_ERR(h->obj)) {
-		err = PTR_ERR(h->obj);
-		goto err_hws;
-	}
-
-	i915_gem_object_set_cache_coherency(h->hws, I915_CACHE_LLC);
-	vaddr = i915_gem_object_pin_map_unlocked(h->hws, I915_MAP_WB);
-	if (IS_ERR(vaddr)) {
-		err = PTR_ERR(vaddr);
-		goto err_obj;
-	}
-	h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
-
-	vaddr = i915_gem_object_pin_map_unlocked(h->obj,
-						 intel_gt_coherent_map_type(gt, h->obj, false));
-	if (IS_ERR(vaddr)) {
-		err = PTR_ERR(vaddr);
-		goto err_unpin_hws;
-	}
-	h->batch = vaddr;
-
-	return 0;
-
-err_unpin_hws:
-	i915_gem_object_unpin_map(h->hws);
-err_obj:
-	i915_gem_object_put(h->obj);
-err_hws:
-	i915_gem_object_put(h->hws);
-err_ctx:
-	kernel_context_close(h->ctx);
-	return err;
-}
-
-static u64 hws_address(const struct i915_vma *hws,
-		       const struct i915_request *rq)
-{
-	return i915_vma_offset(hws) +
-	       offset_in_page(sizeof(u32) * rq->fence.context);
-}
-
-static struct i915_request *
-hang_create_request(struct hang *h, struct intel_engine_cs *engine)
-{
-	struct intel_gt *gt = h->gt;
-	struct i915_address_space *vm = i915_gem_context_get_eb_vm(h->ctx);
-	struct drm_i915_gem_object *obj;
-	struct i915_request *rq = NULL;
-	struct i915_vma *hws, *vma;
-	unsigned int flags;
-	void *vaddr;
-	u32 *batch;
-	int err;
-
-	obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
-	if (IS_ERR(obj)) {
-		i915_vm_put(vm);
-		return ERR_CAST(obj);
-	}
-
-	vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false));
-	if (IS_ERR(vaddr)) {
-		i915_gem_object_put(obj);
-		i915_vm_put(vm);
-		return ERR_CAST(vaddr);
-	}
-
-	i915_gem_object_unpin_map(h->obj);
-	i915_gem_object_put(h->obj);
-
-	h->obj = obj;
-	h->batch = vaddr;
-
-	vma = i915_vma_instance(h->obj, vm, NULL);
-	if (IS_ERR(vma)) {
-		i915_vm_put(vm);
-		return ERR_CAST(vma);
-	}
-
-	hws = i915_vma_instance(h->hws, vm, NULL);
-	if (IS_ERR(hws)) {
-		i915_vm_put(vm);
-		return ERR_CAST(hws);
-	}
-
-	err = i915_vma_pin(vma, 0, 0, PIN_USER);
-	if (err) {
-		i915_vm_put(vm);
-		return ERR_PTR(err);
-	}
-
-	err = i915_vma_pin(hws, 0, 0, PIN_USER);
-	if (err)
-		goto unpin_vma;
-
-	rq = igt_request_alloc(h->ctx, engine);
-	if (IS_ERR(rq)) {
-		err = PTR_ERR(rq);
-		goto unpin_hws;
-	}
-
-	err = igt_vma_move_to_active_unlocked(vma, rq, 0);
-	if (err)
-		goto cancel_rq;
-
-	err = igt_vma_move_to_active_unlocked(hws, rq, 0);
-	if (err)
-		goto cancel_rq;
-
-	batch = h->batch;
-	if (GRAPHICS_VER(gt->i915) >= 8) {
-		*batch++ = MI_STORE_DWORD_IMM_GEN4;
-		*batch++ = lower_32_bits(hws_address(hws, rq));
-		*batch++ = upper_32_bits(hws_address(hws, rq));
-		*batch++ = rq->fence.seqno;
-		*batch++ = MI_NOOP;
-
-		memset(batch, 0, 1024);
-		batch += 1024 / sizeof(*batch);
-
-		*batch++ = MI_NOOP;
-		*batch++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
-		*batch++ = lower_32_bits(i915_vma_offset(vma));
-		*batch++ = upper_32_bits(i915_vma_offset(vma));
-	} else if (GRAPHICS_VER(gt->i915) >= 6) {
-		*batch++ = MI_STORE_DWORD_IMM_GEN4;
-		*batch++ = 0;
-		*batch++ = lower_32_bits(hws_address(hws, rq));
-		*batch++ = rq->fence.seqno;
-		*batch++ = MI_NOOP;
-
-		memset(batch, 0, 1024);
-		batch += 1024 / sizeof(*batch);
-
-		*batch++ = MI_NOOP;
-		*batch++ = MI_BATCH_BUFFER_START | 1 << 8;
-		*batch++ = lower_32_bits(i915_vma_offset(vma));
-	} else if (GRAPHICS_VER(gt->i915) >= 4) {
-		*batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
-		*batch++ = 0;
-		*batch++ = lower_32_bits(hws_address(hws, rq));
-		*batch++ = rq->fence.seqno;
-		*batch++ = MI_NOOP;
-
-		memset(batch, 0, 1024);
-		batch += 1024 / sizeof(*batch);
-
-		*batch++ = MI_NOOP;
-		*batch++ = MI_BATCH_BUFFER_START | 2 << 6;
-		*batch++ = lower_32_bits(i915_vma_offset(vma));
-	} else {
-		*batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
-		*batch++ = lower_32_bits(hws_address(hws, rq));
-		*batch++ = rq->fence.seqno;
-		*batch++ = MI_NOOP;
-
-		memset(batch, 0, 1024);
-		batch += 1024 / sizeof(*batch);
-
-		*batch++ = MI_NOOP;
-		*batch++ = MI_BATCH_BUFFER_START | 2 << 6;
-		*batch++ = lower_32_bits(i915_vma_offset(vma));
-	}
-	*batch++ = MI_BATCH_BUFFER_END; /* not reached */
-	intel_gt_chipset_flush(engine->gt);
-
-	if (rq->engine->emit_init_breadcrumb) {
-		err = rq->engine->emit_init_breadcrumb(rq);
-		if (err)
-			goto cancel_rq;
-	}
-
-	flags = 0;
-	if (GRAPHICS_VER(gt->i915) <= 5)
-		flags |= I915_DISPATCH_SECURE;
-
-	err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags);
-
-cancel_rq:
-	if (err) {
-		i915_request_set_error_once(rq, err);
-		i915_request_add(rq);
-	}
-unpin_hws:
-	i915_vma_unpin(hws);
-unpin_vma:
-	i915_vma_unpin(vma);
-	i915_vm_put(vm);
-	return err ? ERR_PTR(err) : rq;
-}
-
-static u32 hws_seqno(const struct hang *h, const struct i915_request *rq)
-{
-	return READ_ONCE(h->seqno[rq->fence.context % (PAGE_SIZE/sizeof(u32))]);
-}
-
-static void hang_fini(struct hang *h)
-{
-	*h->batch = MI_BATCH_BUFFER_END;
-	intel_gt_chipset_flush(h->gt);
-
-	i915_gem_object_unpin_map(h->obj);
-	i915_gem_object_put(h->obj);
-
-	i915_gem_object_unpin_map(h->hws);
-	i915_gem_object_put(h->hws);
-
-	kernel_context_close(h->ctx);
-
-	igt_flush_test(h->gt->i915);
-}
-
-static bool wait_until_running(struct hang *h, struct i915_request *rq)
-{
-	return !(wait_for_us(i915_seqno_passed(hws_seqno(h, rq),
-					       rq->fence.seqno),
-			     10) &&
-		 wait_for(i915_seqno_passed(hws_seqno(h, rq),
-					    rq->fence.seqno),
-			  1000));
-}
-
 static int igt_hang_sanitycheck(void *arg)
 {
 	struct intel_gt *gt = arg;
 	struct i915_request *rq;
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
-	struct hang h;
+	struct igt_spinner spin;
 	int err;
 
 	/* Basic check that we can execute our hanging batch */
 
-	err = hang_init(&h, gt);
+	err = igt_spinner_init(&spin, gt);
 	if (err)
 		return err;
 
 	for_each_engine(engine, gt, id) {
 		struct intel_wedge_me w;
+		struct intel_context *ce;
 		long timeout;
 
 		if (!intel_engine_can_store_dword(engine))
 			continue;
 
-		rq = hang_create_request(&h, engine);
+		ce = intel_context_create(engine);
+		if (IS_ERR(ce)) {
+			err = PTR_ERR(ce);
+			pr_err("Failed to create context for %s, err=%d\n",
+			       engine->name, err);
+			goto fini;
+		}
+
+		rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+		intel_context_put(ce);
+
 		if (IS_ERR(rq)) {
 			err = PTR_ERR(rq);
 			pr_err("Failed to create request for %s, err=%d\n",
@@ -312,10 +71,7 @@ static int igt_hang_sanitycheck(void *arg)
 		}
 
 		i915_request_get(rq);
-
-		*h.batch = MI_BATCH_BUFFER_END;
-		intel_gt_chipset_flush(engine->gt);
-
+		igt_spinner_end(&spin);
 		i915_request_add(rq);
 
 		timeout = 0;
@@ -336,7 +92,7 @@ static int igt_hang_sanitycheck(void *arg)
 	}
 
 fini:
-	hang_fini(&h);
+	igt_spinner_fini(&spin);
 	return err;
 }
 
@@ -686,7 +442,7 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
 	struct i915_gpu_error *global = &gt->i915->gpu_error;
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
-	struct hang h;
+	struct igt_spinner spin;
 	int err = 0;
 
 	/* Check that we can issue an engine reset on an idle engine (no-op) */
@@ -695,7 +451,7 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
 		return 0;
 
 	if (active) {
-		err = hang_init(&h, gt);
+		err = igt_spinner_init(&spin, gt);
 		if (err)
 			return err;
 	}
@@ -739,7 +495,17 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
 			}
 
 			if (active) {
-				rq = hang_create_request(&h, engine);
+				struct intel_context *ce = intel_context_create(engine);
+				if (IS_ERR(ce)) {
+					err = PTR_ERR(ce);
+					pr_err("[%s] Create context failed: %d!\n",
+					       engine->name, err);
+					goto restore;
+				}
+
+				rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+				intel_context_put(ce);
+
 				if (IS_ERR(rq)) {
 					err = PTR_ERR(rq);
 					pr_err("[%s] Create hang request failed: %d!\n",
@@ -750,11 +516,11 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
 				i915_request_get(rq);
 				i915_request_add(rq);
 
-				if (!wait_until_running(&h, rq)) {
+				if (!igt_wait_for_spinner(&spin, rq)) {
 					struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
 
 					pr_err("%s: Failed to start request %llx, at %x\n",
-					       __func__, rq->fence.seqno, hws_seqno(&h, rq));
+					       __func__, rq->fence.seqno, hws_seqno(&spin, rq));
 					intel_engine_dump(engine, &p,
 							  "%s\n", engine->name);
 
@@ -835,7 +601,7 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
 	}
 
 	if (active)
-		hang_fini(&h);
+		igt_spinner_fini(&spin);
 
 	return err;
 }
@@ -967,7 +733,7 @@ static int __igt_reset_engines(struct intel_gt *gt,
 	struct intel_engine_cs *engine, *other;
 	struct active_engine *threads;
 	enum intel_engine_id id, tmp;
-	struct hang h;
+	struct igt_spinner spin;
 	int err = 0;
 
 	/* Check that issuing a reset on one engine does not interfere
@@ -978,12 +744,9 @@ static int __igt_reset_engines(struct intel_gt *gt,
 		return 0;
 
 	if (flags & TEST_ACTIVE) {
-		err = hang_init(&h, gt);
+		err = igt_spinner_init(&spin, gt);
 		if (err)
 			return err;
-
-		if (flags & TEST_PRIORITY)
-			h.ctx->sched.priority = 1024;
 	}
 
 	threads = kmalloc_array(I915_NUM_ENGINES, sizeof(*threads), GFP_KERNEL);
@@ -1057,7 +820,20 @@ static int __igt_reset_engines(struct intel_gt *gt,
 			}
 
 			if (flags & TEST_ACTIVE) {
-				rq = hang_create_request(&h, engine);
+				struct intel_context *ce = intel_context_create(engine);
+				if (IS_ERR(ce)) {
+					err = PTR_ERR(ce);
+					pr_err("[%s] Create context failed: %d!\n",
+					       engine->name, err);
+					goto restore;
+				}
+
+				if (flags && TEST_PRIORITY)
+					ce->gem_context->sched.priority = 1024;
+
+				rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+				intel_context_put(ce);
+
 				if (IS_ERR(rq)) {
 					err = PTR_ERR(rq);
 					pr_err("[%s] Create hang request failed: %d!\n",
@@ -1068,11 +844,11 @@ static int __igt_reset_engines(struct intel_gt *gt,
 				i915_request_get(rq);
 				i915_request_add(rq);
 
-				if (!wait_until_running(&h, rq)) {
+				if (!igt_wait_for_spinner(&spin, rq)) {
 					struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
 
 					pr_err("%s: Failed to start request %llx, at %x\n",
-					       __func__, rq->fence.seqno, hws_seqno(&h, rq));
+					       __func__, rq->fence.seqno, hws_seqno(&spin, rq));
 					intel_engine_dump(engine, &p,
 							  "%s\n", engine->name);
 
@@ -1240,7 +1016,7 @@ static int __igt_reset_engines(struct intel_gt *gt,
 		err = -EIO;
 
 	if (flags & TEST_ACTIVE)
-		hang_fini(&h);
+		igt_spinner_fini(&spin);
 
 	return err;
 }
@@ -1299,7 +1075,8 @@ static int igt_reset_wait(void *arg)
 	struct intel_engine_cs *engine;
 	struct i915_request *rq;
 	unsigned int reset_count;
-	struct hang h;
+	struct igt_spinner spin;
+	struct intel_context *ce;
 	long timeout;
 	int err;
 
@@ -1312,13 +1089,22 @@ static int igt_reset_wait(void *arg)
 
 	igt_global_reset_lock(gt);
 
-	err = hang_init(&h, gt);
+	err = igt_spinner_init(&spin, gt);
 	if (err) {
-		pr_err("[%s] Hang init failed: %d!\n", engine->name, err);
+		pr_err("[%s] Spinner init failed: %d!\n", engine->name, err);
 		goto unlock;
 	}
 
-	rq = hang_create_request(&h, engine);
+	ce = intel_context_create(engine);
+	if (IS_ERR(ce)) {
+		err = PTR_ERR(ce);
+		pr_err("[%s] Create context failed: %d!\n", engine->name, err);
+		goto fini;
+	}
+
+	rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+	intel_context_put(ce);
+
 	if (IS_ERR(rq)) {
 		err = PTR_ERR(rq);
 		pr_err("[%s] Create hang request failed: %d!\n", engine->name, err);
@@ -1328,11 +1114,11 @@ static int igt_reset_wait(void *arg)
 	i915_request_get(rq);
 	i915_request_add(rq);
 
-	if (!wait_until_running(&h, rq)) {
+	if (!igt_wait_for_spinner(&spin, rq)) {
 		struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
 
 		pr_err("%s: Failed to start request %llx, at %x\n",
-		       __func__, rq->fence.seqno, hws_seqno(&h, rq));
+		       __func__, rq->fence.seqno, hws_seqno(&spin, rq));
 		intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
 
 		intel_gt_set_wedged(gt);
@@ -1360,7 +1146,7 @@ static int igt_reset_wait(void *arg)
 out_rq:
 	i915_request_put(rq);
 fini:
-	hang_fini(&h);
+	igt_spinner_fini(&spin);
 unlock:
 	igt_global_reset_unlock(gt);
 
@@ -1433,7 +1219,8 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 	struct task_struct *tsk = NULL;
 	struct i915_request *rq;
 	struct evict_vma arg;
-	struct hang h;
+	struct igt_spinner spin;
+	struct intel_context *ce;
 	unsigned int pin_flags;
 	int err;
 
@@ -1447,9 +1234,9 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 
 	/* Check that we can recover an unbind stuck on a hanging request */
 
-	err = hang_init(&h, gt);
+	err = igt_spinner_init(&spin, gt);
 	if (err) {
-		pr_err("[%s] Hang init failed: %d!\n", engine->name, err);
+		pr_err("[%s] Spinner init failed: %d!\n", engine->name, err);
 		return err;
 	}
 
@@ -1475,7 +1262,16 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 		goto out_obj;
 	}
 
-	rq = hang_create_request(&h, engine);
+	ce = intel_context_create(engine);
+	if (IS_ERR(ce)) {
+		err = PTR_ERR(ce);
+		pr_err("[%s] Create context failed: %d!\n", engine->name, err);
+		goto out_obj;
+	}
+
+	rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+	intel_context_put(ce);
+
 	if (IS_ERR(rq)) {
 		err = PTR_ERR(rq);
 		pr_err("[%s] Create hang request failed: %d!\n", engine->name, err);
@@ -1517,11 +1313,11 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 	if (err)
 		goto out_rq;
 
-	if (!wait_until_running(&h, rq)) {
+	if (!igt_wait_for_spinner(&spin, rq)) {
 		struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
 
 		pr_err("%s: Failed to start request %llx, at %x\n",
-		       __func__, rq->fence.seqno, hws_seqno(&h, rq));
+		       __func__, rq->fence.seqno, hws_seqno(&spin, rq));
 		intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
 
 		intel_gt_set_wedged(gt);
@@ -1571,7 +1367,7 @@ static int __igt_reset_evict_vma(struct intel_gt *gt,
 out_obj:
 	i915_gem_object_put(obj);
 fini:
-	hang_fini(&h);
+	igt_spinner_fini(&spin);
 	if (intel_gt_is_wedged(gt))
 		return -EIO;
 
@@ -1638,20 +1434,21 @@ static int igt_reset_queue(void *arg)
 	struct i915_gpu_error *global = &gt->i915->gpu_error;
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
-	struct hang h;
+	struct igt_spinner spin;
 	int err;
 
 	/* Check that we replay pending requests following a hang */
 
 	igt_global_reset_lock(gt);
 
-	err = hang_init(&h, gt);
+	err = igt_spinner_init(&spin, gt);
 	if (err)
 		goto unlock;
 
 	for_each_engine(engine, gt, id) {
 		struct intel_selftest_saved_policy saved;
 		struct i915_request *prev;
+		struct intel_context *ce;
 		IGT_TIMEOUT(end_time);
 		unsigned int count;
 		bool using_guc = intel_engine_uses_guc(engine);
@@ -1668,7 +1465,16 @@ static int igt_reset_queue(void *arg)
 			}
 		}
 
-		prev = hang_create_request(&h, engine);
+		ce = intel_context_create(engine);
+		if (IS_ERR(ce)) {
+			err = PTR_ERR(ce);
+			pr_err("[%s] Create 'prev' context failed: %d!\n", engine->name, err);
+			goto restore;
+		}
+
+		prev = igt_spinner_create_request(&spin, ce, MI_NOOP);
+		intel_context_put(ce);
+
 		if (IS_ERR(prev)) {
 			err = PTR_ERR(prev);
 			pr_err("[%s] Create 'prev' hang request failed: %d!\n", engine->name, err);
@@ -1682,8 +1488,17 @@ static int igt_reset_queue(void *arg)
 		do {
 			struct i915_request *rq;
 			unsigned int reset_count;
+			
+			ce = intel_context_create(engine);
+			if (IS_ERR(ce)) {
+				err = PTR_ERR(ce);
+				pr_err("[%s] Create context failed: %d!\n", engine->name, err);
+				goto restore;
+			}
+
+			rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+			intel_context_put(ce);
 
-			rq = hang_create_request(&h, engine);
 			if (IS_ERR(rq)) {
 				err = PTR_ERR(rq);
 				pr_err("[%s] Create hang request failed: %d!\n", engine->name, err);
@@ -1715,12 +1530,12 @@ static int igt_reset_queue(void *arg)
 				goto restore;
 			}
 
-			if (!wait_until_running(&h, prev)) {
+			if (!igt_wait_for_spinner(&spin, prev)) {
 				struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
 
 				pr_err("%s(%s): Failed to start request %llx, at %x\n",
 				       __func__, engine->name,
-				       prev->fence.seqno, hws_seqno(&h, prev));
+				       prev->fence.seqno, hws_seqno(&spin, prev));
 				intel_engine_dump(engine, &p,
 						  "%s\n", engine->name);
 
@@ -1768,9 +1583,7 @@ static int igt_reset_queue(void *arg)
 		pr_info("%s: Completed %d queued resets\n",
 			engine->name, count);
 
-		*h.batch = MI_BATCH_BUFFER_END;
-		intel_gt_chipset_flush(engine->gt);
-
+		igt_spinner_end(&spin);
 		i915_request_put(prev);
 
 restore:
@@ -1794,7 +1607,7 @@ static int igt_reset_queue(void *arg)
 	}
 
 fini:
-	hang_fini(&h);
+	igt_spinner_fini(&spin);
 unlock:
 	igt_global_reset_unlock(gt);
 
@@ -1809,7 +1622,8 @@ static int igt_handle_error(void *arg)
 	struct intel_gt *gt = arg;
 	struct i915_gpu_error *global = &gt->i915->gpu_error;
 	struct intel_engine_cs *engine;
-	struct hang h;
+	struct igt_spinner spin;
+	struct intel_context *ce;
 	struct i915_request *rq;
 	struct i915_gpu_coredump *error;
 	int err;
@@ -1824,13 +1638,22 @@ static int igt_handle_error(void *arg)
 	if (!engine || !intel_engine_can_store_dword(engine))
 		return 0;
 
-	err = hang_init(&h, gt);
+	err = igt_spinner_init(&spin, gt);
 	if (err) {
-		pr_err("[%s] Hang init failed: %d!\n", engine->name, err);
+		pr_err("[%s] Spinner init failed: %d!\n", engine->name, err);
 		return err;
 	}
 
-	rq = hang_create_request(&h, engine);
+	ce = intel_context_create(engine);
+	if (IS_ERR(ce)) {
+		err = PTR_ERR(ce);
+		pr_err("[%s] Create context failed: %d!\n", engine->name, err);
+		goto err_fini;
+	}
+
+	rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+	intel_context_put(ce);
+
 	if (IS_ERR(rq)) {
 		err = PTR_ERR(rq);
 		pr_err("[%s] Create hang request failed: %d!\n", engine->name, err);
@@ -1840,11 +1663,11 @@ static int igt_handle_error(void *arg)
 	i915_request_get(rq);
 	i915_request_add(rq);
 
-	if (!wait_until_running(&h, rq)) {
+	if (!igt_wait_for_spinner(&spin, rq)) {
 		struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
 
 		pr_err("%s: Failed to start request %llx, at %x\n",
-		       __func__, rq->fence.seqno, hws_seqno(&h, rq));
+		       __func__, rq->fence.seqno, hws_seqno(&spin, rq));
 		intel_engine_dump(rq->engine, &p, "%s\n", rq->engine->name);
 
 		intel_gt_set_wedged(gt);
@@ -1869,7 +1692,7 @@ static int igt_handle_error(void *arg)
 err_request:
 	i915_request_put(rq);
 err_fini:
-	hang_fini(&h);
+	igt_spinner_fini(&spin);
 	return err;
 }
 
@@ -1910,20 +1733,30 @@ static int igt_atomic_reset_engine(struct intel_engine_cs *engine,
 				   const struct igt_atomic_section *p)
 {
 	struct i915_request *rq;
-	struct hang h;
+	struct igt_spinner spin;
+	struct intel_context *ce;
 	int err;
 
 	err = __igt_atomic_reset_engine(engine, p, "idle");
 	if (err)
 		return err;
 
-	err = hang_init(&h, engine->gt);
+	err = igt_spinner_init(&spin, engine->gt);
 	if (err) {
 		pr_err("[%s] Hang init failed: %d!\n", engine->name, err);
 		return err;
 	}
 
-	rq = hang_create_request(&h, engine);
+	ce = intel_context_create(engine);
+	if (IS_ERR(ce)) {
+		err = PTR_ERR(ce);
+		pr_err("[%s] Create context failed: %d!\n", engine->name, err);
+		goto out;
+	}
+
+	rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+	intel_context_put(ce);
+
 	if (IS_ERR(rq)) {
 		err = PTR_ERR(rq);
 		pr_err("[%s] Create hang request failed: %d!\n", engine->name, err);
@@ -1933,12 +1766,12 @@ static int igt_atomic_reset_engine(struct intel_engine_cs *engine,
 	i915_request_get(rq);
 	i915_request_add(rq);
 
-	if (wait_until_running(&h, rq)) {
+	if (igt_wait_for_spinner(&spin, rq)) {
 		err = __igt_atomic_reset_engine(engine, p, "active");
 	} else {
 		pr_err("%s(%s): Failed to start request %llx, at %x\n",
 		       __func__, engine->name,
-		       rq->fence.seqno, hws_seqno(&h, rq));
+		       rq->fence.seqno, hws_seqno(&spin, rq));
 		intel_gt_set_wedged(engine->gt);
 		err = -EIO;
 	}
@@ -1954,7 +1787,7 @@ static int igt_atomic_reset_engine(struct intel_engine_cs *engine,
 
 	i915_request_put(rq);
 out:
-	hang_fini(&h);
+	igt_spinner_fini(&spin);
 	return err;
 }
 
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 8c3e1f20e5a1..fc4f33076ec7 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -108,15 +108,10 @@ int igt_spinner_pin(struct igt_spinner *spin,
 	return 0;
 }
 
-static unsigned int seqno_offset(u64 fence)
-{
-	return offset_in_page(sizeof(u32) * fence);
-}
-
 static u64 hws_address(const struct i915_vma *hws,
 		       const struct i915_request *rq)
 {
-	return i915_vma_offset(hws) + seqno_offset(rq->fence.context);
+	return i915_vma_offset(hws) + offset_in_page(sizeof(u32) * rq->fence.context);
 }
 
 struct i915_request *
@@ -216,14 +211,6 @@ igt_spinner_create_request(struct igt_spinner *spin,
 	return err ? ERR_PTR(err) : rq;
 }
 
-static u32
-hws_seqno(const struct igt_spinner *spin, const struct i915_request *rq)
-{
-	u32 *seqno = spin->seqno + seqno_offset(rq->fence.context);
-
-	return READ_ONCE(*seqno);
-}
-
 void igt_spinner_end(struct igt_spinner *spin)
 {
 	if (!spin->batch)
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
index fbe5b1625b05..faff1008999a 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
@@ -40,4 +40,13 @@ void igt_spinner_end(struct igt_spinner *spin);
 
 bool igt_wait_for_spinner(struct igt_spinner *spin, struct i915_request *rq);
 
+static inline u32
+hws_seqno(const struct igt_spinner *spin, const struct i915_request *rq)
+{
+	u32 *seqno = spin->seqno + offset_in_page(sizeof(u32) * rq->fence.context);
+
+	return READ_ONCE(*seqno);
+}
+
+
 #endif
-- 
2.25.1

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Align igt_spinner_create_request with hangcheck
URL   : https://patchwork.freedesktop.org/series/122462/
State : warning

== Summary ==

Error: dim checkpatch failed
/home/kbuild2/linux/maintainer-tools/dim: line 50: /home/kbuild2/.dimrc: No such file or directory

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Align igt_spinner_create_request with hangcheck
URL   : https://patchwork.freedesktop.org/series/122462/
State : warning

== Summary ==

Error: dim sparse failed
/home/kbuild/linux/maintainer-tools/dim: line 50: /home/kbuild/.dimrc: No such file or directory

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Align igt_spinner_create_request with hangcheck

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 18409 bytes --]

== Series Details ==

Series: drm/i915/selftests: Align igt_spinner_create_request with hangcheck
URL   : https://patchwork.freedesktop.org/series/122462/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13520 -> Patchwork_122462v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_122462v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_122462v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/index.html

Participating hosts (39 -> 38)
------------------------------

  Additional (1): bat-rpls-2 
  Missing    (2): fi-snb-2520m fi-pnv-d510 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_122462v1:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_busy@busy@all-engines:
    - bat-mtlp-8:         [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-mtlp-8/igt@gem_busy@busy@all-engines.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-mtlp-8/igt@gem_busy@busy@all-engines.html

  * igt@i915_selftest@live@hangcheck:
    - fi-cfl-guc:         [PASS][3] -> [DMESG-FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-cfl-guc/igt@i915_selftest@live@hangcheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-cfl-guc/igt@i915_selftest@live@hangcheck.html
    - bat-jsl-3:          [PASS][5] -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-jsl-3/igt@i915_selftest@live@hangcheck.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-jsl-3/igt@i915_selftest@live@hangcheck.html
    - fi-kbl-x1275:       [PASS][7] -> [DMESG-FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-kbl-x1275/igt@i915_selftest@live@hangcheck.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-kbl-x1275/igt@i915_selftest@live@hangcheck.html
    - fi-hsw-4770:        [PASS][9] -> [ABORT][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
    - fi-cfl-8109u:       [PASS][11] -> [DMESG-FAIL][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-cfl-8109u/igt@i915_selftest@live@hangcheck.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-cfl-8109u/igt@i915_selftest@live@hangcheck.html
    - fi-kbl-8809g:       [PASS][13] -> [DMESG-FAIL][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-kbl-8809g/igt@i915_selftest@live@hangcheck.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-kbl-8809g/igt@i915_selftest@live@hangcheck.html
    - bat-mtlp-8:         [PASS][15] -> [ABORT][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-mtlp-8/igt@i915_selftest@live@hangcheck.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-mtlp-8/igt@i915_selftest@live@hangcheck.html
    - fi-kbl-guc:         [PASS][17] -> [DMESG-FAIL][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-kbl-guc/igt@i915_selftest@live@hangcheck.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-kbl-guc/igt@i915_selftest@live@hangcheck.html
    - bat-jsl-1:          [PASS][19] -> [ABORT][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-jsl-1/igt@i915_selftest@live@hangcheck.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-jsl-1/igt@i915_selftest@live@hangcheck.html
    - fi-tgl-1115g4:      [PASS][21] -> [ABORT][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-tgl-1115g4/igt@i915_selftest@live@hangcheck.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-tgl-1115g4/igt@i915_selftest@live@hangcheck.html
    - bat-mtlp-6:         [PASS][23] -> [ABORT][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-mtlp-6/igt@i915_selftest@live@hangcheck.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-mtlp-6/igt@i915_selftest@live@hangcheck.html
    - fi-skl-6600u:       [PASS][25] -> [ABORT][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-skl-6600u/igt@i915_selftest@live@hangcheck.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-skl-6600u/igt@i915_selftest@live@hangcheck.html
    - fi-apl-guc:         [PASS][27] -> [ABORT][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-apl-guc/igt@i915_selftest@live@hangcheck.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-apl-guc/igt@i915_selftest@live@hangcheck.html
    - bat-dg1-5:          [PASS][29] -> [ABORT][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
    - fi-skl-guc:         [PASS][31] -> [DMESG-FAIL][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
    - fi-cfl-8700k:       [PASS][33] -> [DMESG-FAIL][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-cfl-8700k/igt@i915_selftest@live@hangcheck.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-cfl-8700k/igt@i915_selftest@live@hangcheck.html
    - fi-rkl-11600:       [PASS][35] -> [ABORT][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-rkl-11600/igt@i915_selftest@live@hangcheck.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-rkl-11600/igt@i915_selftest@live@hangcheck.html

  
Known issues
------------

  Here are the changes found in Patchwork_122462v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-rpls-2:         NOTRUN -> [SKIP][37] ([i915#7456])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@debugfs_test@basic-hwmon.html

  * igt@fbdev@info:
    - bat-rpls-2:         NOTRUN -> [SKIP][38] ([i915#1849] / [i915#2582])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@fbdev@info.html

  * igt@fbdev@read:
    - bat-rpls-2:         NOTRUN -> [SKIP][39] ([i915#2582]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@fbdev@read.html

  * igt@gem_lmem_swapping@verify-random:
    - bat-rpls-2:         NOTRUN -> [SKIP][40] ([i915#4613]) +3 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_tiled_pread_basic:
    - bat-rpls-2:         NOTRUN -> [SKIP][41] ([i915#3282])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
    - bat-rpls-2:         NOTRUN -> [SKIP][42] ([i915#7561])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_pm_rps@basic-api:
    - bat-rpls-2:         NOTRUN -> [SKIP][43] ([i915#6621])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@gt_pm:
    - bat-rpls-2:         NOTRUN -> [DMESG-FAIL][44] ([i915#4258] / [i915#7913])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@hangcheck:
    - bat-dg2-9:          [PASS][45] -> [ABORT][46] ([i915#7913])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-dg2-9/igt@i915_selftest@live@hangcheck.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-dg2-9/igt@i915_selftest@live@hangcheck.html
    - fi-ivb-3770:        [PASS][47] -> [ABORT][48] ([i915#7913])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
    - bat-dg2-8:          [PASS][49] -> [ABORT][50] ([i915#7913])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-dg2-8/igt@i915_selftest@live@hangcheck.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-dg2-8/igt@i915_selftest@live@hangcheck.html
    - bat-adlm-1:         [PASS][51] -> [ABORT][52] ([i915#7677])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-adlm-1/igt@i915_selftest@live@hangcheck.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-adlm-1/igt@i915_selftest@live@hangcheck.html
    - fi-bsw-n3050:       [PASS][53] -> [ABORT][54] ([i915#7913])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-bsw-n3050/igt@i915_selftest@live@hangcheck.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-bsw-n3050/igt@i915_selftest@live@hangcheck.html
    - bat-rpls-1:         [PASS][55] -> [ABORT][56] ([i915#7677])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
    - bat-rpls-2:         NOTRUN -> [ABORT][57] ([i915#7677] / [i915#7913])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@i915_selftest@live@hangcheck.html
    - fi-glk-j4005:       [PASS][58] -> [ABORT][59] ([i915#7677])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/fi-glk-j4005/igt@i915_selftest@live@hangcheck.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/fi-glk-j4005/igt@i915_selftest@live@hangcheck.html
    - bat-adlp-9:         [PASS][60] -> [ABORT][61] ([i915#7677] / [i915#7913])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-adlp-9/igt@i915_selftest@live@hangcheck.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-adlp-9/igt@i915_selftest@live@hangcheck.html
    - bat-dg2-11:         [PASS][62] -> [ABORT][63] ([i915#7913])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-dg2-11/igt@i915_selftest@live@hangcheck.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-dg2-11/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@migrate:
    - bat-dg2-11:         [PASS][64] -> [DMESG-WARN][65] ([i915#7699])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-dg2-11/igt@i915_selftest@live@migrate.html

  * igt@kms_busy@basic:
    - bat-rpls-2:         NOTRUN -> [SKIP][66] ([i915#1845]) +15 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@kms_busy@basic.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - bat-rpls-2:         NOTRUN -> [SKIP][67] ([i915#7828]) +7 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - bat-rpls-2:         NOTRUN -> [SKIP][68] ([i915#3637]) +3 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@kms_flip@basic-flip-vs-dpms.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-rpls-2:         NOTRUN -> [SKIP][69] ([fdo#109285])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-rpls-2:         NOTRUN -> [SKIP][70] ([i915#1849])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_psr@primary_mmap_gtt:
    - bat-rplp-1:         NOTRUN -> [SKIP][71] ([i915#1072]) +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html

  * igt@kms_psr@sprite_plane_onoff:
    - bat-rpls-2:         NOTRUN -> [SKIP][72] ([i915#1072]) +3 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-rplp-1:         NOTRUN -> [ABORT][73] ([i915#8260] / [i915#8668])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
    - bat-rpls-2:         NOTRUN -> [SKIP][74] ([i915#3555])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-rpls-2:         NOTRUN -> [SKIP][75] ([fdo#109295] / [i915#1845] / [i915#3708])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-read:
    - bat-rpls-2:         NOTRUN -> [SKIP][76] ([fdo#109295] / [i915#3708]) +2 similar issues
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rpls-2/igt@prime_vgem@basic-fence-read.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_mocs:
    - bat-mtlp-6:         [DMESG-FAIL][77] ([i915#7059]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@migrate:
    - bat-mtlp-8:         [DMESG-FAIL][79] ([i915#7699]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-mtlp-8/igt@i915_selftest@live@migrate.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-mtlp-8/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@requests:
    - bat-mtlp-8:         [DMESG-FAIL][81] ([i915#8497]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-mtlp-8/igt@i915_selftest@live@requests.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-mtlp-8/igt@i915_selftest@live@requests.html

  
#### Warnings ####

  * igt@i915_module_load@load:
    - bat-adlp-11:        [DMESG-WARN][83] ([i915#4423]) -> [ABORT][84] ([i915#4423])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-adlp-11/igt@i915_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-adlp-11/igt@i915_module_load@load.html

  * igt@i915_selftest@live@hangcheck:
    - bat-adls-5:         [DMESG-WARN][85] ([i915#5591]) -> [ABORT][86] ([i915#7913])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-adls-5/igt@i915_selftest@live@hangcheck.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-adls-5/igt@i915_selftest@live@hangcheck.html

  * igt@kms_psr@cursor_plane_move:
    - bat-rplp-1:         [ABORT][87] -> [SKIP][88] ([i915#1072])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13520/bat-rplp-1/igt@kms_psr@cursor_plane_move.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/bat-rplp-1/igt@kms_psr@cursor_plane_move.html

  
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7677]: https://gitlab.freedesktop.org/drm/intel/issues/7677
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
  [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668


Build changes
-------------

  * Linux: CI_DRM_13520 -> Patchwork_122462v1

  CI-20190529: 20190529
  CI_DRM_13520: c0ba192d095f87b77f04e6ae0afcc02f10b7f5e8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7436: 81e08c6d648e949df161a4f39118ed3eb1e354e9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_122462v1: c0ba192d095f87b77f04e6ae0afcc02f10b7f5e8 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

758a2acd974f drm/i915/gt: Refactor hangcheck selftest to use igt_spinner
bf12a56f33cd drm/i915/selftests: Align igt_spinner_create_request with hangcheck

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122462v1/index.html

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