From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 07/12] drm/i915: Relocate is_in_vrr_range()
Date: Fri, 1 Sep 2023 16:04:35 +0300 [thread overview]
Message-ID: <20230901130440.2085-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230901130440.2085-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Move is_in_vrr_range() into intel_vrr.c in anticipation of
more users, and rename it accordingly.
Cc: Manasi Navare <navaremanasi@chromium.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_panel.c | 17 ++++-------------
drivers/gpu/drm/i915/display/intel_vrr.c | 9 +++++++++
drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 9232a305b1e6..086cb8dbe22c 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -59,15 +59,6 @@ intel_panel_preferred_fixed_mode(struct intel_connector *connector)
struct drm_display_mode, head);
}
-static bool is_in_vrr_range(struct intel_connector *connector, int vrefresh)
-{
- const struct drm_display_info *info = &connector->base.display_info;
-
- return intel_vrr_is_capable(connector) &&
- vrefresh >= info->monitor_range.min_vfreq &&
- vrefresh <= info->monitor_range.max_vfreq;
-}
-
static bool is_best_fixed_mode(struct intel_connector *connector,
int vrefresh, int fixed_mode_vrefresh,
const struct drm_display_mode *best_mode)
@@ -81,8 +72,8 @@ static bool is_best_fixed_mode(struct intel_connector *connector,
* vrefresh, which we can then reduce to match the requested
* vrefresh by extending the vblank length.
*/
- if (is_in_vrr_range(connector, vrefresh) &&
- is_in_vrr_range(connector, fixed_mode_vrefresh) &&
+ if (intel_vrr_is_in_range(connector, vrefresh) &&
+ intel_vrr_is_in_range(connector, fixed_mode_vrefresh) &&
fixed_mode_vrefresh < vrefresh)
return false;
@@ -224,8 +215,8 @@ int intel_panel_compute_config(struct intel_connector *connector,
* Assume that we shouldn't muck about with the
* timings if they don't land in the VRR range.
*/
- is_vrr = is_in_vrr_range(connector, vrefresh) &&
- is_in_vrr_range(connector, fixed_mode_vrefresh);
+ is_vrr = intel_vrr_is_in_range(connector, vrefresh) &&
+ intel_vrr_is_in_range(connector, fixed_mode_vrefresh);
if (!is_vrr) {
/*
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 88e4759b538b..6ef782538337 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -42,6 +42,15 @@ bool intel_vrr_is_capable(struct intel_connector *connector)
info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10;
}
+bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh)
+{
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ return intel_vrr_is_capable(connector) &&
+ vrefresh >= info->monitor_range.min_vfreq &&
+ vrefresh <= info->monitor_range.max_vfreq;
+}
+
void
intel_vrr_check_modeset(struct intel_atomic_state *state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index de16960c4929..89937858200d 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -14,6 +14,7 @@ struct intel_connector;
struct intel_crtc_state;
bool intel_vrr_is_capable(struct intel_connector *connector);
+bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh);
void intel_vrr_check_modeset(struct intel_atomic_state *state);
void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
--
2.41.0
next prev parent reply other threads:[~2023-09-01 13:05 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-01 13:04 [Intel-gfx] [PATCH 00/12] drm/i915: VRR, LRR, and M/N stuff Ville Syrjala
2023-09-01 13:04 ` [Intel-gfx] [PATCH 01/12] drm/i915: Move psr unlock out from the pipe update critical section Ville Syrjala
2023-09-07 18:34 ` Manasi Navare
2023-09-11 17:42 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 02/12] drm/i915: Change intel_pipe_update_{start, end}() calling convention Ville Syrjala
2023-09-07 18:36 ` Manasi Navare
2023-09-11 17:53 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 03/12] drm/i915: Extract intel_crtc_vblank_evade_scanlines() Ville Syrjala
2023-09-11 18:18 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 04/12] drm/i915: Enable VRR later during fastsets Ville Syrjala
2023-09-07 18:38 ` Manasi Navare
2023-09-11 18:24 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 05/12] drm/i915: Adjust seamless_m_n flag behaviour Ville Syrjala
2023-09-07 18:39 ` Manasi Navare
2023-09-01 13:04 ` [Intel-gfx] [PATCH 06/12] drm/i915: Optimize out redundant M/N updates Ville Syrjala
2023-09-07 18:40 ` Manasi Navare
2023-09-01 13:04 ` Ville Syrjala [this message]
2023-09-07 18:43 ` [Intel-gfx] [PATCH 07/12] drm/i915: Relocate is_in_vrr_range() Manasi Navare
2023-09-15 5:38 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 08/12] drm/i915: Validate that the timings are within the VRR range Ville Syrjala
2023-09-07 18:44 ` Manasi Navare
2023-09-15 5:39 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 09/12] drm/i915: Disable VRR during seamless M/N changes Ville Syrjala
2023-09-07 18:49 ` Manasi Navare
2023-09-08 5:53 ` Ville Syrjälä
2023-09-08 23:29 ` Manasi Navare
2023-09-11 17:46 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 10/12] drm/i915: Update VRR parameters in fastset Ville Syrjala
2023-09-14 17:05 ` Sean Paul
2023-09-01 13:04 ` [Intel-gfx] [PATCH 11/12] drm/i915: Assert that VRR is off during vblank evasion if necessary Ville Syrjala
2023-09-07 18:49 ` Manasi Navare
2023-09-15 8:34 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 12/12] drm/i915: Implement transcoder LRR for TGL+ Ville Syrjala
2023-09-14 23:21 ` Manasi Navare
2023-09-15 10:23 ` Ville Syrjälä
2023-09-15 10:38 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-09-18 23:16 ` Manasi Navare
2023-09-20 18:47 ` Manasi Navare
2023-09-20 19:40 ` Ville Syrjälä
2023-09-20 20:40 ` Manasi Navare
2023-09-01 16:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: VRR, LRR, and M/N stuff Patchwork
2023-09-01 16:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-01 16:16 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-09-01 18:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: VRR, LRR, and M/N stuff (rev2) Patchwork
2023-09-01 18:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-01 18:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-02 4:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-15 11:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: VRR, LRR, and M/N stuff (rev3) Patchwork
2023-09-15 11:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-15 11:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-09-20 18:54 ` [Intel-gfx] [PATCH 00/12] drm/i915: VRR, LRR, and M/N stuff Manasi Navare
2023-09-20 20:56 ` Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230901130440.2085-8-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox