[Intel-gfx] [PATCH 4/4] drm/i915/gvt: move structs intel_gvt_irq_info and intel_gvt_irq_map to interrupt.c

[Jani Nikula <jani.nikula@intel.com>]

Structs intel_gvt_irq_info and intel_gvt_irq_map are not used outside of
interrupt.c. Hide them, and reduce includes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/gvt/interrupt.c | 17 +++++++++++++++
 drivers/gpu/drm/i915/gvt/interrupt.h | 31 ++++++----------------------
 2 files changed, 23 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c b/drivers/gpu/drm/i915/gvt/interrupt.c
index 68eca023bbc6..de3f5903d1a7 100644
--- a/drivers/gpu/drm/i915/gvt/interrupt.c
+++ b/drivers/gpu/drm/i915/gvt/interrupt.c
@@ -36,6 +36,23 @@
 #include "gvt.h"
 #include "trace.h"
 
+struct intel_gvt_irq_info {
+	char *name;
+	i915_reg_t reg_base;
+	enum intel_gvt_event_type bit_to_event[INTEL_GVT_IRQ_BITWIDTH];
+	unsigned long warned;
+	int group;
+	DECLARE_BITMAP(downstream_irq_bitmap, INTEL_GVT_IRQ_BITWIDTH);
+	bool has_upstream_irq;
+};
+
+struct intel_gvt_irq_map {
+	int up_irq_group;
+	int up_irq_bit;
+	int down_irq_group;
+	u32 down_irq_bitmask;
+};
+
 /* common offset among interrupt control registers */
 #define regbase_to_isr(base)	(base)
 #define regbase_to_imr(base)	(base + 0x4)
diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h b/drivers/gpu/drm/i915/gvt/interrupt.h
index b62f04ab47cb..e60ad476fe60 100644
--- a/drivers/gpu/drm/i915/gvt/interrupt.h
+++ b/drivers/gpu/drm/i915/gvt/interrupt.h
@@ -32,10 +32,13 @@
 #ifndef _GVT_INTERRUPT_H_
 #define _GVT_INTERRUPT_H_
 
-#include <linux/hrtimer.h>
-#include <linux/kernel.h>
+#include <linux/bitops.h>
 
-#include "i915_reg_defs.h"
+struct intel_gvt;
+struct intel_gvt_irq;
+struct intel_gvt_irq_info;
+struct intel_gvt_irq_map;
+struct intel_vgpu;
 
 enum intel_gvt_event_type {
 	RCS_MI_USER_INTERRUPT = 0,
@@ -138,10 +141,6 @@ enum intel_gvt_event_type {
 	INTEL_GVT_EVENT_MAX,
 };
 
-struct intel_gvt_irq;
-struct intel_gvt;
-struct intel_vgpu;
-
 typedef void (*gvt_event_virt_handler_t)(struct intel_gvt_irq *irq,
 	enum intel_gvt_event_type event, struct intel_vgpu *vgpu);
 
@@ -175,17 +174,6 @@ enum intel_gvt_irq_type {
 
 #define INTEL_GVT_IRQ_BITWIDTH	32
 
-/* device specific interrupt bit definitions */
-struct intel_gvt_irq_info {
-	char *name;
-	i915_reg_t reg_base;
-	enum intel_gvt_event_type bit_to_event[INTEL_GVT_IRQ_BITWIDTH];
-	unsigned long warned;
-	int group;
-	DECLARE_BITMAP(downstream_irq_bitmap, INTEL_GVT_IRQ_BITWIDTH);
-	bool has_upstream_irq;
-};
-
 /* per-event information */
 struct intel_gvt_event_info {
 	int bit;				/* map to register bit */
@@ -194,13 +182,6 @@ struct intel_gvt_event_info {
 	gvt_event_virt_handler_t v_handler;	/* for v_event */
 };
 
-struct intel_gvt_irq_map {
-	int up_irq_group;
-	int up_irq_bit;
-	int down_irq_group;
-	u32 down_irq_bitmask;
-};
-
 /* structure containing device specific IRQ state */
 struct intel_gvt_irq {
 	const struct intel_gvt_irq_ops *ops;
-- 
2.39.2