From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: suijingfeng@loongson.cn, jani.nikula@intel.com, mripard@kernel.org
Subject: [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support
Date: Fri, 29 Sep 2023 12:43:14 +0530 [thread overview]
Message-ID: <20230929071322.945521-1-mitulkumar.ajitkumar.golani@intel.com> (raw)
This patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some fixes, followed by patches that
lay groundwork to iterate over valid compressed bpps to select the
'best' compressed bpp with optimal link configuration (taken from
upstream series: https://patchwork.freedesktop.org/series/105200/).
The later patches, add changes to accommodate compressed bpp with
fractional part, including changes to QP calculations.
To get the 'best' compressed bpp, we iterate over the valid compressed
bpp values, but with fractional step size 1/16, 1/8, 1/4 or 1/2 as per
sink support.
The last 2 patches add support to depict DSC sink's fractional support,
and debugfs to enforce use of fractional bpp, while choosing an
appropriate compressed bpp.
Ankit Nautiyal (5):
drm/display/dp: Add helper function to get DSC bpp precision
drm/i915/display: Store compressed bpp in U6.4 format
drm/i915/display: Consider fractional vdsc bpp while computing m_n
values
drm/i915/audio : Consider fractional vdsc bpp while computing tu_data
drm/i915/dp: Iterate over output bpp with fractional step size
Swati Sharma (2):
drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp
drm/i915/dsc: Allow DSC only with fractional bpp when forced from
debugfs
Vandita Kulkarni (1):
drm/i915/dsc/mtl: Add support for fractional bpp
drivers/gpu/drm/display/drm_dp_helper.c | 27 ++++++
drivers/gpu/drm/i915/display/icl_dsi.c | 11 +--
drivers/gpu/drm/i915/display/intel_audio.c | 17 ++--
drivers/gpu/drm/i915/display/intel_bios.c | 6 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +-
drivers/gpu/drm/i915/display/intel_display.c | 8 +-
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
.../drm/i915/display/intel_display_debugfs.c | 84 +++++++++++++++++++
.../drm/i915/display/intel_display_types.h | 4 +-
drivers/gpu/drm/i915/display/intel_dp.c | 81 +++++++++++-------
drivers/gpu/drm/i915/display/intel_dp_mst.c | 32 ++++---
drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
.../i915/display/intel_fractional_helper.h | 36 ++++++++
.../gpu/drm/i915/display/intel_qp_tables.c | 3 -
drivers/gpu/drm/i915/display/intel_vdsc.c | 30 +++++--
include/drm/display/drm_dp_helper.h | 1 +
16 files changed, 276 insertions(+), 74 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_fractional_helper.h
--
2.25.1
next reply other threads:[~2023-09-29 8:17 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-29 7:13 Mitul Golani [this message]
2023-09-29 7:13 ` [Intel-gfx] [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp precision Mitul Golani
2023-09-29 7:13 ` [Intel-gfx] [PATCH 2/8] drm/i915/display: Store compressed bpp in U6.4 format Mitul Golani
2023-09-30 5:41 ` kernel test robot
2023-09-29 7:13 ` [Intel-gfx] [PATCH 3/8] drm/i915/display: Consider fractional vdsc bpp while computing m_n values Mitul Golani
2023-09-29 7:13 ` [Intel-gfx] [PATCH 4/8] drm/i915/audio : Consider fractional vdsc bpp while computing tu_data Mitul Golani
2023-09-29 7:13 ` [Intel-gfx] [PATCH 5/8] drm/i915/dsc/mtl: Add support for fractional bpp Mitul Golani
2023-09-29 7:13 ` [Intel-gfx] [PATCH 6/8] drm/i915/dp: Iterate over output bpp with fractional step size Mitul Golani
2023-09-29 7:13 ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Mitul Golani
2023-09-29 7:13 ` [Intel-gfx] [PATCH 8/8] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs Mitul Golani
2023-09-29 14:38 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Add DSC fractional bpp support (rev9) Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-09-26 8:23 [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support Mitul Golani
2023-09-26 12:38 ` Sui Jingfeng
2023-09-13 6:05 Mitul Golani
2023-09-22 12:45 ` Imre Deak
2023-09-27 15:22 ` Imre Deak
2023-09-27 16:36 ` Sharma, Swati2
2023-09-12 16:37 Mitul Golani
2023-09-11 5:05 Mitul Golani
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230929071322.945521-1-mitulkumar.ajitkumar.golani@intel.com \
--to=mitulkumar.ajitkumar.golani@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=mripard@kernel.org \
--cc=suijingfeng@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox