From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com,
matthew.d.roper@intel.com, jonathan.cavitt@intel.com,
saurabhg.gupta@intel.com, chris.p.wilson@linux.intel.com,
nirmoy.das@intel.com
Subject: [Intel-gfx] [PATCH v17 4/7] drm/i915: No TLB invalidation on suspended GT
Date: Tue, 17 Oct 2023 11:08:03 -0700 [thread overview]
Message-ID: <20231017180806.3054290-5-jonathan.cavitt@intel.com> (raw)
In-Reply-To: <20231017180806.3054290-1-jonathan.cavitt@intel.com>
In case of GT is suspended, don't allow submission of new TLB invalidation
request and cancel all pending requests. The TLB entries will be
invalidated either during GuC reload or on system resume.
Signed-off-by: Fei Yang <fei.yang@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
CC: John Harrison <john.c.harrison@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 1 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 24 ++++++++++++-------
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 7 ++++++
3 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 0949628d69f8b..2b6dfe62c8f2a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -537,4 +537,5 @@ int intel_guc_invalidate_tlb_engines(struct intel_guc *guc);
int intel_guc_invalidate_tlb_guc(struct intel_guc *guc);
int intel_guc_tlb_invalidation_done(struct intel_guc *guc,
const u32 *payload, u32 len);
+void wake_up_all_tlb_invalidate(struct intel_guc *guc);
#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index aba138e571960..1b04b1692e48d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1796,6 +1796,20 @@ static void __guc_reset_context(struct intel_context *ce, intel_engine_mask_t st
intel_context_put(parent);
}
+void wake_up_all_tlb_invalidate(struct intel_guc *guc)
+{
+ struct intel_guc_tlb_wait *wait;
+ unsigned long i;
+
+ if (!intel_guc_tlb_invalidation_is_available(guc))
+ return;
+
+ xa_lock_irq(&guc->tlb_lookup);
+ xa_for_each(&guc->tlb_lookup, i, wait)
+ wake_up(&wait->wq);
+ xa_unlock_irq(&guc->tlb_lookup);
+}
+
void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled)
{
struct intel_context *ce;
@@ -1925,9 +1939,6 @@ void intel_guc_submission_cancel_requests(struct intel_guc *guc)
void intel_guc_submission_reset_finish(struct intel_guc *guc)
{
- struct intel_guc_tlb_wait *wait;
- unsigned long i;
-
/* Reset called during driver load or during wedge? */
if (unlikely(!guc_submission_initialized(guc) ||
intel_gt_is_wedged(guc_to_gt(guc)))) {
@@ -1951,12 +1962,7 @@ void intel_guc_submission_reset_finish(struct intel_guc *guc)
* The full GT reset will have cleared the TLB caches and flushed the
* G2H message queue; we can release all the blocked waiters.
*/
- if (intel_guc_tlb_invalidation_is_available(guc)) {
- xa_lock_irq(&guc->tlb_lookup);
- xa_for_each(&guc->tlb_lookup, i, wait)
- wake_up(&wait->wq);
- xa_unlock_irq(&guc->tlb_lookup);
- }
+ wake_up_all_tlb_invalidate(guc);
}
static void destroyed_worker_func(struct work_struct *w);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 98b103375b7ab..27f6561dd7319 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -688,6 +688,8 @@ void intel_uc_suspend(struct intel_uc *uc)
/* flush the GSC worker */
intel_gsc_uc_flush_work(&uc->gsc);
+ wake_up_all_tlb_invalidate(guc);
+
if (!intel_guc_is_ready(guc)) {
guc->interrupts.enabled = false;
return;
@@ -736,6 +738,11 @@ static int __uc_resume(struct intel_uc *uc, bool enable_communication)
intel_gsc_uc_resume(&uc->gsc);
+ if (intel_guc_tlb_invalidation_is_available(guc)) {
+ intel_guc_invalidate_tlb_engines(guc);
+ intel_guc_invalidate_tlb_guc(guc);
+ }
+
return 0;
}
--
2.25.1
next prev parent reply other threads:[~2023-10-17 18:18 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-17 18:07 [Intel-gfx] [PATCH v17 0/7] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-17 18:08 ` [Intel-gfx] [PATCH v17 1/7] drm/i915: Add GuC TLB Invalidation device info flags Jonathan Cavitt
2023-10-17 18:08 ` [Intel-gfx] [PATCH v17 2/7] drm/i915/guc: Add CT size delay helper Jonathan Cavitt
2023-10-17 18:08 ` [Intel-gfx] [PATCH v17 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-17 18:08 ` Jonathan Cavitt [this message]
2023-10-17 18:08 ` [Intel-gfx] [PATCH v17 5/7] drm/i915: No TLB invalidation on wedged GT Jonathan Cavitt
2023-10-17 18:08 ` [Intel-gfx] [PATCH v17 6/7] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck Jonathan Cavitt
2023-10-17 18:08 ` [Intel-gfx] [PATCH v17 7/7] drm/i915: Enable GuC TLB invalidations for MTL Jonathan Cavitt
2023-10-17 19:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines Patchwork
2023-10-17 19:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-17 19:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-17 20:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines (rev2) Patchwork
2023-10-17 20:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-17 20:20 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-17 21:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines (rev3) Patchwork
2023-10-17 21:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-17 21:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-18 2:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-10-18 3:28 ` Andi Shyti
2023-10-18 3:51 ` Andi Shyti
2023-10-18 4:18 ` [Intel-gfx] [PATCH v17 0/7] drm/i915: Define and use GuC and CTB TLB invalidation routines Andi Shyti
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