From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 07/11] drm/i915/cdclk: Factor out INTEL_OUTPUT_DSI check in vlv_dsi_min_cdclk()
Date: Tue, 29 Oct 2024 23:52:13 +0200 [thread overview]
Message-ID: <20241029215217.3697-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20241029215217.3697-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
All the if statements in vlv_dsi_min_cdclk() check for
INTEL_OUTPUT_DSI. Make life simpler by checking that just
once at the start.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/vlv_dsi.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 49a895589150..708639178e29 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -1763,26 +1763,26 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
int vlv_dsi_min_cdclk(const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- int min_cdclk = 0;
+
+ if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
+ return 0;
/*
* On Valleyview some DSI panels lose (v|h)sync when the clock is lower
* than 320000KHz.
*/
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) &&
- IS_VALLEYVIEW(dev_priv))
- min_cdclk = max(320000, min_cdclk);
+ if (IS_VALLEYVIEW(dev_priv))
+ return 320000;
/*
* On Geminilake once the CDCLK gets as low as 79200
* picture gets unstable, despite that values are
* correct for DSI PLL and DE PLL.
*/
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) &&
- IS_GEMINILAKE(dev_priv))
- min_cdclk = max(158400, min_cdclk);
+ if (IS_GEMINILAKE(dev_priv))
+ return 158400;
- return min_cdclk;
+ return 0;
}
typedef void (*vlv_dsi_dmi_quirk_func)(struct intel_dsi *intel_dsi);
--
2.45.2
next prev parent reply other threads:[~2024-10-29 21:52 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 21:52 [PATCH 00/11] drm/i915/cdclk: Declutter CDCLK code Ville Syrjala
2024-10-29 21:52 ` [PATCH 01/11] drm/i915: Introduce HAS_DOUBLE_WIDE() Ville Syrjala
2024-10-30 11:23 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 02/11] drm/i915/cdclk: Extract intel_cdclk_guardband() and intel_cdclk_ppc() Ville Syrjala
2024-10-30 11:23 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 03/11] drm/i915/cdclk: Extract hsw_ips_min_cdclk() Ville Syrjala
2024-10-30 11:26 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 04/11] drm/i915/cdclk: Extract intel_audio_min_cdclk() Ville Syrjala
2024-10-30 11:30 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 05/11] drm/i915/cdclk: Factor out has_audio check in intel_audio_min_cdclk() Ville Syrjala
2024-10-30 11:30 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 06/11] drm/i915/cdclk: Extract vlv_dsi_min_cdclk() Ville Syrjala
2024-10-30 11:34 ` Jani Nikula
2024-10-30 13:22 ` Ville Syrjälä
2024-10-30 17:55 ` Jani Nikula
2024-10-29 21:52 ` Ville Syrjala [this message]
2024-10-30 11:35 ` [PATCH 07/11] drm/i915/cdclk: Factor out INTEL_OUTPUT_DSI check in vlv_dsi_min_cdclk() Jani Nikula
2024-10-29 21:52 ` [PATCH 08/11] drm/i915/cdclk: Suck the compression_enable check into intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:37 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 09/11] drm/i915/cdclk: Drop pointles max_t() usage in intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:39 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 10/11] drm/i915/cdclk: Relocate intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:40 ` Jani Nikula
2024-10-29 21:52 ` [PATCH 11/11] drm/i915/cdclk: Unify cdclk max() parameter order Ville Syrjala
2024-10-30 11:41 ` Jani Nikula
2024-10-30 1:30 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/cdclk: Declutter CDCLK code Patchwork
2024-10-30 1:30 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-30 1:46 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-10-31 13:20 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/cdclk: Declutter CDCLK code (rev2) Patchwork
2024-10-31 13:20 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-31 14:16 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-31 21:02 ` ✗ Fi.CI.IGT: failure " Patchwork
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