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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/11] drm/i915: Introduce HAS_DOUBLE_WIDE()
Date: Wed, 30 Oct 2024 13:23:16 +0200	[thread overview]
Message-ID: <87r07xn8bf.fsf@intel.com> (raw)
In-Reply-To: <20241029215217.3697-2-ville.syrjala@linux.intel.com>

On Tue, 29 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make the code a bit more self documenting by adding
> HAS_DOUBLE_WIDE().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c          | 2 +-
>  drivers/gpu/drm/i915/display/intel_display.c        | 4 ++--
>  drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
>  3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 96523526a2c3..6cef3ca3a069 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -3462,7 +3462,7 @@ static int intel_compute_max_dotclk(struct intel_display *display)
>  		return max_cdclk_freq;
>  	else if (IS_CHERRYVIEW(dev_priv))
>  		return max_cdclk_freq*95/100;
> -	else if (DISPLAY_VER(display) < 4)
> +	else if (HAS_DOUBLE_WIDE(display))
>  		return 2*max_cdclk_freq*90/100;
>  	else
>  		return max_cdclk_freq*90/100;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 0e6d6c8354ef..9a5102224c59 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2371,7 +2371,7 @@ static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc)
>  	const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  
>  	/* GDG double wide on either pipe, otherwise pipe A only */
> -	return DISPLAY_VER(dev_priv) < 4 &&
> +	return HAS_DOUBLE_WIDE(dev_priv) &&
>  		(crtc->pipe == PIPE_A || IS_I915G(dev_priv));
>  }
>  
> @@ -3207,7 +3207,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
>  
>  	intel_color_get_config(pipe_config);
>  
> -	if (DISPLAY_VER(dev_priv) < 4)
> +	if (HAS_DOUBLE_WIDE(dev_priv))
>  		pipe_config->double_wide = tmp & TRANSCONF_DOUBLE_WIDE;
>  
>  	intel_get_transcoder_timings(crtc, pipe_config);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 410f8b33a8a1..ae7a35cf44ca 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -129,6 +129,7 @@ enum intel_display_subplatform {
>  #define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
>  #define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
>  #define HAS_DOUBLE_BUFFERED_M_N(i915)	(DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
> +#define HAS_DOUBLE_WIDE(i915)		(DISPLAY_VER(i915) < 4)
>  #define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
>  #define HAS_DP20(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
>  #define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-10-30 11:23 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-29 21:52 [PATCH 00/11] drm/i915/cdclk: Declutter CDCLK code Ville Syrjala
2024-10-29 21:52 ` [PATCH 01/11] drm/i915: Introduce HAS_DOUBLE_WIDE() Ville Syrjala
2024-10-30 11:23   ` Jani Nikula [this message]
2024-10-29 21:52 ` [PATCH 02/11] drm/i915/cdclk: Extract intel_cdclk_guardband() and intel_cdclk_ppc() Ville Syrjala
2024-10-30 11:23   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 03/11] drm/i915/cdclk: Extract hsw_ips_min_cdclk() Ville Syrjala
2024-10-30 11:26   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 04/11] drm/i915/cdclk: Extract intel_audio_min_cdclk() Ville Syrjala
2024-10-30 11:30   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 05/11] drm/i915/cdclk: Factor out has_audio check in intel_audio_min_cdclk() Ville Syrjala
2024-10-30 11:30   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 06/11] drm/i915/cdclk: Extract vlv_dsi_min_cdclk() Ville Syrjala
2024-10-30 11:34   ` Jani Nikula
2024-10-30 13:22     ` Ville Syrjälä
2024-10-30 17:55       ` Jani Nikula
2024-10-29 21:52 ` [PATCH 07/11] drm/i915/cdclk: Factor out INTEL_OUTPUT_DSI check in vlv_dsi_min_cdclk() Ville Syrjala
2024-10-30 11:35   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 08/11] drm/i915/cdclk: Suck the compression_enable check into intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:37   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 09/11] drm/i915/cdclk: Drop pointles max_t() usage in intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:39   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 10/11] drm/i915/cdclk: Relocate intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:40   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 11/11] drm/i915/cdclk: Unify cdclk max() parameter order Ville Syrjala
2024-10-30 11:41   ` Jani Nikula
2024-10-30  1:30 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/cdclk: Declutter CDCLK code Patchwork
2024-10-30  1:30 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-30  1:46 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-10-31 13:20 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/cdclk: Declutter CDCLK code (rev2) Patchwork
2024-10-31 13:20 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-31 14:16 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-31 21:02 ` ✗ Fi.CI.IGT: failure " Patchwork

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