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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 05/11] drm/i915/cdclk: Factor out has_audio check in intel_audio_min_cdclk()
Date: Wed, 30 Oct 2024 13:30:59 +0200	[thread overview]
Message-ID: <87ikt9n7yk.fsf@intel.com> (raw)
In-Reply-To: <20241029215217.3697-6-ville.syrjala@linux.intel.com>

On Tue, 29 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> All the if statements in intel_audio_min_cdclk() check for
> has_audio==true. Check that once ahead of time to make
> things a bit simpler.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_audio.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 82c45b24417a..af0bfdc44072 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -984,13 +984,15 @@ int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	int min_cdclk = 0;
>  
> +	if (!crtc_state->has_audio)
> +		return 0;
> +
>  	/* BSpec says "Do not use DisplayPort with CDCLK less than 432 MHz,
>  	 * audio enabled, port width x4, and link rate HBR2 (5.4 GHz), or else
>  	 * there may be audio corruption or screen corruption." This cdclk
>  	 * restriction for GLK is 316.8 MHz.
>  	 */
>  	if (intel_crtc_has_dp_encoder(crtc_state) &&
> -	    crtc_state->has_audio &&
>  	    crtc_state->port_clock >= 540000 &&
>  	    crtc_state->lane_count == 4) {
>  		if (DISPLAY_VER(display) == 10) {
> @@ -1006,7 +1008,7 @@ int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state)
>  	 * According to BSpec, "The CD clock frequency must be at least twice
>  	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default.
>  	 */
> -	if (crtc_state->has_audio && DISPLAY_VER(display) >= 9)
> +	if (DISPLAY_VER(display) >= 9)
>  		min_cdclk = max(2 * 96000, min_cdclk);
>  
>  	/*
> @@ -1017,7 +1019,7 @@ int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state)
>  	 *  162                    | 200 or higher"
>  	 */
>  	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
> -	    intel_crtc_has_dp_encoder(crtc_state) && crtc_state->has_audio)
> +	    intel_crtc_has_dp_encoder(crtc_state))
>  		min_cdclk = max(crtc_state->port_clock, min_cdclk);
>  
>  	return min_cdclk;

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-10-30 11:31 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-29 21:52 [PATCH 00/11] drm/i915/cdclk: Declutter CDCLK code Ville Syrjala
2024-10-29 21:52 ` [PATCH 01/11] drm/i915: Introduce HAS_DOUBLE_WIDE() Ville Syrjala
2024-10-30 11:23   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 02/11] drm/i915/cdclk: Extract intel_cdclk_guardband() and intel_cdclk_ppc() Ville Syrjala
2024-10-30 11:23   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 03/11] drm/i915/cdclk: Extract hsw_ips_min_cdclk() Ville Syrjala
2024-10-30 11:26   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 04/11] drm/i915/cdclk: Extract intel_audio_min_cdclk() Ville Syrjala
2024-10-30 11:30   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 05/11] drm/i915/cdclk: Factor out has_audio check in intel_audio_min_cdclk() Ville Syrjala
2024-10-30 11:30   ` Jani Nikula [this message]
2024-10-29 21:52 ` [PATCH 06/11] drm/i915/cdclk: Extract vlv_dsi_min_cdclk() Ville Syrjala
2024-10-30 11:34   ` Jani Nikula
2024-10-30 13:22     ` Ville Syrjälä
2024-10-30 17:55       ` Jani Nikula
2024-10-29 21:52 ` [PATCH 07/11] drm/i915/cdclk: Factor out INTEL_OUTPUT_DSI check in vlv_dsi_min_cdclk() Ville Syrjala
2024-10-30 11:35   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 08/11] drm/i915/cdclk: Suck the compression_enable check into intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:37   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 09/11] drm/i915/cdclk: Drop pointles max_t() usage in intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:39   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 10/11] drm/i915/cdclk: Relocate intel_vdsc_min_cdclk() Ville Syrjala
2024-10-30 11:40   ` Jani Nikula
2024-10-29 21:52 ` [PATCH 11/11] drm/i915/cdclk: Unify cdclk max() parameter order Ville Syrjala
2024-10-30 11:41   ` Jani Nikula
2024-10-30  1:30 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/cdclk: Declutter CDCLK code Patchwork
2024-10-30  1:30 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-30  1:46 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-10-31 13:20 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/cdclk: Declutter CDCLK code (rev2) Patchwork
2024-10-31 13:20 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-31 14:16 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-31 21:02 ` ✗ Fi.CI.IGT: failure " Patchwork

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