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From: Uma Shankar <uma.shankar@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, harry.wentland@amd.com,
	pekka.paalanen@haloniitty.fi, sebastian.wick@redhat.com,
	jadahl@redhat.com, mwen@igalia.com, contact@emersion.fr,
	naveen1.kumar@intel.com,
	Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>,
	Uma Shankar <uma.shankar@intel.com>
Subject: [v2 16/25] drm/i915/color: Add callbacks to set plane CTM
Date: Tue, 26 Nov 2024 18:57:21 +0530	[thread overview]
Message-ID: <20241126132730.1192571-17-uma.shankar@intel.com> (raw)
In-Reply-To: <20241126132730.1192571-1-uma.shankar@intel.com>

From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

Add callback to intel color functions for setting plane CTM.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 23 ++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_color.h |  2 ++
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 01bd5820a12b..26c51334f3b7 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -29,6 +29,7 @@
 #include "intel_display_types.h"
 #include "intel_dsb.h"
 #include "skl_universal_plane.h"
+#include "skl_universal_plane_regs.h"
 
 struct intel_color_funcs {
 	int (*color_check)(struct intel_atomic_state *state,
@@ -84,6 +85,10 @@ struct intel_color_funcs {
 	 * Read config other than LUTs and CSCs, before them. Optional.
 	 */
 	void (*get_config)(struct intel_crtc_state *crtc_state);
+
+	/* Plane CSC*/
+	void (*load_plane_csc_matrix)(const struct drm_plane_state *plane_state,
+				      const struct drm_property_blob *blob);
 };
 
 #define CTM_COEFF_SIGN	(1ULL << 63)
@@ -3784,6 +3789,15 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state)
 	}
 }
 
+void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state,
+				       const struct drm_property_blob *blob)
+{
+	struct drm_i915_private *i915 = to_i915(plane_state->plane->dev);
+
+	if (i915->display.funcs.color->load_plane_csc_matrix)
+		i915->display.funcs.color->load_plane_csc_matrix(plane_state, blob);
+}
+
 static const struct intel_color_funcs chv_color_funcs = {
 	.color_check = chv_color_check,
 	.color_commit_arm = i9xx_color_commit_arm,
@@ -4087,6 +4101,15 @@ static void apply_colorop(const struct drm_plane_state *plane_state,
 			  struct drm_colorop *colorop,
 			  u32 *plane_color_ctl)
 {
+	struct drm_colorop_state *state = colorop->state;
+	struct intel_plane_colorop *intel_colorop = to_intel_plane_colorop(colorop);
+
+	if (colorop->type == DRM_COLOROP_CTM_3X3) {
+		/* TODO: use intel_color_op state data */
+		(*plane_color_ctl) |= PLANE_COLOR_PLANE_CSC_ENABLE;
+		if (state->data && intel_colorop->id == CB_PLANE_CSC)
+			intel_color_load_plane_csc_matrix(plane_state, state->data);
+	}
 }
 
 void intel_program_pipeline(const struct drm_plane_state *plane_state, u32 *plane_color_ctl)
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index 7be2453eee0a..522d1ddd574a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -50,5 +50,7 @@ int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_l
 int intel_plane_color_init(struct drm_plane *plane);
 void intel_program_pipeline(const struct drm_plane_state *plane_state,
 			    u32 *plane_color_ctl);
+void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state,
+				       const struct drm_property_blob *blob);
 
 #endif /* __INTEL_COLOR_H__ */
-- 
2.42.0


  parent reply	other threads:[~2024-11-26 13:20 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
2024-11-26 13:27 ` [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
2024-11-26 13:27 ` [v2 02/25] drm: Add support for 3x3 CTM Uma Shankar
2024-11-30  9:38   ` Dmitry Baryshkov
2024-12-03  9:03     ` Shankar, Uma
2024-11-26 13:27 ` [v2 03/25] drm: Add Enhanced LUT precision structure Uma Shankar
2024-11-26 13:27 ` [v2 04/25] drm: Add Color lut range attributes Uma Shankar
2024-11-26 13:27 ` [v2 05/25] drm: Add Color ops capability property Uma Shankar
2024-11-30  9:43   ` Dmitry Baryshkov
2024-12-03  9:09     ` Shankar, Uma
2024-11-26 13:27 ` [v2 06/25] drm: Define helper to create color " Uma Shankar
2024-11-26 13:27 ` [v2 07/25] drm: Add 1D LUT multi-segmented color op Uma Shankar
2024-11-30  9:44   ` Dmitry Baryshkov
2024-12-03  9:11     ` Shankar, Uma
2024-11-26 13:27 ` [v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG Uma Shankar
2024-11-26 13:27 ` [v2 09/25] drm: Add helper to initialize segmented 1D LUT Uma Shankar
2024-11-30  9:46   ` Dmitry Baryshkov
2024-12-03  9:14     ` Shankar, Uma
2024-12-05 23:38       ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 10/25] drm/i915: Add identifiers for intel color blocks Uma Shankar
2024-11-26 13:27 ` [v2 11/25] drm/i915: Add intel_color_op Uma Shankar
2024-11-26 13:27 ` [v2 12/25] drm/i915/color: Add helper to create intel colorop Uma Shankar
2024-11-26 13:27 ` [v2 13/25] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2024-11-26 13:27 ` [v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
2024-11-26 13:27 ` [v2 15/25] drm/i915/color: Add framework to set colorop Uma Shankar
2024-11-26 13:27 ` Uma Shankar [this message]
2024-11-26 13:27 ` [v2 17/25] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
2024-11-26 13:27 ` [v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
2024-11-26 13:27 ` [v2 19/25] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2024-11-26 13:27 ` [v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2024-11-26 13:27 ` [v2 21/25] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2024-11-26 13:27 ` [v2 22/25] drm/i915/color: Program Pre-CSC registers Uma Shankar
2024-11-26 13:27 ` [v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2024-11-26 13:27 ` [v2 24/25] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2024-11-26 13:27 ` [v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar
2024-11-26 14:54 ` ✗ Fi.CI.CHECKPATCH: warning for Plane Color Pipeline support for Intel platforms (rev2) Patchwork
2024-11-26 14:54 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-11-26 15:09 ` ✗ i915.CI.BAT: failure " Patchwork

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