From: Uma Shankar <uma.shankar@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, harry.wentland@amd.com,
pekka.paalanen@haloniitty.fi, sebastian.wick@redhat.com,
jadahl@redhat.com, mwen@igalia.com, contact@emersion.fr,
naveen1.kumar@intel.com, Uma Shankar <uma.shankar@intel.com>
Subject: [v2 05/25] drm: Add Color ops capability property
Date: Tue, 26 Nov 2024 18:57:10 +0530 [thread overview]
Message-ID: <20241126132730.1192571-6-uma.shankar@intel.com> (raw)
In-Reply-To: <20241126132730.1192571-1-uma.shankar@intel.com>
Add capability property which a colorop can expose it's
hardware's abilities. It's a blob property that can be
filled with respective data structures depending on the
colorop. The user space is expected to read this property
and program the colorop accordingly.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
include/drm/drm_colorop.h | 12 ++++++++++++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index ba68358c0ffe..46cc7b0df6e8 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -780,6 +780,9 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
*val = state->size;
} else if (property == colorop->data_property) {
*val = (state->data) ? state->data->base.id : 0;
+ } else if (property == colorop->hw_caps_property) {
+ *val = state->hw_caps ?
+ state->hw_caps->base.id : 0;
} else {
return -EINVAL;
}
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index 56b51fafebdf..58e5b87c6d56 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -146,6 +146,11 @@ struct drm_colorop_state {
* Number of entries of the custom LUT. This should be read-only.
*/
uint32_t size;
+ /**
+ * @hw_caps:
+ *
+ */
+ struct drm_property_blob *hw_caps;
/**
* @lut_3d_modes:
@@ -297,6 +302,13 @@ struct drm_colorop {
*/
struct drm_property *curve_1d_type_property;
+ /**
+ * @hwlut_caps_property:
+ *
+ * Property to expose hardware lut capbilities.
+ */
+ struct drm_property *hw_caps_property;
+
/**
* @multiplier_property:
*
--
2.42.0
next prev parent reply other threads:[~2024-11-26 13:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
2024-11-26 13:27 ` [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
2024-11-26 13:27 ` [v2 02/25] drm: Add support for 3x3 CTM Uma Shankar
2024-11-30 9:38 ` Dmitry Baryshkov
2024-12-03 9:03 ` Shankar, Uma
2024-11-26 13:27 ` [v2 03/25] drm: Add Enhanced LUT precision structure Uma Shankar
2024-11-26 13:27 ` [v2 04/25] drm: Add Color lut range attributes Uma Shankar
2024-11-26 13:27 ` Uma Shankar [this message]
2024-11-30 9:43 ` [v2 05/25] drm: Add Color ops capability property Dmitry Baryshkov
2024-12-03 9:09 ` Shankar, Uma
2024-11-26 13:27 ` [v2 06/25] drm: Define helper to create color " Uma Shankar
2024-11-26 13:27 ` [v2 07/25] drm: Add 1D LUT multi-segmented color op Uma Shankar
2024-11-30 9:44 ` Dmitry Baryshkov
2024-12-03 9:11 ` Shankar, Uma
2024-11-26 13:27 ` [v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG Uma Shankar
2024-11-26 13:27 ` [v2 09/25] drm: Add helper to initialize segmented 1D LUT Uma Shankar
2024-11-30 9:46 ` Dmitry Baryshkov
2024-12-03 9:14 ` Shankar, Uma
2024-12-05 23:38 ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 10/25] drm/i915: Add identifiers for intel color blocks Uma Shankar
2024-11-26 13:27 ` [v2 11/25] drm/i915: Add intel_color_op Uma Shankar
2024-11-26 13:27 ` [v2 12/25] drm/i915/color: Add helper to create intel colorop Uma Shankar
2024-11-26 13:27 ` [v2 13/25] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2024-11-26 13:27 ` [v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
2024-11-26 13:27 ` [v2 15/25] drm/i915/color: Add framework to set colorop Uma Shankar
2024-11-26 13:27 ` [v2 16/25] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
2024-11-26 13:27 ` [v2 17/25] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
2024-11-26 13:27 ` [v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
2024-11-26 13:27 ` [v2 19/25] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2024-11-26 13:27 ` [v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2024-11-26 13:27 ` [v2 21/25] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2024-11-26 13:27 ` [v2 22/25] drm/i915/color: Program Pre-CSC registers Uma Shankar
2024-11-26 13:27 ` [v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2024-11-26 13:27 ` [v2 24/25] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2024-11-26 13:27 ` [v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar
2024-11-26 14:54 ` ✗ Fi.CI.CHECKPATCH: warning for Plane Color Pipeline support for Intel platforms (rev2) Patchwork
2024-11-26 14:54 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-11-26 15:09 ` ✗ i915.CI.BAT: failure " Patchwork
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