From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Subject: [PATCH v7 09/13] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit
Date: Wed, 12 Feb 2025 09:57:38 +0200 [thread overview]
Message-ID: <20250212075742.995022-11-jouni.hogander@intel.com> (raw)
In-Reply-To: <20250212075742.995022-1-jouni.hogander@intel.com>
We have different approach on how flip is considered being complete. We are
waiting for vblank on DSB and generate interrupt when it happens and this
interrupt is considered as indication of completion -> we definitely do not
want to skip vblank wait.
Also not skipping scanline wait shouldn't cause any problems if we are in
DEEP_SLEEP PIPEDSL register is returning 0 -> evasion does nothing and if
we are not in DEEP_SLEEP evasion works same way as without PSR.
v2: add comment explaining why we are not setting DSB_SKIP_WAITS_EN
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dsb.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 2f2812c23972..30782ab0b908 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -164,17 +164,26 @@ static int dsb_scanline_to_hw(struct intel_atomic_state *state,
return (scanline + vtotal - intel_crtc_scanline_offset(crtc_state)) % vtotal;
}
+/*
+ * Bspec suggests that we should always set DSB_SKIP_WAITS_EN. We have approach
+ * different from what is explained in Bspec on how flip is considered being
+ * complete. We are waiting for vblank in DSB and generate interrupt when it
+ * happens and this interrupt is considered as indication of completion -> we
+ * definitely do not want to skip vblank wait. We also have concern what comes
+ * to skipping vblank evasion. I.e. arming registers are latched before we have
+ * managed writing them. Due to these reasons we are not setting
+ * DSB_SKIP_WAITS_EN.
+ */
static u32 dsb_chicken(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
if (pre_commit_is_vrr_active(state, crtc))
- return DSB_SKIP_WAITS_EN |
- DSB_CTRL_WAIT_SAFE_WINDOW |
+ return DSB_CTRL_WAIT_SAFE_WINDOW |
DSB_CTRL_NO_WAIT_VBLANK |
DSB_INST_WAIT_SAFE_WINDOW |
DSB_INST_NO_WAIT_VBLANK;
else
- return DSB_SKIP_WAITS_EN;
+ return 0;
}
static bool assert_dsb_has_room(struct intel_dsb *dsb)
--
2.43.0
next prev parent reply other threads:[~2025-02-12 7:58 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-12 7:57 [PATCH v7 00/13] PSR DSB support Jouni Högander
2025-02-12 7:57 ` [PATCH v7 01/13] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2025-02-12 10:25 ` Manna, Animesh
2025-02-12 7:57 ` [PATCH v7 02/13] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2025-02-12 7:57 ` [PATCH v7 03/13] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2025-02-12 7:57 ` [PATCH v7 04/13] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2025-02-12 7:57 ` [PATCH v7 05/13] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2025-02-12 7:57 ` [PATCH v7 06/13] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2025-02-12 7:57 ` [PATCH v7 07/13] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2025-02-12 7:57 ` [PATCH v7 07/13] drm/i915/psr: Write PSR2_MAN_TRK_CTL on DSB commit as well Jouni Högander
2025-02-12 7:57 ` [PATCH v7 08/13] drm/i915/display: Warn on use_dsb in non-dsb pipe update functions Jouni Högander
2025-02-12 14:51 ` Ville Syrjälä
2025-02-12 7:57 ` Jouni Högander [this message]
2025-02-12 7:57 ` [PATCH v7 10/13] drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabled Jouni Högander
2025-02-12 7:57 ` [PATCH v7 11/13] drm/i915/psr: Add function for triggering "Frame Change" event Jouni Högander
2025-02-12 7:57 ` [PATCH v7 12/13] drm/i915/display: Ensure we have "Frame Change" event in DSB commit Jouni Högander
2025-02-12 7:57 ` [PATCH v7 13/13] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2025-02-12 14:52 ` Ville Syrjälä
2025-02-12 18:22 ` Hogander, Jouni
2025-02-12 18:52 ` Ville Syrjälä
2025-02-12 9:06 ` ✗ Fi.CI.SPARSE: warning for PSR DSB support (rev9) Patchwork
2025-02-12 9:34 ` ✓ i915.CI.BAT: success " Patchwork
2025-02-12 14:33 ` ✗ i915.CI.Full: failure " Patchwork
2025-02-13 6:08 ` Hogander, Jouni
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