From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, ville.syrjala@intel.com
Subject: [PATCH v5 02/17] drm/i915/display: Add source param for dc balance
Date: Tue, 13 May 2025 10:46:45 +0530 [thread overview]
Message-ID: <20250513051700.507389-3-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20250513051700.507389-1-mitulkumar.ajitkumar.golani@intel.com>
Add source param for dc balance enablement further.
--v2:
- Arrange in alphabetic order. (Ankit)
- Update name. (Ankit)
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index fe14a92ae8c6..71a6199f5475 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -194,6 +194,7 @@ struct intel_display_platforms {
((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
HAS_DSC(__display))
#define HAS_VRR(__display) (DISPLAY_VER(__display) >= 11)
+#define HAS_VRR_DC_BALANCE(__display) (DISPLAY_VER(__display) >= 30)
#define INTEL_NUM_PIPES(__display) (hweight8(DISPLAY_RUNTIME_INFO(__display)->pipe_mask))
#define OVERLAY_NEEDS_PHYSICAL(__display) (DISPLAY_INFO(__display)->overlay_needs_physical)
#define SUPPORTS_TV(__display) (DISPLAY_INFO(__display)->supports_tv)
--
2.48.1
next prev parent reply other threads:[~2025-05-13 5:18 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-05-13 5:16 ` [PATCH v5 01/17] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
2025-05-13 5:16 ` Mitul Golani [this message]
2025-05-13 5:16 ` [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
2025-05-30 6:22 ` Nautiyal, Ankit K
2025-05-13 5:16 ` [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers Mitul Golani
2025-05-13 7:15 ` Jani Nikula
2025-05-13 5:16 ` [PATCH v5 05/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
2025-05-13 5:16 ` [PATCH v5 06/17] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
2025-05-13 5:16 ` [PATCH v5 07/17] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
2025-05-13 5:16 ` [PATCH v5 08/17] drm/i915/vrr: Add compute config " Mitul Golani
2025-05-13 5:16 ` [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
2025-05-27 6:17 ` Nautiyal, Ankit K
2025-05-13 5:16 ` [PATCH v5 10/17] drm/i915: Extract vrr_vblank_start() Mitul Golani
2025-05-13 5:16 ` [PATCH v5 11/17] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
2025-05-13 5:16 ` [PATCH v5 12/17] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
2025-05-13 5:16 ` [PATCH v5 13/17] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
2025-05-13 5:16 ` [PATCH v5 14/17] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
2025-05-13 5:16 ` [PATCH v5 15/17] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
2025-05-13 5:16 ` [PATCH v5 16/17] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
2025-05-13 5:17 ` [PATCH v5 17/17] drm/i915/vrr: Enable DC Balance bit Mitul Golani
2025-05-13 6:02 ` ✗ Fi.CI.CHECKPATCH: warning for Enable/Disable DC balance along with VRR DSB (rev5) Patchwork
2025-05-13 6:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-05-13 6:26 ` ✗ i915.CI.BAT: failure " Patchwork
2025-05-15 7:55 ` Golani, Mitulkumar Ajitkumar
2025-05-15 8:20 ` ✓ i915.CI.BAT: success " Patchwork
2025-05-15 9:56 ` ✗ i915.CI.Full: failure " Patchwork
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