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From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, ville.syrjala@intel.com
Subject: [PATCH v5 08/17] drm/i915/vrr: Add compute config for DC Balance params
Date: Tue, 13 May 2025 10:46:51 +0530	[thread overview]
Message-ID: <20250513051700.507389-9-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20250513051700.507389-1-mitulkumar.ajitkumar.golani@intel.com>

Compute DC Balance parameters and tunable params based on
experiments.

--v2:
- Document tunable params. (Ankit)

--v3:
- Add line spaces to compute config. (Ankit)
- Remove redundancy checks.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 25 ++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 726fa49558d1..dcaae7631b0a 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -16,6 +16,13 @@
 
 #define FIXED_POINT_PRECISION		100
 #define CMRR_PRECISION_TOLERANCE	10
+/*
+ * Tunable parameters for DC Balance correction.
+ * These are captured based on experimentations.
+ */
+#define DCB_CORRECTION_SENSITIVITY	30
+#define DCB_CORRECTION_AGGRESSIVENESS	1000
+#define DCB_BLANK_TARGET		50
 
 bool intel_vrr_is_capable(struct intel_connector *connector)
 {
@@ -409,6 +416,24 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 			(crtc_state->hw.adjusted_mode.crtc_vtotal -
 			 crtc_state->hw.adjusted_mode.vsync_end);
 	}
+
+	if (crtc_state->vrr.dc_balance.enable) {
+		crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
+		crtc_state->vrr.dc_balance.vmin = crtc_state->vrr.vmin;
+		crtc_state->vrr.dc_balance.max_increase =
+			crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+		crtc_state->vrr.dc_balance.max_decrease =
+			crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+		crtc_state->vrr.dc_balance.guardband =
+			DIV_ROUND_UP(crtc_state->vrr.dc_balance.vmax *
+				     DCB_CORRECTION_SENSITIVITY, 100);
+		crtc_state->vrr.dc_balance.slope =
+			DIV_ROUND_UP(DCB_CORRECTION_AGGRESSIVENESS * 10,
+				     crtc_state->vrr.dc_balance.guardband);
+		crtc_state->vrr.dc_balance.vblank_target =
+			DIV_ROUND_UP((crtc_state->vrr.vmax - crtc_state->vrr.vmin) *
+				     DCB_BLANK_TARGET, 100);
+	}
 }
 
 void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
-- 
2.48.1


  parent reply	other threads:[~2025-05-13  5:19 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-13  5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-05-13  5:16 ` [PATCH v5 01/17] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
2025-05-13  5:16 ` [PATCH v5 02/17] drm/i915/display: Add source param for dc balance Mitul Golani
2025-05-13  5:16 ` [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
2025-05-30  6:22   ` Nautiyal, Ankit K
2025-05-13  5:16 ` [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers Mitul Golani
2025-05-13  7:15   ` Jani Nikula
2025-05-13  5:16 ` [PATCH v5 05/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
2025-05-13  5:16 ` [PATCH v5 06/17] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
2025-05-13  5:16 ` [PATCH v5 07/17] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
2025-05-13  5:16 ` Mitul Golani [this message]
2025-05-13  5:16 ` [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
2025-05-27  6:17   ` Nautiyal, Ankit K
2025-05-13  5:16 ` [PATCH v5 10/17] drm/i915: Extract vrr_vblank_start() Mitul Golani
2025-05-13  5:16 ` [PATCH v5 11/17] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
2025-05-13  5:16 ` [PATCH v5 12/17] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
2025-05-13  5:16 ` [PATCH v5 13/17] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
2025-05-13  5:16 ` [PATCH v5 14/17] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
2025-05-13  5:16 ` [PATCH v5 15/17] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
2025-05-13  5:16 ` [PATCH v5 16/17] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
2025-05-13  5:17 ` [PATCH v5 17/17] drm/i915/vrr: Enable DC Balance bit Mitul Golani
2025-05-13  6:02 ` ✗ Fi.CI.CHECKPATCH: warning for Enable/Disable DC balance along with VRR DSB (rev5) Patchwork
2025-05-13  6:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-05-13  6:26 ` ✗ i915.CI.BAT: failure " Patchwork
2025-05-15  7:55   ` Golani, Mitulkumar Ajitkumar
2025-05-15  8:20 ` ✓ i915.CI.BAT: success " Patchwork
2025-05-15  9:56 ` ✗ i915.CI.Full: failure " Patchwork

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