* [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB
@ 2025-05-13 5:16 Mitul Golani
2025-05-13 5:16 ` [PATCH v5 01/17] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
` (21 more replies)
0 siblings, 22 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Control DC Balance Adjustment bit to accomodate changes along
with VRR DSB implementation.
Mitul Golani (9):
drm/i915/display: Add source param for dc balance
drm/i915/display: Add VRR DC balance registers
drm/i915/vrr: Add DC Balance params to crtc_state
drm/i915/vrr: Add state dump for DC Balance params
drm/i915/vrr: Add compute config for DC Balance params
drm/i915/vrr: Write DC balance params to hw registers
drm/i915/vrr: Add function to check if DC Balance Possible
drm/i915/display: Add function to configure PIPEDMC_EVT_CTL
drm/i915/vrr: Enable DC Balance bit
Ville Syrjälä (8):
drm/i915/vrr: Refactor vmin/vmax stuff
drm/i915/display: Add pipe dmc registers and bits for DC Balance
drm/i915/vrr: Add functions to read out vmin/vmax stuff
drm/i915: Extract vrr_vblank_start()
drm/i915/vrr: Implement vblank evasion with DC balancing
drm/i915/dsb: Add pipedmc dc balance enable/disable
drm/i915/vrr: Restructure VRR enablement bit
drm/i915/vrr: Pause DC Balancing for DSB commits
.../drm/i915/display/intel_crtc_state_dump.c | 8 +
drivers/gpu/drm/i915/display/intel_display.c | 25 ++
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_types.h | 7 +
drivers/gpu/drm/i915/display/intel_dmc.c | 38 +++
drivers/gpu/drm/i915/display/intel_dmc.h | 7 +
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 52 ++++
drivers/gpu/drm/i915/display/intel_dsb.c | 31 ++-
drivers/gpu/drm/i915/display/intel_vblank.c | 33 ++-
drivers/gpu/drm/i915/display/intel_vrr.c | 234 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_vrr.h | 5 +
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 48 ++++
12 files changed, 451 insertions(+), 38 deletions(-)
--
2.48.1
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v5 01/17] drm/i915/vrr: Refactor vmin/vmax stuff
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 02/17] drm/i915/display: Add source param for dc balance Mitul Golani
` (20 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Refactor vmin/vmax functions for better computation.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 41 +++++++++++-------------
1 file changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index c6565baf815a..adfd231eb578 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -146,37 +146,41 @@ static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_stat
return crtc_state->vrr.pipeline_full + crtc_state->framestart_delay + 1;
}
-int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state)
+static int intel_vrr_vtotal(const struct intel_crtc_state *crtc_state, int vmin_vmax)
{
struct intel_display *display = to_intel_display(crtc_state);
- /* Min vblank actually determined by flipline */
if (DISPLAY_VER(display) >= 13)
- return intel_vrr_vmin_flipline(crtc_state);
+ return vmin_vmax;
else
- return intel_vrr_vmin_flipline(crtc_state) +
- intel_vrr_real_vblank_delay(crtc_state);
+ return vmin_vmax + intel_vrr_real_vblank_delay(crtc_state);
}
-int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
+static int intel_vrr_vblank_start(const struct intel_crtc_state *crtc_state,
+ int vmin_vmax)
{
- struct intel_display *display = to_intel_display(crtc_state);
+ return intel_vrr_vtotal(crtc_state, vmin_vmax) -
+ intel_vrr_vblank_exit_length(crtc_state);
+}
- if (DISPLAY_VER(display) >= 13)
- return crtc_state->vrr.vmax;
- else
- return crtc_state->vrr.vmax +
- intel_vrr_real_vblank_delay(crtc_state);
+int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state)
+{
+ return intel_vrr_vtotal(crtc_state, intel_vrr_vmin_flipline(crtc_state));
+}
+
+int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
+{
+ return intel_vrr_vtotal(crtc_state, crtc_state->vrr.vmax);
}
int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
{
- return intel_vrr_vmin_vtotal(crtc_state) - intel_vrr_vblank_exit_length(crtc_state);
+ return intel_vrr_vblank_start(crtc_state, intel_vrr_vmin_flipline(crtc_state));
}
int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state)
{
- return intel_vrr_vmax_vtotal(crtc_state) - intel_vrr_vblank_exit_length(crtc_state);
+ return intel_vrr_vblank_start(crtc_state, crtc_state->vrr.vmax);
}
static bool
@@ -257,14 +261,7 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
static
int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(crtc_state);
- int crtc_vtotal = crtc_state->hw.adjusted_mode.crtc_vtotal;
-
- if (DISPLAY_VER(display) >= 13)
- return crtc_vtotal;
- else
- return crtc_vtotal -
- intel_vrr_real_vblank_delay(crtc_state);
+ return intel_vrr_vtotal(crtc_state, crtc_state->hw.adjusted_mode.crtc_vtotal);
}
static
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 02/17] drm/i915/display: Add source param for dc balance
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-05-13 5:16 ` [PATCH v5 01/17] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
` (19 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Add source param for dc balance enablement further.
--v2:
- Arrange in alphabetic order. (Ankit)
- Update name. (Ankit)
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index fe14a92ae8c6..71a6199f5475 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -194,6 +194,7 @@ struct intel_display_platforms {
((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
HAS_DSC(__display))
#define HAS_VRR(__display) (DISPLAY_VER(__display) >= 11)
+#define HAS_VRR_DC_BALANCE(__display) (DISPLAY_VER(__display) >= 30)
#define INTEL_NUM_PIPES(__display) (hweight8(DISPLAY_RUNTIME_INFO(__display)->pipe_mask))
#define OVERLAY_NEEDS_PHYSICAL(__display) (DISPLAY_INFO(__display)->overlay_needs_physical)
#define SUPPORTS_TV(__display) (DISPLAY_INFO(__display)->supports_tv)
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-05-13 5:16 ` [PATCH v5 01/17] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
2025-05-13 5:16 ` [PATCH v5 02/17] drm/i915/display: Add source param for dc balance Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-30 6:22 ` Nautiyal, Ankit K
2025-05-13 5:16 ` [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers Mitul Golani
` (18 subsequent siblings)
21 siblings, 1 reply; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add pipe dmc registers and access bits for DC Balance params
configuration and enablement.
--v2:
- Separate register definitions for transcoder and
pipe dmc. (Ankit)
- Use MMIO pipe macros instead of transcoder ones. (Ankit)
- Remove dev_priv use. (Jani, Nikula)
--v3:
- Add all register address, from capital alphabet to small. (Ankit)
- Add EVT CTL registers.
- Add co-author tag.
- Add event flag for Triggering DC Balance.
Co-authored-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 52 +++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index e16ea3f16ed8..137816cb9e9d 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -75,6 +75,7 @@
#define DMC_EVT_CTL_EVENT_ID_MASK REG_GENMASK(15, 8)
#define DMC_EVT_CTL_EVENT_ID_FALSE 0x01
#define DMC_EVT_CTL_EVENT_ID_VBLANK_A 0x32 /* main DMC */
+#define DMC_EVT_CTL_EVENT_ID_ADAPTIVE_DC_BALANCE_TRIGGER 0x3D
/* An event handler scheduled to run at a 1 kHz frequency. */
#define DMC_EVT_CTL_EVENT_ID_CLK_MSEC 0xbf
@@ -117,4 +118,55 @@
#define DMC_WAKELOCK_CTL_REQ REG_BIT(31)
#define DMC_WAKELOCK_CTL_ACK REG_BIT(15)
+#define _PIPEDMC_DCB_CTL_A 0x5f1a0
+#define _PIPEDMC_DCB_CTL_B 0x5f5a0
+#define PIPEDMC_DCB_CTL(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_CTL_A,\
+ _PIPEDMC_DCB_CTL_B)
+#define PIPEDMC_ADAPTIVE_DCB_ENABLE REG_BIT(31)
+
+#define _PIPEDMC_DCB_VBLANK_A 0x5f1bc
+#define _PIPEDMC_DCB_VBLANK_B 0x5f5bc
+#define PIPEDMC_DCB_VBLANK(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VBLANK_A,\
+ _PIPEDMC_DCB_VBLANK_B)
+
+#define _PIPEDMC_DCB_SLOPE_A 0x5f1b8
+#define _PIPEDMC_DCB_SLOPE_B 0x5f5b8
+#define PIPEDMC_DCB_SLOPE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_SLOPE_A,\
+ _PIPEDMC_DCB_SLOPE_B)
+
+#define _PIPEDMC_DCB_GUARDBAND_A 0x5f1b4
+#define _PIPEDMC_DCB_GUARDBAND_B 0x5f5b4
+#define PIPEDMC_DCB_GUARDBAND(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_GUARDBAND_A,\
+ _PIPEDMC_DCB_GUARDBAND_B)
+
+#define _PIPEDMC_DCB_MAX_INCREASE_A 0x5f1ac
+#define _PIPEDMC_DCB_MAX_INCREASE_B 0x5f5ac
+#define PIPEDMC_DCB_MAX_INCREASE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_INCREASE_A,\
+ _PIPEDMC_DCB_MAX_INCREASE_B)
+
+#define _PIPEDMC_DCB_MAX_DECREASE_A 0x5f1b0
+#define _PIPEDMC_DCB_MAX_DECREASE_B 0x5f5b0
+#define PIPEDMC_DCB_MAX_DECREASE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_DECREASE_A,\
+ _PIPEDMC_DCB_MAX_DECREASE_B)
+
+#define _PIPEDMC_DCB_VMIN_A 0x5f1a4
+#define _PIPEDMC_DCB_VMIN_B 0x5f5a4
+#define PIPEDMC_DCB_VMIN(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VMIN_A,\
+ _PIPEDMC_DCB_VMIN_B)
+
+#define _PIPEDMC_DCB_VMAX_A 0x5f1a8
+#define _PIPEDMC_DCB_VMAX_B 0x5f5a8
+#define PIPEDMC_DCB_VMAX(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VMAX_A,\
+ _PIPEDMC_DCB_VMAX_B)
+
+#define _PIPEDMC_DCB_DEBUG_A 0x5f1c0
+#define _PIPEDMC_DCB_DEBUG_B 0x5f5c0
+#define PIPEDMC_DCB_DEBUG(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_DEBUG_A,\
+ _PIPEDMC_DCB_DEBUG_B)
+
+#define _PIPEDMC_EVT_CTL_3_A 0x5f040
+#define _PIPEDMC_EVT_CTL_3_B 0x5f440
+#define PIPEDMC_EVT_CTL_3(pipe) _MMIO_PIPE(pipe, _PIPEDMC_EVT_CTL_3_A,\
+ _PIPEDMC_EVT_CTL_3_B)
+
#endif /* __INTEL_DMC_REGS_H__ */
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (2 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 7:15 ` Jani Nikula
2025-05-13 5:16 ` [PATCH v5 05/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
` (17 subsequent siblings)
21 siblings, 1 reply; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Add VRR register offsets and bits to access DC Balance configuration.
--v2:
- Separate register definitions. (Ankit)
- Remove usage of dev_priv. (Jani, Nikula)
--v3:
- Convert register address offset, from capital to small. (Ankit)
- Move mask bits near to register offsets. (Ankit)
Co-authored-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
index 6ed0e0dc97e7..204d5b35bc4b 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
@@ -9,6 +9,53 @@
#include "intel_display_reg_defs.h"
/* VRR registers */
+#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_A 0x604d4
+#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_B 0x614d4
+#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_C 0x624d4
+#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_D 0x634d4
+#define TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(display, \
+ trans) _MMIO_TRANS2(display, trans, \
+ _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_A)
+#define VRR_DCB_ADJ_FLIPLINE_CNT_MASK REG_GENMASK(31, 24)
+#define VRR_DCB_ADJ_FLIPLINE_MASK REG_GENMASK(19, 0)
+
+#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_A 0x604d8
+#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_B 0x614d8
+#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_C 0x624d8
+#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_D 0x634d8
+#define TRANS_VRR_DCB_ADJ_VMAX_CFG(display, trans) _MMIO_TRANS2(display, \
+ trans, \
+ _TRANS_VRR_DCB_ADJ_VMAX_CFG_A)
+#define VRR_DCB_ADJ_VMAX_CNT_MASK REG_GENMASK(31, 24)
+#define VRR_DCB_ADJ_VMAX_MASK REG_GENMASK(19, 0)
+
+#define _TRANS_VRR_FLIPLINE_DCB_A 0x60418
+#define _TRANS_VRR_FLIPLINE_DCB_B 0x61418
+#define _TRANS_VRR_FLIPLINE_DCB_C 0x62418
+#define _TRANS_VRR_FLIPLINE_DCB_D 0x63418
+#define TRANS_VRR_FLIPLINE_DCB(display, trans) _MMIO_TRANS2(display, \
+ trans, \
+ _TRANS_VRR_FLIPLINE_DCB_A)
+#define VRR_FLIPLINE_DCB_MASK REG_GENMASK(19, 0)
+
+#define _TRANS_VRR_VMAX_DCB_A 0x60414
+#define _TRANS_VRR_VMAX_DCB_B 0x61414
+#define _TRANS_VRR_VMAX_DCB_C 0x62414
+#define _TRANS_VRR_VMAX_DCB_D 0x63414
+#define TRANS_VRR_VMAX_DCB(display, trans) _MMIO_TRANS2(display, \
+ trans, \
+ _TRANS_VRR_VMAX_DCB_A)
+#define VRR_VMAX_DCB_MASK REG_GENMASK(19, 0)
+
+#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_A 0x604c0
+#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_B 0x614c0
+#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_C 0x624c0
+#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_D 0x634c0
+#define TRANS_ADAPTIVE_SYNC_DCB_CTL(display, trans) _MMIO_TRANS2(display, \
+ trans, \
+ _TRANS_ADAPTIVE_SYNC_DCB_CTL_A)
+#define ADAPTIVE_SYNC_COUNTER_EN REG_BIT(31)
+
#define _TRANS_VRR_CTL_A 0x60420
#define _TRANS_VRR_CTL_B 0x61420
#define _TRANS_VRR_CTL_C 0x62420
@@ -20,6 +67,7 @@
#define VRR_CTL_PIPELINE_FULL_MASK REG_GENMASK(10, 3)
#define VRR_CTL_PIPELINE_FULL(x) REG_FIELD_PREP(VRR_CTL_PIPELINE_FULL_MASK, (x))
#define VRR_CTL_PIPELINE_FULL_OVERRIDE REG_BIT(0)
+#define VRR_CTL_DCB_ADJ_ENABLE REG_BIT(28)
#define XELPD_VRR_CTL_VRR_GUARDBAND_MASK REG_GENMASK(15, 0)
#define XELPD_VRR_CTL_VRR_GUARDBAND(x) REG_FIELD_PREP(XELPD_VRR_CTL_VRR_GUARDBAND_MASK, (x))
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 05/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (3 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 06/17] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
` (16 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Calculate delayed vblank start position with the help of added
vmin/vmax stuff for next frame and final computation.
--v2:
- Correct Author details.
--v3:
- Separate register details from this patch.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 57 ++++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_vrr.h | 5 +++
2 files changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index adfd231eb578..ab4f8def821c 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -746,3 +746,60 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
if (crtc_state->vrr.enable)
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
}
+
+int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display,
+ TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(display, cpu_transcoder));
+
+ if (REG_FIELD_GET(VRR_DCB_ADJ_FLIPLINE_CNT_MASK, tmp) == 0)
+ return -1;
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_DCB_ADJ_FLIPLINE_MASK, tmp) + 1);
+}
+
+int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display,
+ TRANS_VRR_DCB_ADJ_VMAX_CFG(display, cpu_transcoder));
+
+ if (REG_FIELD_GET(VRR_DCB_ADJ_VMAX_CNT_MASK, tmp) == 0)
+ return -1;
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_DCB_ADJ_VMAX_MASK, tmp) + 1);
+}
+
+int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display,
+ TRANS_VRR_FLIPLINE_DCB(display, cpu_transcoder));
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_FLIPLINE_DCB_MASK, tmp) + 1);
+}
+
+int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 tmp = 0;
+
+ tmp = intel_de_read(display, TRANS_VRR_VMAX_DCB(display, cpu_transcoder));
+
+ return intel_vrr_vblank_start(crtc_state,
+ REG_FIELD_GET(VRR_VMAX_DCB_MASK, tmp) + 1);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 38bf9996b883..e62b8b50aec6 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -42,4 +42,9 @@ void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state);
void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
+int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state);
+int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state);
+int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state);
+int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state);
+
#endif /* __INTEL_VRR_H__ */
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 06/17] drm/i915/vrr: Add DC Balance params to crtc_state
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (4 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 05/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 07/17] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
` (15 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Add DC Balance params to crtc_state, also add state checker
params for related properties.
--v3:
- Seggregate crtc_state params with this patch. (Ankit)
--v4:
- Update commit message and header. (Ankit)
- Add +1 to VMIN and VMAX only when it is non-zero. (Ankit)
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +++++++
.../drm/i915/display/intel_display_types.h | 7 ++++++
drivers/gpu/drm/i915/display/intel_vrr.c | 24 +++++++++++++++++++
3 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index abf1db22fafe..c06047a8bf1b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5420,6 +5420,14 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_LLI(cmrr.cmrr_m);
PIPE_CONF_CHECK_LLI(cmrr.cmrr_n);
PIPE_CONF_CHECK_BOOL(cmrr.enable);
+ PIPE_CONF_CHECK_BOOL(vrr.dc_balance.enable);
+ PIPE_CONF_CHECK_I(vrr.dc_balance.vmin);
+ PIPE_CONF_CHECK_I(vrr.dc_balance.vmax);
+ PIPE_CONF_CHECK_I(vrr.dc_balance.guardband);
+ PIPE_CONF_CHECK_I(vrr.dc_balance.slope);
+ PIPE_CONF_CHECK_I(vrr.dc_balance.max_increase);
+ PIPE_CONF_CHECK_I(vrr.dc_balance.max_decrease);
+ PIPE_CONF_CHECK_I(vrr.dc_balance.vblank_target);
}
if (!fastset || intel_vrr_always_use_vrr_tg(display)) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 056219272c36..a41be29f1953 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1312,6 +1312,13 @@ struct intel_crtc_state {
u8 pipeline_full;
u16 flipline, vmin, vmax, guardband;
u32 vsync_end, vsync_start;
+ struct {
+ bool enable;
+ u16 vmin, vmax;
+ u16 guardband, slope;
+ u16 max_increase, max_decrease;
+ u16 vblank_target;
+ } dc_balance;
} vrr;
/* Content Match Refresh Rate state */
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index ab4f8def821c..726fa49558d1 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -10,6 +10,7 @@
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dp.h"
+#include "intel_dmc_regs.h"
#include "intel_vrr.h"
#include "intel_vrr_regs.h"
@@ -676,6 +677,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ enum pipe pipe = crtc->pipe;
u32 trans_vrr_ctl, trans_vrr_vsync;
bool vrr_enable;
@@ -738,6 +741,27 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
else
crtc_state->vrr.enable = vrr_enable;
+ if (HAS_VRR_DC_BALANCE(display)) {
+ crtc_state->vrr.dc_balance.enable =
+ intel_de_read(display, PIPEDMC_DCB_CTL(pipe)) & PIPEDMC_ADAPTIVE_DCB_ENABLE;
+ crtc_state->vrr.dc_balance.vmin =
+ intel_de_read(display, PIPEDMC_DCB_VMIN(pipe)) ?
+ intel_de_read(display, PIPEDMC_DCB_VMIN(pipe)) + 1 : 0;
+ crtc_state->vrr.dc_balance.vmax =
+ intel_de_read(display, PIPEDMC_DCB_VMAX(pipe)) ?
+ intel_de_read(display, PIPEDMC_DCB_VMAX(pipe)) + 1 : 0;
+ crtc_state->vrr.dc_balance.guardband =
+ intel_de_read(display, PIPEDMC_DCB_GUARDBAND(pipe));
+ crtc_state->vrr.dc_balance.max_increase =
+ intel_de_read(display, PIPEDMC_DCB_MAX_INCREASE(pipe));
+ crtc_state->vrr.dc_balance.max_decrease =
+ intel_de_read(display, PIPEDMC_DCB_MAX_DECREASE(pipe));
+ crtc_state->vrr.dc_balance.slope =
+ intel_de_read(display, PIPEDMC_DCB_SLOPE(pipe));
+ crtc_state->vrr.dc_balance.vblank_target =
+ intel_de_read(display, PIPEDMC_DCB_VBLANK(pipe));
+ }
+
/*
* #TODO: For Both VRR and CMRR the flag I915_MODE_FLAG_VRR is set for mode_flags.
* Since CMRR is currently disabled, set this flag for VRR for now.
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 07/17] drm/i915/vrr: Add state dump for DC Balance params
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (5 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 06/17] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 08/17] drm/i915/vrr: Add compute config " Mitul Golani
` (14 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Add state dump for dc balance params to track DC Balance
crtc state config.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 0c7f91046996..7a3d97df24c0 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -304,6 +304,14 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
drm_printf(&p, "vrr: vmin vblank: %d, vmax vblank: %d, vmin vtotal: %d, vmax vtotal: %d\n",
intel_vrr_vmin_vblank_start(pipe_config), intel_vrr_vmax_vblank_start(pipe_config),
intel_vrr_vmin_vtotal(pipe_config), intel_vrr_vmax_vtotal(pipe_config));
+ drm_printf(&p, "vrr: dc balance: %s, vmin: %d vmax: %d guardband: %d, slope: %d max increase: %d max decrease: %d Vblank target: %d\n",
+ str_yes_no(pipe_config->vrr.dc_balance.enable),
+ pipe_config->vrr.dc_balance.vmin, pipe_config->vrr.dc_balance.vmax,
+ pipe_config->vrr.dc_balance.guardband,
+ pipe_config->vrr.dc_balance.slope,
+ pipe_config->vrr.dc_balance.max_increase,
+ pipe_config->vrr.dc_balance.max_decrease,
+ pipe_config->vrr.dc_balance.vblank_target);
drm_printf(&p, "requested mode: " DRM_MODE_FMT "\n",
DRM_MODE_ARG(&pipe_config->hw.mode));
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 08/17] drm/i915/vrr: Add compute config for DC Balance params
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (6 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 07/17] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
` (13 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Compute DC Balance parameters and tunable params based on
experiments.
--v2:
- Document tunable params. (Ankit)
--v3:
- Add line spaces to compute config. (Ankit)
- Remove redundancy checks.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 25 ++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 726fa49558d1..dcaae7631b0a 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -16,6 +16,13 @@
#define FIXED_POINT_PRECISION 100
#define CMRR_PRECISION_TOLERANCE 10
+/*
+ * Tunable parameters for DC Balance correction.
+ * These are captured based on experimentations.
+ */
+#define DCB_CORRECTION_SENSITIVITY 30
+#define DCB_CORRECTION_AGGRESSIVENESS 1000
+#define DCB_BLANK_TARGET 50
bool intel_vrr_is_capable(struct intel_connector *connector)
{
@@ -409,6 +416,24 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
(crtc_state->hw.adjusted_mode.crtc_vtotal -
crtc_state->hw.adjusted_mode.vsync_end);
}
+
+ if (crtc_state->vrr.dc_balance.enable) {
+ crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
+ crtc_state->vrr.dc_balance.vmin = crtc_state->vrr.vmin;
+ crtc_state->vrr.dc_balance.max_increase =
+ crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+ crtc_state->vrr.dc_balance.max_decrease =
+ crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+ crtc_state->vrr.dc_balance.guardband =
+ DIV_ROUND_UP(crtc_state->vrr.dc_balance.vmax *
+ DCB_CORRECTION_SENSITIVITY, 100);
+ crtc_state->vrr.dc_balance.slope =
+ DIV_ROUND_UP(DCB_CORRECTION_AGGRESSIVENESS * 10,
+ crtc_state->vrr.dc_balance.guardband);
+ crtc_state->vrr.dc_balance.vblank_target =
+ DIV_ROUND_UP((crtc_state->vrr.vmax - crtc_state->vrr.vmin) *
+ DCB_BLANK_TARGET, 100);
+ }
}
void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (7 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 08/17] drm/i915/vrr: Add compute config " Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-27 6:17 ` Nautiyal, Ankit K
2025-05-13 5:16 ` [PATCH v5 10/17] drm/i915: Extract vrr_vblank_start() Mitul Golani
` (12 subsequent siblings)
21 siblings, 1 reply; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Write DC Balance parameters to hw registers.
--v2:
- Update commit header.
- Separate crtc_state params from this patch. (Ankit)
--v3:
- Write registers at compute config.
- Update condition for write.
--v4:
- Address issue with state checker.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 26 ++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index dcaae7631b0a..b2348ae10a1a 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -627,6 +627,23 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
}
}
+
+ if (crtc_state->vrr.dc_balance.enable) {
+ intel_de_write(display, PIPEDMC_DCB_VMIN(pipe),
+ crtc_state->vrr.dc_balance.vmin - 1);
+ intel_de_write(display, PIPEDMC_DCB_VMAX(pipe),
+ crtc_state->vrr.dc_balance.vmax - 1);
+ intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe),
+ crtc_state->vrr.dc_balance.max_increase);
+ intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe),
+ crtc_state->vrr.dc_balance.max_decrease);
+ intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe),
+ crtc_state->vrr.dc_balance.guardband);
+ intel_de_write(display, PIPEDMC_DCB_SLOPE(pipe),
+ crtc_state->vrr.dc_balance.slope);
+ intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe),
+ crtc_state->vrr.dc_balance.vblank_target);
+ }
}
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
@@ -637,6 +654,15 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
if (!old_crtc_state->vrr.enable)
return;
+ if (old_crtc_state->vrr.dc_balance.enable) {
+ intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0);
+ intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0);
+ intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe), 0);
+ intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe), 0);
+ intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe), 0);
+ intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe), 0);
+ }
+
if (!intel_vrr_always_use_vrr_tg(display)) {
intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
trans_vrr_ctl(old_crtc_state));
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 10/17] drm/i915: Extract vrr_vblank_start()
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (8 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 11/17] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
` (11 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Initialise delayed vblank position for evasion logic.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vblank.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 139fa5deba80..680013f00fc0 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -642,6 +642,14 @@ intel_pre_commit_crtc_state(struct intel_atomic_state *state,
return pre_commit_crtc_state(old_crtc_state, new_crtc_state);
}
+static int vrr_vblank_start(const struct intel_crtc_state *crtc_state)
+{
+ if (intel_vrr_is_push_sent(crtc_state))
+ return intel_vrr_vmin_vblank_start(crtc_state);
+ else
+ return intel_vrr_vmax_vblank_start(crtc_state);
+}
+
void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
const struct intel_crtc_state *new_crtc_state,
struct intel_vblank_evade_ctx *evade)
@@ -668,10 +676,7 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
drm_WARN_ON(crtc->base.dev, intel_crtc_needs_modeset(new_crtc_state) ||
new_crtc_state->update_m_n || new_crtc_state->update_lrr);
- if (intel_vrr_is_push_sent(crtc_state))
- evade->vblank_start = intel_vrr_vmin_vblank_start(crtc_state);
- else
- evade->vblank_start = intel_vrr_vmax_vblank_start(crtc_state);
+ evade->vblank_start = vrr_vblank_start(crtc_state);
vblank_delay = intel_vrr_vblank_delay(crtc_state);
} else {
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 11/17] drm/i915/vrr: Implement vblank evasion with DC balancing
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (9 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 10/17] drm/i915: Extract vrr_vblank_start() Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 12/17] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
` (10 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add vblank evasion logic when vrr is already enabled along with
dc balance is computed.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dsb.c | 31 ++++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_vblank.c | 26 +++++++++++++++--
2 files changed, 53 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 481488d1fe67..14b9edbcc6c8 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -578,7 +578,36 @@ void intel_dsb_vblank_evade(struct intel_atomic_state *state,
if (crtc_state->has_psr)
intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_OUT, 0, 0);
- if (pre_commit_is_vrr_active(state, crtc)) {
+ if (pre_commit_is_vrr_active(state, crtc) && crtc_state->vrr.dc_balance.enable) {
+ int vblank_delay = intel_vrr_vblank_delay(crtc_state);
+ int vmin_vblank_start, vmax_vblank_start;
+
+ vmin_vblank_start = intel_vrr_dcb_vmin_vblank_start_next(crtc_state);
+
+ if (vmin_vblank_start >= 0) {
+ end = vmin_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+ }
+
+ vmax_vblank_start = intel_vrr_dcb_vmax_vblank_start_next(crtc_state);
+
+ if (vmax_vblank_start >= 0) {
+ end = vmax_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+ }
+
+ vmin_vblank_start = intel_vrr_dcb_vmin_vblank_start_final(crtc_state);
+ end = vmin_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+
+ vmax_vblank_start = intel_vrr_dcb_vmax_vblank_start_final(crtc_state);
+ end = vmax_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+ } else if (pre_commit_is_vrr_active(state, crtc)) {
int vblank_delay = intel_vrr_vblank_delay(crtc_state);
end = intel_vrr_vmin_vblank_start(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 680013f00fc0..eb74d08d6690 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -644,10 +644,30 @@ intel_pre_commit_crtc_state(struct intel_atomic_state *state,
static int vrr_vblank_start(const struct intel_crtc_state *crtc_state)
{
- if (intel_vrr_is_push_sent(crtc_state))
- return intel_vrr_vmin_vblank_start(crtc_state);
+ bool is_push_sent = intel_vrr_is_push_sent(crtc_state);
+ int vblank_start;
+
+ if (!crtc_state->vrr.dc_balance.enable) {
+ if (is_push_sent)
+ return intel_vrr_vmin_vblank_start(crtc_state);
+ else
+ return intel_vrr_vmax_vblank_start(crtc_state);
+ }
+
+ if (is_push_sent)
+ vblank_start = intel_vrr_dcb_vmin_vblank_start_next(crtc_state);
else
- return intel_vrr_vmax_vblank_start(crtc_state);
+ vblank_start = intel_vrr_dcb_vmax_vblank_start_next(crtc_state);
+
+ if (vblank_start >= 0)
+ return vblank_start;
+
+ if (is_push_sent)
+ vblank_start = intel_vrr_dcb_vmin_vblank_start_final(crtc_state);
+ else
+ vblank_start = intel_vrr_dcb_vmax_vblank_start_final(crtc_state);
+
+ return vblank_start;
}
void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 12/17] drm/i915/dsb: Add pipedmc dc balance enable/disable
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (10 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 11/17] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 13/17] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
` (9 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add function to control DC balance enable/disable bit via DSB.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 18 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dmc.h | 5 +++++
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index b58189d24e7e..593f5140475b 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -30,6 +30,7 @@
#include "intel_de.h"
#include "intel_display_rpm.h"
#include "intel_display_power_well.h"
+#include "intel_display_types.h"
#include "intel_dmc.h"
#include "intel_dmc_regs.h"
#include "intel_step.h"
@@ -1403,3 +1404,20 @@ void intel_dmc_debugfs_register(struct intel_display *display)
debugfs_create_file("i915_dmc_info", 0444, minor->debugfs_root,
display, &intel_dmc_debugfs_status_fops);
}
+
+void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc)
+{
+ struct intel_display *display = to_intel_display(crtc);
+ enum pipe pipe = crtc->pipe;
+
+ intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe),
+ PIPEDMC_ADAPTIVE_DCB_ENABLE);
+}
+
+void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc)
+{
+ struct intel_display *display = to_intel_display(crtc);
+ enum pipe pipe = crtc->pipe;
+
+ intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe), 0);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
index bd1c459b0075..48869f19079a 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
@@ -9,9 +9,11 @@
#include <linux/types.h>
enum pipe;
+struct intel_crtc;
struct drm_printer;
struct intel_display;
struct intel_dmc_snapshot;
+struct intel_dsb;
void intel_dmc_init(struct intel_display *display);
void intel_dmc_load_program(struct intel_display *display);
@@ -34,4 +36,7 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display, bool star
void assert_dmc_loaded(struct intel_display *display);
+void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc);
+void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc);
+
#endif /* __INTEL_DMC_H__ */
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 13/17] drm/i915/vrr: Restructure VRR enablement bit
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (11 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 12/17] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 14/17] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
` (8 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Restructure bits for VRR enablement.
--v2:
- Separate multiple enablement from one patch.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 27 ++++++++++++------------
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index b2348ae10a1a..88ac4d93586b 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -603,6 +603,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 ctl;
if (!crtc_state->vrr.enable)
return;
@@ -617,17 +618,6 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
TRANS_PUSH_EN);
- if (!intel_vrr_always_use_vrr_tg(display)) {
- if (crtc_state->cmrr.enable) {
- intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
- VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE |
- trans_vrr_ctl(crtc_state));
- } else {
- intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
- VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
- }
- }
-
if (crtc_state->vrr.dc_balance.enable) {
intel_de_write(display, PIPEDMC_DCB_VMIN(pipe),
crtc_state->vrr.dc_balance.vmin - 1);
@@ -644,16 +634,29 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe),
crtc_state->vrr.dc_balance.vblank_target);
}
+
+ ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
+ if (crtc_state->cmrr.enable)
+ ctl |= VRR_CTL_CMRR_ENABLE;
+
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), ctl);
}
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_display *display = to_intel_display(old_crtc_state);
enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
+ u32 ctl;
if (!old_crtc_state->vrr.enable)
return;
+ ctl = trans_vrr_ctl(old_crtc_state);
+ if (intel_vrr_always_use_vrr_tg(display))
+ ctl |= VRR_CTL_VRR_ENABLE;
+
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), ctl);
+
if (old_crtc_state->vrr.dc_balance.enable) {
intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0);
intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0);
@@ -664,8 +667,6 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
}
if (!intel_vrr_always_use_vrr_tg(display)) {
- intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
- trans_vrr_ctl(old_crtc_state));
intel_de_wait_for_clear(display,
TRANS_VRR_STATUS(display, cpu_transcoder),
VRR_STATUS_VRR_EN_LIVE, 1000);
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 14/17] drm/i915/vrr: Pause DC Balancing for DSB commits
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (12 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 13/17] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 15/17] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
` (7 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pause the DMC DC Balancing for the remainder of the
commit so that vmin/vmax won't change after we've baked
them into the DSB vblank evasion commands.
--v2:
- Remove typo. (Ankit)
- Separate vrr enable structuring. (Ankit)
--v3:
- Add gaurd before accessing DC balance bits.
- Remove redundancy checks.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++++++++++++
drivers/gpu/drm/i915/display/intel_vrr.c | 9 +++++++++
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c06047a8bf1b..d1a2e694b6a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7217,6 +7217,21 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
}
if (new_crtc_state->use_dsb) {
+ if (new_crtc_state->vrr.dc_balance.enable) {
+ /*
+ * Pause the DMC DC balancing for the remainder of
+ * the commit so that vmin/vmax won't change after
+ * we've baked them into the DSB vblank evasion
+ * commands.
+ *
+ * FIXME maybe need a small delay here to make sure
+ * DMC has finished updating the values? Or we need
+ * a better DMC<->driver protocol that gives is real
+ * guarantees about that...
+ */
+ intel_pipedmc_dcb_disable(NULL, crtc);
+ }
+
if (intel_crtc_needs_color_update(new_crtc_state))
intel_color_commit_noarm(new_crtc_state->dsb_commit,
new_crtc_state);
@@ -7253,6 +7268,8 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
intel_dsb_wait_vblank_delay(state, new_crtc_state->dsb_commit);
intel_vrr_check_push_sent(new_crtc_state->dsb_commit, new_crtc_state);
+ if (new_crtc_state->vrr.dc_balance.enable)
+ intel_pipedmc_dcb_enable(new_crtc_state->dsb_commit, crtc);
intel_dsb_interrupt(new_crtc_state->dsb_commit);
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 88ac4d93586b..3a5d29327d4d 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -9,6 +9,7 @@
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_types.h"
+#include "intel_dmc.h"
#include "intel_dp.h"
#include "intel_dmc_regs.h"
#include "intel_vrr.h"
@@ -602,6 +603,7 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
u32 ctl;
@@ -640,17 +642,24 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
ctl |= VRR_CTL_CMRR_ENABLE;
intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), ctl);
+
+ if (crtc_state->vrr.dc_balance.enable)
+ intel_pipedmc_dcb_enable(NULL, crtc);
}
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_display *display = to_intel_display(old_crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
u32 ctl;
if (!old_crtc_state->vrr.enable)
return;
+ if (old_crtc_state->vrr.dc_balance.enable)
+ intel_pipedmc_dcb_disable(NULL, crtc);
+
ctl = trans_vrr_ctl(old_crtc_state);
if (intel_vrr_always_use_vrr_tg(display))
ctl |= VRR_CTL_VRR_ENABLE;
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 15/17] drm/i915/vrr: Add function to check if DC Balance Possible
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (13 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 14/17] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:16 ` [PATCH v5 16/17] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
` (6 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Add function to check if DC Balance possibile on
requested PIPE and also validate along with DISPLAY_VER
check.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 3a5d29327d4d..cd14d7efb863 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -256,6 +256,22 @@ void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state)
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
}
+static
+int intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ enum pipe pipe = crtc->pipe;
+
+ /*
+ * FIXME: Currently Firmware supports DC Balancing on PIPE A
+ * and PIPE B. Account those limitation while computing DC
+ * Balance parameters.
+ */
+ return (HAS_VRR_DC_BALANCE(display) &&
+ ((pipe == PIPE_A) || (pipe == PIPE_B)));
+}
+
static
void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
{
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 16/17] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (14 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 15/17] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
@ 2025-05-13 5:16 ` Mitul Golani
2025-05-13 5:17 ` [PATCH v5 17/17] drm/i915/vrr: Enable DC Balance bit Mitul Golani
` (5 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:16 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Configure PIPEDMC_EVT_CTL_3 register with required event flags.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 20 ++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dmc.h | 2 ++
drivers/gpu/drm/i915/display/intel_vrr.c | 11 +++++++++--
3 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 593f5140475b..077bb6bb0bb4 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -534,6 +534,26 @@ void intel_dmc_block_pkgc(struct intel_display *display, enum pipe pipe,
PIPEDMC_BLOCK_PKGC_SW_BLOCK_PKGC_ALWAYS : 0);
}
+void intel_dmc_configure_dc_balance_ctl_regs(struct intel_display *display,
+ enum pipe pipe, bool enable)
+{
+ u32 val;
+
+ if (enable)
+ val = DMC_EVT_CTL_ENABLE | DMC_EVT_CTL_RECURRING |
+ REG_FIELD_PREP(DMC_EVT_CTL_TYPE_MASK,
+ DMC_EVT_CTL_TYPE_EDGE_0_1) |
+ REG_FIELD_PREP(DMC_EVT_CTL_EVENT_ID_MASK,
+ DMC_EVT_CTL_EVENT_ID_ADAPTIVE_DC_BALANCE_TRIGGER);
+ else
+ val = REG_FIELD_PREP(DMC_EVT_CTL_EVENT_ID_MASK,
+ DMC_EVT_CTL_EVENT_ID_FALSE) |
+ REG_FIELD_PREP(DMC_EVT_CTL_TYPE_MASK,
+ DMC_EVT_CTL_TYPE_EDGE_0_1);
+
+ intel_de_write(display, PIPEDMC_EVT_CTL_3(pipe), val);
+}
+
/**
* intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblank() - start of PKG
* C-state exit
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
index 48869f19079a..a998c3614e1c 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
@@ -22,6 +22,8 @@ void intel_dmc_enable_pipe(struct intel_display *display, enum pipe pipe);
void intel_dmc_disable_pipe(struct intel_display *display, enum pipe pipe);
void intel_dmc_block_pkgc(struct intel_display *display, enum pipe pipe,
bool block);
+void intel_dmc_configure_dc_balance_ctl_regs(struct intel_display *display,
+ enum pipe pipe, bool enable);
void intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblank(struct intel_display *display,
enum pipe pipe, bool enable);
void intel_dmc_fini(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index cd14d7efb863..5ca71df79430 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -620,7 +620,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ enum pipe pipe = crtc->pipe;
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
u32 ctl;
if (!crtc_state->vrr.enable)
@@ -659,22 +661,27 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), ctl);
- if (crtc_state->vrr.dc_balance.enable)
+ if (crtc_state->vrr.dc_balance.enable) {
+ intel_dmc_configure_dc_balance_ctl_regs(display, pipe, true);
intel_pipedmc_dcb_enable(NULL, crtc);
+ }
}
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_display *display = to_intel_display(old_crtc_state);
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
+ enum pipe pipe = crtc->pipe;
enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
u32 ctl;
if (!old_crtc_state->vrr.enable)
return;
- if (old_crtc_state->vrr.dc_balance.enable)
+ if (old_crtc_state->vrr.dc_balance.enable) {
intel_pipedmc_dcb_disable(NULL, crtc);
+ intel_dmc_configure_dc_balance_ctl_regs(display, pipe, false);
+ }
ctl = trans_vrr_ctl(old_crtc_state);
if (intel_vrr_always_use_vrr_tg(display))
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v5 17/17] drm/i915/vrr: Enable DC Balance bit
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (15 preceding siblings ...)
2025-05-13 5:16 ` [PATCH v5 16/17] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
@ 2025-05-13 5:17 ` Mitul Golani
2025-05-13 6:02 ` ✗ Fi.CI.CHECKPATCH: warning for Enable/Disable DC balance along with VRR DSB (rev5) Patchwork
` (4 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Mitul Golani @ 2025-05-13 5:17 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
Enable DC Balance from vrr compute config and also add
enable/disable frame counters for DC Balance odd and even
frame count calculation.
--v2:
Update commit message
--v3:
- Driver should not control adjustment enable bit, as that
is already being controlled by firmware. Release bit from
driver computation.
- Commit message update.
--v4:
- Configure PIPEDMC_EVT_CTL enable/disable call.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 5ca71df79430..25e8c76990d2 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -277,6 +277,9 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
{
crtc_state->vrr.enable = true;
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+
+ if (intel_vrr_dc_balance_possible(crtc_state))
+ crtc_state->vrr.dc_balance.enable = true;
}
/*
@@ -663,6 +666,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
if (crtc_state->vrr.dc_balance.enable) {
intel_dmc_configure_dc_balance_ctl_regs(display, pipe, true);
+ intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(display, cpu_transcoder),
+ ADAPTIVE_SYNC_COUNTER_EN);
intel_pipedmc_dcb_enable(NULL, crtc);
}
}
@@ -680,6 +685,7 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
if (old_crtc_state->vrr.dc_balance.enable) {
intel_pipedmc_dcb_disable(NULL, crtc);
+ intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(display, cpu_transcoder), 0);
intel_dmc_configure_dc_balance_ctl_regs(display, pipe, false);
}
--
2.48.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Enable/Disable DC balance along with VRR DSB (rev5)
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (16 preceding siblings ...)
2025-05-13 5:17 ` [PATCH v5 17/17] drm/i915/vrr: Enable DC Balance bit Mitul Golani
@ 2025-05-13 6:02 ` Patchwork
2025-05-13 6:02 ` ✗ Fi.CI.SPARSE: " Patchwork
` (3 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-05-13 6:02 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-gfx
== Series Details ==
Series: Enable/Disable DC balance along with VRR DSB (rev5)
URL : https://patchwork.freedesktop.org/series/147799/
State : warning
== Summary ==
Error: dim checkpatch failed
8a8121283955 drm/i915/vrr: Refactor vmin/vmax stuff
7b0e110d5b05 drm/i915/display: Add source param for dc balance
1c1de00e3871 drm/i915/display: Add pipe dmc registers and bits for DC Balance
-:25: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-authored-by:
#25:
Co-authored-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
total: 0 errors, 1 warnings, 0 checks, 62 lines checked
c3e6da50f455 drm/i915/display: Add VRR DC balance registers
-:16: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-authored-by:
#16:
Co-authored-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
total: 0 errors, 1 warnings, 0 checks, 60 lines checked
49adc50c735f drm/i915/vrr: Add functions to read out vmin/vmax stuff
a73b1f89c77d drm/i915/vrr: Add DC Balance params to crtc_state
ac56175d94fd drm/i915/vrr: Add state dump for DC Balance params
fbd99d4063b1 drm/i915/vrr: Add compute config for DC Balance params
fcd78d8b3cac drm/i915/vrr: Write DC balance params to hw registers
6180a7fec7ff drm/i915: Extract vrr_vblank_start()
9b10aaf81b39 drm/i915/vrr: Implement vblank evasion with DC balancing
6f564a7724c2 drm/i915/dsb: Add pipedmc dc balance enable/disable
eace6a12bbbb drm/i915/vrr: Restructure VRR enablement bit
26008670b5ff drm/i915/vrr: Pause DC Balancing for DSB commits
a099b5774714 drm/i915/vrr: Add function to check if DC Balance Possible
0bcfeed3fbfc drm/i915/display: Add function to configure PIPEDMC_EVT_CTL
6e0186cc9c88 drm/i915/vrr: Enable DC Balance bit
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Enable/Disable DC balance along with VRR DSB (rev5)
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (17 preceding siblings ...)
2025-05-13 6:02 ` ✗ Fi.CI.CHECKPATCH: warning for Enable/Disable DC balance along with VRR DSB (rev5) Patchwork
@ 2025-05-13 6:02 ` Patchwork
2025-05-13 6:26 ` ✗ i915.CI.BAT: failure " Patchwork
` (2 subsequent siblings)
21 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-05-13 6:02 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-gfx
== Series Details ==
Series: Enable/Disable DC balance along with VRR DSB (rev5)
URL : https://patchwork.freedesktop.org/series/147799/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✗ i915.CI.BAT: failure for Enable/Disable DC balance along with VRR DSB (rev5)
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (18 preceding siblings ...)
2025-05-13 6:02 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2025-05-13 6:26 ` Patchwork
2025-05-15 7:55 ` Golani, Mitulkumar Ajitkumar
2025-05-15 8:20 ` ✓ i915.CI.BAT: success " Patchwork
2025-05-15 9:56 ` ✗ i915.CI.Full: failure " Patchwork
21 siblings, 1 reply; 27+ messages in thread
From: Patchwork @ 2025-05-13 6:26 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8870 bytes --]
== Series Details ==
Series: Enable/Disable DC balance along with VRR DSB (rev5)
URL : https://patchwork.freedesktop.org/series/147799/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16537 -> Patchwork_147799v5
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_147799v5 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_147799v5, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/index.html
Participating hosts (44 -> 43)
------------------------------
Missing (1): fi-elk-e7500
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_147799v5:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live:
- bat-arls-5: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arls-5/igt@i915_selftest@live.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arls-5/igt@i915_selftest@live.html
New tests
---------
New tests have been introduced between CI_DRM_16537 and Patchwork_147799v5:
### New IGT tests (6) ###
* igt@i915_selftest@bad-flink:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@basic-all:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@double-flink:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@flink-lifetime:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@huc-copy:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@read:
- Statuses :
- Exec time: [None] s
Known issues
------------
Here are the changes found in Patchwork_147799v5 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][3] -> [DMESG-FAIL][4] ([i915#12061]) +1 other test dmesg-fail
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-8/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-8/igt@i915_selftest@live.html
* igt@i915_selftest@live@gem:
- bat-arlh-2: [PASS][5] -> [ABORT][6] ([i915#13723])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live@gem.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live@gem.html
* igt@i915_selftest@live@hugepages:
- bat-arlh-3: [PASS][7] -> [DMESG-FAIL][8] ([i915#14243])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live@hugepages.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live@hugepages.html
* igt@i915_selftest@live@workarounds:
- bat-mtlp-6: [PASS][9] -> [DMESG-FAIL][10] ([i915#12061]) +1 other test dmesg-fail
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
- bat-mtlp-9: [PASS][11] -> [DMESG-FAIL][12] ([i915#12061]) +1 other test dmesg-fail
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- bat-rpls-4: [ABORT][13] ([i915#13571]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@sanitycheck:
- bat-apl-1: [DMESG-WARN][15] ([i915#13735]) -> [PASS][16] +79 other tests pass
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-apl-1/igt@i915_selftest@live@sanitycheck.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-apl-1/igt@i915_selftest@live@sanitycheck.html
- bat-dg2-14: [INCOMPLETE][17] ([i915#14201] / [i915#14212]) -> [PASS][18] +1 other test pass
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-dg2-14/igt@i915_selftest@live@sanitycheck.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-dg2-14/igt@i915_selftest@live@sanitycheck.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [DMESG-FAIL][19] ([i915#12061]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live@workarounds.html
- bat-arlh-2: [DMESG-FAIL][21] ([i915#12061]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live@workarounds.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live@workarounds.html
* igt@kms_chamelium_frames@dp-crc-fast:
- bat-dg2-13: [DMESG-WARN][23] ([i915#13733]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_pm_rpm@basic-pci-d3-state:
- bat-apl-1: [DMESG-WARN][25] ([i915#13735] / [i915#180]) -> [PASS][26] +49 other tests pass
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-arlh-3: [DMESG-FAIL][27] ([i915#12061]) -> [DMESG-FAIL][28] ([i915#14243])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live.html
- bat-arlh-2: [DMESG-FAIL][29] ([i915#12061]) -> [ABORT][30] ([i915#13723])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live.html
- bat-atsm-1: [DMESG-FAIL][31] ([i915#12061] / [i915#13929]) -> [DMESG-FAIL][32] ([i915#12061] / [i915#14204])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-atsm-1/igt@i915_selftest@live.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][33] ([i915#13929]) -> [DMESG-FAIL][34] ([i915#14204])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-atsm-1/igt@i915_selftest@live@mman.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#13571]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13571
[i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
[i915#13733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13733
[i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14201]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14201
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
[i915#14212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14212
[i915#14243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14243
[i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
Build changes
-------------
* Linux: CI_DRM_16537 -> Patchwork_147799v5
CI-20190529: 20190529
CI_DRM_16537: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8362: 8362
Patchwork_147799v5: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/index.html
[-- Attachment #2: Type: text/html, Size: 10940 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers
2025-05-13 5:16 ` [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers Mitul Golani
@ 2025-05-13 7:15 ` Jani Nikula
0 siblings, 0 replies; 27+ messages in thread
From: Jani Nikula @ 2025-05-13 7:15 UTC (permalink / raw)
To: Mitul Golani, intel-gfx, intel-xe; +Cc: ankit.k.nautiyal, ville.syrjala
On Tue, 13 May 2025, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote:
> Add VRR register offsets and bits to access DC Balance configuration.
>
> --v2:
> - Separate register definitions. (Ankit)
> - Remove usage of dev_priv. (Jani, Nikula)
>
> --v3:
> - Convert register address offset, from capital to small. (Ankit)
> - Move mask bits near to register offsets. (Ankit)
>
> Co-authored-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr_regs.h | 48 +++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
> index 6ed0e0dc97e7..204d5b35bc4b 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
> @@ -9,6 +9,53 @@
> #include "intel_display_reg_defs.h"
>
> /* VRR registers */
> +#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_A 0x604d4
> +#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_B 0x614d4
> +#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_C 0x624d4
> +#define _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_D 0x634d4
> +#define TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(display, \
> + trans) _MMIO_TRANS2(display, trans, \
> + _TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_A)
None of these need _MMIO_TRANS2() AFAICT. Always use _MMIO_TRANS() when
possible.
BR,
Jani.
> +#define VRR_DCB_ADJ_FLIPLINE_CNT_MASK REG_GENMASK(31, 24)
> +#define VRR_DCB_ADJ_FLIPLINE_MASK REG_GENMASK(19, 0)
> +
> +#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_A 0x604d8
> +#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_B 0x614d8
> +#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_C 0x624d8
> +#define _TRANS_VRR_DCB_ADJ_VMAX_CFG_D 0x634d8
> +#define TRANS_VRR_DCB_ADJ_VMAX_CFG(display, trans) _MMIO_TRANS2(display, \
> + trans, \
> + _TRANS_VRR_DCB_ADJ_VMAX_CFG_A)
> +#define VRR_DCB_ADJ_VMAX_CNT_MASK REG_GENMASK(31, 24)
> +#define VRR_DCB_ADJ_VMAX_MASK REG_GENMASK(19, 0)
> +
> +#define _TRANS_VRR_FLIPLINE_DCB_A 0x60418
> +#define _TRANS_VRR_FLIPLINE_DCB_B 0x61418
> +#define _TRANS_VRR_FLIPLINE_DCB_C 0x62418
> +#define _TRANS_VRR_FLIPLINE_DCB_D 0x63418
> +#define TRANS_VRR_FLIPLINE_DCB(display, trans) _MMIO_TRANS2(display, \
> + trans, \
> + _TRANS_VRR_FLIPLINE_DCB_A)
> +#define VRR_FLIPLINE_DCB_MASK REG_GENMASK(19, 0)
> +
> +#define _TRANS_VRR_VMAX_DCB_A 0x60414
> +#define _TRANS_VRR_VMAX_DCB_B 0x61414
> +#define _TRANS_VRR_VMAX_DCB_C 0x62414
> +#define _TRANS_VRR_VMAX_DCB_D 0x63414
> +#define TRANS_VRR_VMAX_DCB(display, trans) _MMIO_TRANS2(display, \
> + trans, \
> + _TRANS_VRR_VMAX_DCB_A)
> +#define VRR_VMAX_DCB_MASK REG_GENMASK(19, 0)
> +
> +#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_A 0x604c0
> +#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_B 0x614c0
> +#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_C 0x624c0
> +#define _TRANS_ADAPTIVE_SYNC_DCB_CTL_D 0x634c0
> +#define TRANS_ADAPTIVE_SYNC_DCB_CTL(display, trans) _MMIO_TRANS2(display, \
> + trans, \
> + _TRANS_ADAPTIVE_SYNC_DCB_CTL_A)
> +#define ADAPTIVE_SYNC_COUNTER_EN REG_BIT(31)
> +
> #define _TRANS_VRR_CTL_A 0x60420
> #define _TRANS_VRR_CTL_B 0x61420
> #define _TRANS_VRR_CTL_C 0x62420
> @@ -20,6 +67,7 @@
> #define VRR_CTL_PIPELINE_FULL_MASK REG_GENMASK(10, 3)
> #define VRR_CTL_PIPELINE_FULL(x) REG_FIELD_PREP(VRR_CTL_PIPELINE_FULL_MASK, (x))
> #define VRR_CTL_PIPELINE_FULL_OVERRIDE REG_BIT(0)
> +#define VRR_CTL_DCB_ADJ_ENABLE REG_BIT(28)
> #define XELPD_VRR_CTL_VRR_GUARDBAND_MASK REG_GENMASK(15, 0)
> #define XELPD_VRR_CTL_VRR_GUARDBAND(x) REG_FIELD_PREP(XELPD_VRR_CTL_VRR_GUARDBAND_MASK, (x))
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: ✗ i915.CI.BAT: failure for Enable/Disable DC balance along with VRR DSB (rev5)
2025-05-13 6:26 ` ✗ i915.CI.BAT: failure " Patchwork
@ 2025-05-15 7:55 ` Golani, Mitulkumar Ajitkumar
0 siblings, 0 replies; 27+ messages in thread
From: Golani, Mitulkumar Ajitkumar @ 2025-05-15 7:55 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org
[-- Attachment #1: Type: text/plain, Size: 9293 bytes --]
Hello,
Mentioned BAT issue on this patch series is not related to my changes.
Requested to re report
Regards,
Mitul
From: Patchwork <patchwork@emeril.freedesktop.org>
Sent: 13 May 2025 11:56
To: Golani, Mitulkumar Ajitkumar <mitulkumar.ajitkumar.golani@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ i915.CI.BAT: failure for Enable/Disable DC balance along with VRR DSB (rev5)
Patch Details
Series:
Enable/Disable DC balance along with VRR DSB (rev5)
URL:
https://patchwork.freedesktop.org/series/147799/
State:
failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/index.html
CI Bug Log - changes from CI_DRM_16537 -> Patchwork_147799v5
Summary
FAILURE
Serious unknown changes coming with Patchwork_147799v5 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_147799v5, please notify your bug team (I915-ci-infra@lists.freedesktop.org<mailto:I915-ci-infra@lists.freedesktop.org>) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/index.html
Participating hosts (44 -> 43)
Missing (1): fi-elk-e7500
Possible new issues
Here are the unknown changes that may have been introduced in Patchwork_147799v5:
IGT changes
Possible regressions
* igt@i915_selftest@live:
* bat-arls-5: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arls-5/igt@i915_selftest@live.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arls-5/igt@i915_selftest@live.html> +1 other test incomplete
New tests
New tests have been introduced between CI_DRM_16537 and Patchwork_147799v5:
New IGT tests (6)
* igt@i915_selftest@bad-flink:
* Statuses :
* Exec time: [None] s
* igt@i915_selftest@basic-all:
* Statuses :
* Exec time: [None] s
* igt@i915_selftest@double-flink:
* Statuses :
* Exec time: [None] s
* igt@i915_selftest@flink-lifetime:
* Statuses :
* Exec time: [None] s
* igt@i915_selftest@huc-copy:
* Statuses :
* Exec time: [None] s
* igt@i915_selftest@read:
* Statuses :
* Exec time: [None] s
Known issues
Here are the changes found in Patchwork_147799v5 that come from known issues:
IGT changes
Issues hit
* igt@i915_selftest@live:
* bat-mtlp-8: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-8/igt@i915_selftest@live.html> -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-8/igt@i915_selftest@live.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061>) +1 other test dmesg-fail
* igt@i915_selftest@live@gem:
* bat-arlh-2: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live@gem.html> -> ABORT<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live@gem.html> (i915#13723<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723>)
* igt@i915_selftest@live@hugepages:
* bat-arlh-3: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live@hugepages.html> -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live@hugepages.html> (i915#14243<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14243>)
* igt@i915_selftest@live@workarounds:
* bat-mtlp-6: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-6/igt@i915_selftest@live@workarounds.html> -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-6/igt@i915_selftest@live@workarounds.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061>) +1 other test dmesg-fail
* bat-mtlp-9: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-9/igt@i915_selftest@live@workarounds.html> -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-9/igt@i915_selftest@live@workarounds.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061>) +1 other test dmesg-fail
Possible fixes
* igt@i915_pm_rpm@module-reload:
* bat-rpls-4: ABORT<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-rpls-4/igt@i915_pm_rpm@module-reload.html> (i915#13571<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13571>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-rpls-4/igt@i915_pm_rpm@module-reload.html>
* igt@i915_selftest@live@sanitycheck:
* bat-apl-1: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-apl-1/igt@i915_selftest@live@sanitycheck.html> (i915#13735<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-apl-1/igt@i915_selftest@live@sanitycheck.html> +79 other tests pass
* bat-dg2-14: INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-dg2-14/igt@i915_selftest@live@sanitycheck.html> (i915#14201<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14201> / i915#14212<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14212>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-dg2-14/igt@i915_selftest@live@sanitycheck.html> +1 other test pass
* igt@i915_selftest@live@workarounds:
* bat-arlh-3: DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live@workarounds.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live@workarounds.html>
* bat-arlh-2: DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live@workarounds.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live@workarounds.html>
* igt@kms_chamelium_frames@dp-crc-fast:
* bat-dg2-13: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html> (i915#13733<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13733>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html>
* igt@kms_pm_rpm@basic-pci-d3-state:
* bat-apl-1: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html> (i915#13735<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735> / i915#180<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html> +49 other tests pass
Warnings
* igt@i915_selftest@live:
* bat-arlh-3: DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061>) -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live.html> (i915#14243<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14243>)
* bat-arlh-2: DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061>) -> ABORT<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live.html> (i915#13723<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723>)
* bat-atsm-1: DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-atsm-1/igt@i915_selftest@live.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061> / i915#13929<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929>) -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-atsm-1/igt@i915_selftest@live.html> (i915#12061<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061> / i915#14204<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204>)
* igt@i915_selftest@live@mman:
* bat-atsm-1: DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-atsm-1/igt@i915_selftest@live@mman.html> (i915#13929<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929>) -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-atsm-1/igt@i915_selftest@live@mman.html> (i915#14204<https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204>)
Build changes
* Linux: CI_DRM_16537 -> Patchwork_147799v5
CI-20190529: 20190529
CI_DRM_16537: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8362: 8362
Patchwork_147799v5: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
[-- Attachment #2: Type: text/html, Size: 34251 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✓ i915.CI.BAT: success for Enable/Disable DC balance along with VRR DSB (rev5)
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (19 preceding siblings ...)
2025-05-13 6:26 ` ✗ i915.CI.BAT: failure " Patchwork
@ 2025-05-15 8:20 ` Patchwork
2025-05-15 9:56 ` ✗ i915.CI.Full: failure " Patchwork
21 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-05-15 8:20 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8407 bytes --]
== Series Details ==
Series: Enable/Disable DC balance along with VRR DSB (rev5)
URL : https://patchwork.freedesktop.org/series/147799/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16537 -> Patchwork_147799v5
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/index.html
Participating hosts (44 -> 43)
------------------------------
Missing (1): fi-elk-e7500
New tests
---------
New tests have been introduced between CI_DRM_16537 and Patchwork_147799v5:
### New IGT tests (6) ###
* igt@i915_selftest@bad-flink:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@basic-all:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@double-flink:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@flink-lifetime:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@huc-copy:
- Statuses :
- Exec time: [None] s
* igt@i915_selftest@read:
- Statuses :
- Exec time: [None] s
Known issues
------------
Here are the changes found in Patchwork_147799v5 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][1] -> [DMESG-FAIL][2] ([i915#12061]) +1 other test dmesg-fail
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-8/igt@i915_selftest@live.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-8/igt@i915_selftest@live.html
- bat-arls-5: [PASS][3] -> [INCOMPLETE][4] ([i915#14282]) +1 other test incomplete
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arls-5/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arls-5/igt@i915_selftest@live.html
* igt@i915_selftest@live@gem:
- bat-arlh-2: [PASS][5] -> [ABORT][6] ([i915#13723])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live@gem.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live@gem.html
* igt@i915_selftest@live@hugepages:
- bat-arlh-3: [PASS][7] -> [DMESG-FAIL][8] ([i915#14243])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live@hugepages.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live@hugepages.html
* igt@i915_selftest@live@workarounds:
- bat-mtlp-6: [PASS][9] -> [DMESG-FAIL][10] ([i915#12061]) +1 other test dmesg-fail
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
- bat-mtlp-9: [PASS][11] -> [DMESG-FAIL][12] ([i915#12061]) +1 other test dmesg-fail
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- bat-rpls-4: [ABORT][13] ([i915#13571]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@sanitycheck:
- bat-apl-1: [DMESG-WARN][15] ([i915#13735]) -> [PASS][16] +79 other tests pass
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-apl-1/igt@i915_selftest@live@sanitycheck.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-apl-1/igt@i915_selftest@live@sanitycheck.html
- bat-dg2-14: [INCOMPLETE][17] ([i915#14201] / [i915#14212]) -> [PASS][18] +1 other test pass
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-dg2-14/igt@i915_selftest@live@sanitycheck.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-dg2-14/igt@i915_selftest@live@sanitycheck.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [DMESG-FAIL][19] ([i915#12061]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live@workarounds.html
- bat-arlh-2: [DMESG-FAIL][21] ([i915#12061]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live@workarounds.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live@workarounds.html
* igt@kms_chamelium_frames@dp-crc-fast:
- bat-dg2-13: [DMESG-WARN][23] ([i915#13733]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_pm_rpm@basic-pci-d3-state:
- bat-apl-1: [DMESG-WARN][25] ([i915#13735] / [i915#180]) -> [PASS][26] +49 other tests pass
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-arlh-3: [DMESG-FAIL][27] ([i915#12061]) -> [DMESG-FAIL][28] ([i915#14243])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-3/igt@i915_selftest@live.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-3/igt@i915_selftest@live.html
- bat-arlh-2: [DMESG-FAIL][29] ([i915#12061]) -> [ABORT][30] ([i915#13723])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-arlh-2/igt@i915_selftest@live.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-arlh-2/igt@i915_selftest@live.html
- bat-atsm-1: [DMESG-FAIL][31] ([i915#12061] / [i915#13929]) -> [DMESG-FAIL][32] ([i915#12061] / [i915#14204])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-atsm-1/igt@i915_selftest@live.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][33] ([i915#13929]) -> [DMESG-FAIL][34] ([i915#14204])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/bat-atsm-1/igt@i915_selftest@live@mman.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#13571]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13571
[i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
[i915#13733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13733
[i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14201]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14201
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
[i915#14212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14212
[i915#14243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14243
[i915#14282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14282
[i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
Build changes
-------------
* Linux: CI_DRM_16537 -> Patchwork_147799v5
CI-20190529: 20190529
CI_DRM_16537: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8362: 8362
Patchwork_147799v5: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/index.html
[-- Attachment #2: Type: text/html, Size: 10440 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✗ i915.CI.Full: failure for Enable/Disable DC balance along with VRR DSB (rev5)
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
` (20 preceding siblings ...)
2025-05-15 8:20 ` ✓ i915.CI.BAT: success " Patchwork
@ 2025-05-15 9:56 ` Patchwork
21 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2025-05-15 9:56 UTC (permalink / raw)
To: Mitul Golani; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 96886 bytes --]
== Series Details ==
Series: Enable/Disable DC balance along with VRR DSB (rev5)
URL : https://patchwork.freedesktop.org/series/147799/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16537_full -> Patchwork_147799v5_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_147799v5_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_147799v5_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_147799v5_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@flip-vs-suspend@a-hdmi-a2:
- shard-rkl: NOTRUN -> [INCOMPLETE][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@kms_flip@flip-vs-suspend@a-hdmi-a2.html
Known issues
------------
Here are the changes found in Patchwork_147799v5_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@crc32:
- shard-rkl: NOTRUN -> [SKIP][2] ([i915#6230])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@api_intel_bb@crc32.html
* igt@gem_basic@multigpu-create-close:
- shard-dg2: NOTRUN -> [SKIP][3] ([i915#7697])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@gem_basic@multigpu-create-close.html
* igt@gem_ccs@large-ctrl-surf-copy:
- shard-rkl: NOTRUN -> [SKIP][4] ([i915#13008])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@gem_ccs@large-ctrl-surf-copy.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-tglu-1: NOTRUN -> [SKIP][5] ([i915#6335])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-tglu: NOTRUN -> [SKIP][6] ([i915#6335])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@gem_create@create-ext-cpu-access-sanity-check.html
* igt@gem_ctx_freq@sysfs:
- shard-dg2: [PASS][7] -> [FAIL][8] ([i915#9561]) +1 other test fail
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-6/igt@gem_ctx_freq@sysfs.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-3/igt@gem_ctx_freq@sysfs.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg2: NOTRUN -> [SKIP][9] ([i915#8555])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox:
- shard-mtlp: [PASS][10] -> [DMESG-WARN][11] ([i915#13723])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-mtlp-1/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-7/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
* igt@gem_ctx_persistence@saturated-hostile-nopreempt:
- shard-dg2: NOTRUN -> [SKIP][12] ([i915#5882]) +7 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_ctx_persistence@saturated-hostile-nopreempt.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-rkl: NOTRUN -> [SKIP][13] ([i915#280])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@gem_ctx_sseu@invalid-sseu.html
- shard-tglu: NOTRUN -> [SKIP][14] ([i915#280])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_eio@reset-stress:
- shard-mtlp: [PASS][15] -> [ABORT][16] ([i915#13193] / [i915#13723]) +4 other tests abort
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-mtlp-2/igt@gem_eio@reset-stress.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-7/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@bonded-semaphore:
- shard-dg2-9: NOTRUN -> [SKIP][17] ([i915#4812])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_exec_balancer@bonded-semaphore.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: NOTRUN -> [SKIP][18] ([i915#4525]) +3 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-tglu: NOTRUN -> [SKIP][19] ([i915#4525])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_capture@capture-recoverable:
- shard-tglu: NOTRUN -> [SKIP][20] ([i915#6344])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_flush@basic-uc-prw-default:
- shard-dg2-9: NOTRUN -> [SKIP][21] ([i915#3539])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_exec_flush@basic-uc-prw-default.html
* igt@gem_exec_flush@basic-uc-set-default:
- shard-dg2: NOTRUN -> [SKIP][22] ([i915#3539])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_exec_flush@basic-uc-set-default.html
* igt@gem_exec_flush@basic-wb-ro-before-default:
- shard-dg2-9: NOTRUN -> [SKIP][23] ([i915#3539] / [i915#4852]) +2 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_exec_flush@basic-wb-ro-before-default.html
* igt@gem_exec_params@secure-non-root:
- shard-dg2: NOTRUN -> [SKIP][24] +3 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@gem_exec_params@secure-non-root.html
* igt@gem_exec_reloc@basic-gtt-wc:
- shard-mtlp: NOTRUN -> [SKIP][25] ([i915#3281]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@gem_exec_reloc@basic-gtt-wc.html
* igt@gem_exec_reloc@basic-scanout:
- shard-rkl: NOTRUN -> [SKIP][26] ([i915#3281]) +13 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@gem_exec_reloc@basic-scanout.html
* igt@gem_exec_reloc@basic-wc-active:
- shard-dg2: NOTRUN -> [SKIP][27] ([i915#3281]) +4 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_exec_reloc@basic-wc-active.html
* igt@gem_exec_reloc@basic-write-read-active:
- shard-dg2-9: NOTRUN -> [SKIP][28] ([i915#3281]) +5 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_exec_reloc@basic-write-read-active.html
* igt@gem_fence_thrash@bo-write-verify-x:
- shard-dg2-9: NOTRUN -> [SKIP][29] ([i915#4860])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_fence_thrash@bo-write-verify-x.html
* igt@gem_fenced_exec_thrash@no-spare-fences-busy:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#4860]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html
* igt@gem_huc_copy@huc-copy:
- shard-rkl: NOTRUN -> [SKIP][31] ([i915#2190])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@gem_huc_copy@huc-copy.html
- shard-glk: NOTRUN -> [SKIP][32] ([i915#2190])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-glk3/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-random:
- shard-mtlp: NOTRUN -> [SKIP][33] ([i915#4613])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-rkl: NOTRUN -> [SKIP][34] ([i915#4613]) +5 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@random:
- shard-glk: NOTRUN -> [SKIP][35] ([i915#4613])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-glk1/igt@gem_lmem_swapping@random.html
* igt@gem_lmem_swapping@smem-oom:
- shard-tglu-1: NOTRUN -> [SKIP][36] ([i915#4613])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2: [PASS][37] -> [TIMEOUT][38] ([i915#5493]) +1 other test timeout
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-8/igt@gem_lmem_swapping@smem-oom@lmem0.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-5/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-tglu: NOTRUN -> [SKIP][39] ([i915#4613]) +2 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_mmap_gtt@basic-small-bo-tiledx:
- shard-mtlp: NOTRUN -> [SKIP][40] ([i915#4077])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@gem_mmap_gtt@basic-small-bo-tiledx.html
* igt@gem_mmap_gtt@cpuset-medium-copy-xy:
- shard-dg2-9: NOTRUN -> [SKIP][41] ([i915#4077]) +4 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html
* igt@gem_mmap_gtt@isolation:
- shard-dg2: NOTRUN -> [SKIP][42] ([i915#4077]) +2 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@gem_mmap_gtt@isolation.html
* igt@gem_mmap_wc@bad-size:
- shard-dg2-9: NOTRUN -> [SKIP][43] ([i915#4083]) +3 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_mmap_wc@bad-size.html
* igt@gem_mmap_wc@read:
- shard-dg2: NOTRUN -> [SKIP][44] ([i915#4083]) +2 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@gem_mmap_wc@read.html
* igt@gem_partial_pwrite_pread@reads-display:
- shard-dg2: NOTRUN -> [SKIP][45] ([i915#3282]) +2 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_partial_pwrite_pread@reads-display.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- shard-rkl: NOTRUN -> [SKIP][46] ([i915#3282]) +10 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_pwrite@basic-exhaustion:
- shard-tglu: NOTRUN -> [WARN][47] ([i915#2658])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pwrite_snooped:
- shard-dg2-9: NOTRUN -> [SKIP][48] ([i915#3282])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_pwrite_snooped.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-rkl: NOTRUN -> [TIMEOUT][49] ([i915#12964])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-dg2: NOTRUN -> [SKIP][50] ([i915#4270])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_pxp@reject-modify-context-protection-off-3:
- shard-rkl: [PASS][51] -> [TIMEOUT][52] ([i915#12917] / [i915#12964]) +1 other test timeout
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-8/igt@gem_pxp@reject-modify-context-protection-off-3.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@gem_pxp@reject-modify-context-protection-off-3.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-dg2-9: NOTRUN -> [SKIP][53] ([i915#4270]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
- shard-rkl: NOTRUN -> [TIMEOUT][54] ([i915#12917] / [i915#12964]) +3 other tests timeout
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_render_copy@yf-tiled-to-vebox-x-tiled:
- shard-dg2: NOTRUN -> [SKIP][55] ([i915#5190] / [i915#8428]) +2 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@gem_render_copy@yf-tiled-to-vebox-x-tiled.html
* igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled:
- shard-dg2-9: NOTRUN -> [SKIP][56] ([i915#5190] / [i915#8428]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gem_render_copy@yf-tiled-to-vebox-yf-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#4079])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-untiled:
- shard-rkl: NOTRUN -> [SKIP][58] ([i915#8411]) +4 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-rkl: NOTRUN -> [SKIP][59] ([i915#3297] / [i915#3323])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-tglu-1: NOTRUN -> [SKIP][60] ([i915#3297]) +2 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@readonly-unsync:
- shard-dg2: NOTRUN -> [SKIP][61] ([i915#3297]) +1 other test skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@gem_userptr_blits@readonly-unsync.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-rkl: NOTRUN -> [SKIP][62] ([i915#3297]) +4 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@gem_userptr_blits@unsync-unmap-after-close.html
- shard-tglu: NOTRUN -> [SKIP][63] ([i915#3297]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@gem_userptr_blits@unsync-unmap-after-close.html
* igt@gem_workarounds@suspend-resume:
- shard-glk: NOTRUN -> [INCOMPLETE][64] ([i915#13356])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-glk3/igt@gem_workarounds@suspend-resume.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-rkl: [PASS][65] -> [INCOMPLETE][66] ([i915#13356])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-5/igt@gem_workarounds@suspend-resume-fd.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@gem_workarounds@suspend-resume-fd.html
* igt@gen7_exec_parse@bitmasks:
- shard-dg2-9: NOTRUN -> [SKIP][67] +4 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gen7_exec_parse@bitmasks.html
* igt@gen9_exec_parse@basic-rejected:
- shard-tglu: NOTRUN -> [SKIP][68] ([i915#2527] / [i915#2856]) +2 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@gen9_exec_parse@basic-rejected.html
* igt@gen9_exec_parse@batch-without-end:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#2856]) +2 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@gen9_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@bb-chained:
- shard-rkl: NOTRUN -> [SKIP][70] ([i915#2527]) +5 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@gen9_exec_parse@bb-chained.html
* igt@gen9_exec_parse@bb-large:
- shard-dg2-9: NOTRUN -> [SKIP][71] ([i915#2856])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@gen9_exec_parse@bb-large.html
* igt@gen9_exec_parse@unaligned-access:
- shard-tglu-1: NOTRUN -> [SKIP][72] ([i915#2527] / [i915#2856])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_drm_fdinfo@all-busy-idle-check-all:
- shard-dg2-9: NOTRUN -> [SKIP][73] ([i915#14123])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@i915_drm_fdinfo@all-busy-idle-check-all.html
* igt@i915_drm_fdinfo@isolation@rcs0:
- shard-dg2: NOTRUN -> [SKIP][74] ([i915#14073]) +7 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@i915_drm_fdinfo@isolation@rcs0.html
* igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs1:
- shard-dg2-9: NOTRUN -> [SKIP][75] ([i915#14073]) +7 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs1.html
* igt@i915_pm_freq_api@freq-suspend:
- shard-rkl: NOTRUN -> [SKIP][76] ([i915#8399])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@i915_pm_freq_api@freq-suspend.html
- shard-tglu: NOTRUN -> [SKIP][77] ([i915#8399])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@i915_pm_freq_api@freq-suspend.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-dg2: [PASS][78] -> [FAIL][79] ([i915#12942]) +1 other test fail
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-6/igt@i915_pm_rc6_residency@rc6-accuracy.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-3/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_pm_rps@min-max-config-idle:
- shard-dg2-9: NOTRUN -> [SKIP][80] ([i915#11681] / [i915#6621])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@i915_pm_rps@min-max-config-idle.html
* igt@i915_power@sanity:
- shard-rkl: NOTRUN -> [SKIP][81] ([i915#7984])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@i915_power@sanity.html
* igt@i915_selftest@live@workarounds:
- shard-mtlp: [PASS][82] -> [DMESG-FAIL][83] ([i915#12061]) +1 other test dmesg-fail
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-mtlp-6/igt@i915_selftest@live@workarounds.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-3/igt@i915_selftest@live@workarounds.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-tglu-1: NOTRUN -> [INCOMPLETE][84] ([i915#4817])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-rkl: [PASS][85] -> [INCOMPLETE][86] ([i915#4817])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-6/igt@i915_suspend@fence-restore-tiled2untiled.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@intel_hwmon@hwmon-read:
- shard-rkl: NOTRUN -> [SKIP][87] ([i915#7707])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@intel_hwmon@hwmon-read.html
* igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#4212])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-rkl: NOTRUN -> [SKIP][89] ([i915#12454] / [i915#12712])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-1-y-rc-ccs-cc:
- shard-tglu-1: NOTRUN -> [SKIP][90] ([i915#8709]) +3 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-1-y-rc-ccs-cc.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-4-y-rc-ccs-cc:
- shard-dg1: NOTRUN -> [SKIP][91] ([i915#8709]) +3 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-14/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-4-y-rc-ccs-cc.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-a-hdmi-a-2-x:
- shard-rkl: [PASS][92] -> [DMESG-WARN][93] ([i915#12964]) +6 other tests dmesg-warn
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-3/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-a-hdmi-a-2-x.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-a-hdmi-a-2-x.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-rkl: NOTRUN -> [SKIP][94] ([i915#9531])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-tglu: NOTRUN -> [SKIP][95] ([i915#1769] / [i915#3555])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_big_fb@4-tiled-addfb-size-offset-overflow:
- shard-tglu: NOTRUN -> [SKIP][96] ([i915#5286]) +3 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_big_fb@4-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][97] ([i915#5286]) +9 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-glk: NOTRUN -> [SKIP][98] +59 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-glk1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-tglu-1: NOTRUN -> [SKIP][99] ([i915#5286])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][100] ([i915#3638]) +3 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- shard-dg2-9: NOTRUN -> [SKIP][101] ([i915#4538] / [i915#5190]) +5 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg2: NOTRUN -> [SKIP][102] ([i915#4538] / [i915#5190]) +5 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][103] +29 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-2:
- shard-dg2-9: NOTRUN -> [SKIP][104] ([i915#10307] / [i915#6095]) +19 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-tglu: NOTRUN -> [SKIP][105] ([i915#12313]) +1 other test skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
- shard-dg2: NOTRUN -> [SKIP][106] ([i915#12313])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-ccs@pipe-b-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][107] ([i915#6095]) +24 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_ccs@bad-rotation-90-y-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][108] ([i915#10307] / [i915#6095]) +168 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-6/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc:
- shard-tglu: NOTRUN -> [SKIP][109] ([i915#6095]) +54 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][110] ([i915#14098] / [i915#6095]) +68 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2-9: NOTRUN -> [SKIP][111] ([i915#12805])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-b-dp-3:
- shard-dg2: NOTRUN -> [SKIP][112] ([i915#6095]) +15 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-11/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-b-dp-3.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][113] ([i915#6095]) +155 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-12/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-2:
- shard-dg2-9: NOTRUN -> [SKIP][114] ([i915#6095]) +4 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][115] ([i915#6095]) +58 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-8/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
- shard-dg2-9: NOTRUN -> [SKIP][117] ([i915#12313])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][118] ([i915#12313])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-2:
- shard-dg2-9: NOTRUN -> [SKIP][119] ([i915#13781]) +4 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_cdclk@mode-transition@pipe-b-hdmi-a-2.html
* igt@kms_cdclk@plane-scaling:
- shard-tglu: NOTRUN -> [SKIP][120] ([i915#3742])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-rkl: NOTRUN -> [SKIP][121] ([i915#11151] / [i915#7828]) +12 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
- shard-dg2-9: NOTRUN -> [SKIP][122] ([i915#11151] / [i915#7828]) +4 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-tglu: NOTRUN -> [SKIP][123] ([i915#11151] / [i915#7828]) +5 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-tglu-1: NOTRUN -> [SKIP][124] ([i915#11151] / [i915#7828]) +2 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#11151] / [i915#7828]) +4 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
* igt@kms_color@deep-color:
- shard-dg2-9: NOTRUN -> [SKIP][126] ([i915#3555]) +3 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_color@deep-color.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-3:
- shard-dg2: NOTRUN -> [FAIL][127] ([i915#7173])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-11/igt@kms_content_protection@atomic-dpms@pipe-a-dp-3.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-rkl: NOTRUN -> [SKIP][128] ([i915#3116]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-tglu: NOTRUN -> [SKIP][129] ([i915#3116] / [i915#3299]) +1 other test skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@mei-interface:
- shard-dg2: NOTRUN -> [SKIP][130] ([i915#9424])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_content_protection@mei-interface.html
- shard-rkl: NOTRUN -> [SKIP][131] ([i915#9424])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@srm:
- shard-dg2-9: NOTRUN -> [SKIP][132] ([i915#7118])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-rkl: NOTRUN -> [SKIP][133] ([i915#7118] / [i915#9424])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_content_protection@uevent.html
- shard-tglu: NOTRUN -> [SKIP][134] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-tglu: NOTRUN -> [SKIP][135] ([i915#13049]) +2 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#13049])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-rkl: NOTRUN -> [SKIP][137] ([i915#13049]) +3 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-random-64x21:
- shard-rkl: NOTRUN -> [FAIL][138] ([i915#13566]) +2 other tests fail
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_cursor_crc@cursor-random-64x21.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-tglu-1: NOTRUN -> [SKIP][139] ([i915#3555]) +1 other test skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-sliding-128x42:
- shard-tglu: [PASS][140] -> [FAIL][141] ([i915#13566]) +3 other tests fail
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-tglu-8/igt@kms_cursor_crc@cursor-sliding-128x42.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-7/igt@kms_cursor_crc@cursor-sliding-128x42.html
* igt@kms_cursor_crc@cursor-sliding-256x85:
- shard-rkl: [PASS][142] -> [FAIL][143] ([i915#13566])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-256x85.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-256x85.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-rkl: NOTRUN -> [SKIP][144] ([i915#3555]) +7 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-dg2: NOTRUN -> [SKIP][145] ([i915#3555])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-dg2: NOTRUN -> [SKIP][146] ([i915#13046] / [i915#5354]) +2 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-rkl: NOTRUN -> [SKIP][147] ([i915#4103])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- shard-dg2: NOTRUN -> [SKIP][148] ([i915#4103] / [i915#4213])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-dg2-9: NOTRUN -> [SKIP][149] ([i915#13046] / [i915#5354]) +3 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-rkl: [PASS][150] -> [FAIL][151] ([i915#2346]) +1 other test fail
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
- shard-rkl: NOTRUN -> [FAIL][152] ([i915#2346])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-tglu: NOTRUN -> [SKIP][153] ([i915#4103])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-dg2-9: NOTRUN -> [SKIP][154] ([i915#9833])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-tglu: NOTRUN -> [SKIP][155] ([i915#1769] / [i915#3555] / [i915#3804])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][156] ([i915#3804])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_dp_aux_dev:
- shard-dg2: [PASS][157] -> [SKIP][158] ([i915#1257])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-10/igt@kms_dp_aux_dev.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-4/igt@kms_dp_aux_dev.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2: NOTRUN -> [SKIP][159] ([i915#13749])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-rkl: NOTRUN -> [SKIP][160] ([i915#13749]) +1 other test skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_dp_link_training@non-uhbr-sst.html
- shard-tglu: NOTRUN -> [SKIP][161] ([i915#13749])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-rkl: NOTRUN -> [SKIP][162] ([i915#13748])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-dg2: [PASS][163] -> [SKIP][164] ([i915#13707])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-11/igt@kms_dp_linktrain_fallback@dp-fallback.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-8/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-rkl: NOTRUN -> [SKIP][165] ([i915#13707])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_draw_crc@draw-method-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][166] ([i915#8812])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_draw_crc@draw-method-mmap-wc.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-dg2-9: NOTRUN -> [SKIP][167] ([i915#3840] / [i915#9688])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-rkl: NOTRUN -> [SKIP][168] ([i915#3840])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-dg2-9: NOTRUN -> [SKIP][169] ([i915#13798])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
- shard-tglu-1: NOTRUN -> [SKIP][170] ([i915#2575])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
* igt@kms_feature_discovery@chamelium:
- shard-dg2: NOTRUN -> [SKIP][171] ([i915#4854])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_feature_discovery@chamelium.html
- shard-rkl: NOTRUN -> [SKIP][172] ([i915#4854])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-4x:
- shard-rkl: NOTRUN -> [SKIP][173] ([i915#1839])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_feature_discovery@display-4x.html
- shard-tglu: NOTRUN -> [SKIP][174] ([i915#1839])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_feature_discovery@display-4x.html
* igt@kms_feature_discovery@dp-mst:
- shard-rkl: NOTRUN -> [SKIP][175] ([i915#9337])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_feature_discovery@dp-mst.html
* igt@kms_feature_discovery@psr2:
- shard-rkl: NOTRUN -> [SKIP][176] ([i915#658])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-tglu: NOTRUN -> [SKIP][177] ([i915#3637] / [i915#9934]) +6 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-tglu: NOTRUN -> [SKIP][178] ([i915#9934])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-dg2-9: NOTRUN -> [SKIP][179] ([i915#9934]) +2 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-dg2: NOTRUN -> [SKIP][180] ([i915#9934]) +6 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_flip@2x-modeset-vs-vblank-race.html
- shard-mtlp: NOTRUN -> [SKIP][181] ([i915#3637] / [i915#9934])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip@2x-plain-flip:
- shard-rkl: NOTRUN -> [SKIP][182] ([i915#9934]) +15 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-vga1:
- shard-snb: [PASS][183] -> [INCOMPLETE][184] ([i915#12314]) +1 other test incomplete
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-snb7/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-vga1.html
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-snb4/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-vga1.html
* igt@kms_flip@flip-vs-suspend:
- shard-rkl: NOTRUN -> [INCOMPLETE][185] ([i915#6113])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@plain-flip-ts-check@b-edp1:
- shard-mtlp: [PASS][186] -> [FAIL][187] ([i915#13734]) +2 other tests fail
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-mtlp-5/igt@kms_flip@plain-flip-ts-check@b-edp1.html
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-5/igt@kms_flip@plain-flip-ts-check@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
- shard-dg2: NOTRUN -> [SKIP][188] ([i915#2672] / [i915#3555])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][189] ([i915#2672])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][190] ([i915#2587] / [i915#2672]) +4 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][191] ([i915#2672]) +6 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2-9: NOTRUN -> [SKIP][192] ([i915#2672] / [i915#3555] / [i915#5190])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-dg2-9: NOTRUN -> [SKIP][193] ([i915#2672])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling:
- shard-tglu: NOTRUN -> [SKIP][194] ([i915#2672] / [i915#3555]) +4 other tests skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
- shard-rkl: NOTRUN -> [SKIP][195] ([i915#2672] / [i915#3555]) +6 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2-9: NOTRUN -> [SKIP][196] ([i915#2672] / [i915#3555]) +1 other test skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff:
- shard-tglu: NOTRUN -> [SKIP][197] +55 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt:
- shard-snb: [PASS][198] -> [SKIP][199] +3 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-tglu-1: NOTRUN -> [SKIP][200] +20 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-rkl: NOTRUN -> [SKIP][201] ([i915#5439]) +1 other test skip
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][202] ([i915#3458]) +7 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][203] ([i915#8708]) +8 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2-9: NOTRUN -> [SKIP][204] ([i915#8708]) +9 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-cpu:
- shard-dg2-9: NOTRUN -> [SKIP][205] ([i915#5354]) +13 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-rkl: NOTRUN -> [SKIP][206] ([i915#1825]) +49 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
- shard-dg2-9: NOTRUN -> [SKIP][207] ([i915#3458]) +9 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-rkl: NOTRUN -> [SKIP][208] ([i915#9766])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
- shard-rkl: NOTRUN -> [SKIP][209] ([i915#3023]) +36 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][210] ([i915#8708])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][211] ([i915#5354]) +11 other tests skip
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_hdr@bpc-switch:
- shard-tglu-1: NOTRUN -> [SKIP][212] ([i915#3555] / [i915#8228])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-dg2-9: NOTRUN -> [SKIP][213] ([i915#3555] / [i915#8228])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2: [PASS][214] -> [SKIP][215] ([i915#3555] / [i915#8228])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-11/igt@kms_hdr@bpc-switch-suspend.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-7/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-rkl: NOTRUN -> [SKIP][216] ([i915#3555] / [i915#8228]) +1 other test skip
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_joiner@basic-big-joiner:
- shard-tglu: NOTRUN -> [SKIP][217] ([i915#10656])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-rkl: NOTRUN -> [SKIP][218] ([i915#12394])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-dg2-9: NOTRUN -> [SKIP][219] ([i915#13688])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][220] ([i915#12388]) +1 other test skip
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_lease@lease-unleased-crtc:
- shard-dg1: [PASS][221] -> [ABORT][222] ([i915#4423]) +1 other test abort
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg1-19/igt@kms_lease@lease-unleased-crtc.html
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-14/igt@kms_lease@lease-unleased-crtc.html
* igt@kms_lease@lease-unleased-crtc@pipe-d-hdmi-a-4:
- shard-dg1: [PASS][223] -> [DMESG-WARN][224] ([i915#4423]) +2 other tests dmesg-warn
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg1-19/igt@kms_lease@lease-unleased-crtc@pipe-d-hdmi-a-4.html
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-14/igt@kms_lease@lease-unleased-crtc@pipe-d-hdmi-a-4.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-tglu: NOTRUN -> [SKIP][225] ([i915#6301]) +1 other test skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_panel_fitting@legacy:
- shard-rkl: NOTRUN -> [SKIP][226] ([i915#6301])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_lowres@tiling-y:
- shard-dg2-9: NOTRUN -> [SKIP][227] ([i915#8821])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-rkl: NOTRUN -> [SKIP][228] ([i915#13958]) +2 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-dg2: NOTRUN -> [SKIP][229] ([i915#13958])
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_plane_multiple@tiling-yf:
- shard-rkl: NOTRUN -> [SKIP][230] ([i915#14259])
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_plane_multiple@tiling-yf.html
- shard-tglu: NOTRUN -> [SKIP][231] ([i915#14259])
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-dg2: NOTRUN -> [SKIP][232] ([i915#13046] / [i915#5354] / [i915#9423])
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b:
- shard-tglu: NOTRUN -> [SKIP][233] ([i915#12247]) +12 other tests skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c:
- shard-rkl: NOTRUN -> [SKIP][234] ([i915#12247]) +4 other tests skip
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d:
- shard-tglu-1: NOTRUN -> [SKIP][235] ([i915#12247]) +9 other tests skip
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][236] ([i915#12247] / [i915#6953])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_plane_scaling@planes-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling:
- shard-dg2: NOTRUN -> [SKIP][237] ([i915#12247] / [i915#9423])
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c:
- shard-mtlp: NOTRUN -> [SKIP][238] ([i915#12247]) +4 other tests skip
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d:
- shard-dg2: NOTRUN -> [SKIP][239] ([i915#12247]) +3 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-tglu: NOTRUN -> [SKIP][240] ([i915#12247] / [i915#3555])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
- shard-tglu: NOTRUN -> [SKIP][241] ([i915#12247] / [i915#6953])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html
* igt@kms_pm_backlight@basic-brightness:
- shard-tglu: NOTRUN -> [SKIP][242] ([i915#9812])
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-rkl: NOTRUN -> [SKIP][243] ([i915#12343])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@kms_pm_backlight@brightness-with-dpms.html
- shard-dg2: NOTRUN -> [SKIP][244] ([i915#12343])
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-tglu-1: NOTRUN -> [SKIP][245] ([i915#9685])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-tglu: NOTRUN -> [SKIP][246] ([i915#3828])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: NOTRUN -> [SKIP][247] ([i915#3828])
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-dg2-9: NOTRUN -> [SKIP][248] ([i915#8430])
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-dg2: NOTRUN -> [SKIP][249] ([i915#9519])
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [PASS][250] -> [SKIP][251] ([i915#9519]) +2 other tests skip
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
- shard-rkl: [PASS][252] -> [SKIP][253] ([i915#9519]) +1 other test skip
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: NOTRUN -> [SKIP][254] ([i915#12916])
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-rkl: NOTRUN -> [SKIP][255] ([i915#6524])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_prime@basic-modeset-hybrid.html
- shard-tglu: NOTRUN -> [SKIP][256] ([i915#6524])
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_properties@get_properties-sanity-non-atomic:
- shard-rkl: NOTRUN -> [FAIL][257] ([i915#14036])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_properties@get_properties-sanity-non-atomic.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
- shard-dg2-9: NOTRUN -> [SKIP][258] ([i915#11520]) +3 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
- shard-dg2: NOTRUN -> [SKIP][259] ([i915#11520]) +2 other tests skip
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
- shard-rkl: NOTRUN -> [SKIP][260] ([i915#11520]) +12 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-tglu: NOTRUN -> [SKIP][261] ([i915#11520]) +5 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
- shard-tglu-1: NOTRUN -> [SKIP][262] ([i915#11520]) +1 other test skip
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf:
- shard-glk: NOTRUN -> [SKIP][263] ([i915#11520]) +1 other test skip
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-glk3/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr@fbc-pr-cursor-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][264] ([i915#9688])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@kms_psr@fbc-pr-cursor-mmap-gtt.html
* igt@kms_psr@fbc-psr-cursor-plane-onoff:
- shard-tglu: NOTRUN -> [SKIP][265] ([i915#9732]) +14 other tests skip
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_psr@fbc-psr-cursor-plane-onoff.html
* igt@kms_psr@fbc-psr2-sprite-render:
- shard-rkl: NOTRUN -> [SKIP][266] ([i915#1072] / [i915#9732]) +33 other tests skip
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@kms_psr@fbc-psr2-sprite-render.html
* igt@kms_psr@fbc-psr2-suspend:
- shard-dg2-9: NOTRUN -> [SKIP][267] ([i915#1072] / [i915#9732]) +10 other tests skip
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_psr@fbc-psr2-suspend.html
* igt@kms_psr@psr-cursor-render:
- shard-tglu-1: NOTRUN -> [SKIP][268] ([i915#9732]) +4 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_psr@psr-cursor-render.html
* igt@kms_psr@psr2-primary-blt:
- shard-dg2: NOTRUN -> [SKIP][269] ([i915#1072] / [i915#9732]) +10 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_psr@psr2-primary-blt.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-rkl: NOTRUN -> [SKIP][270] ([i915#9685]) +3 other tests skip
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg2-9: NOTRUN -> [SKIP][271] ([i915#9685])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-dg2: NOTRUN -> [SKIP][272] ([i915#12755])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-dg2: NOTRUN -> [SKIP][273] ([i915#5190])
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-tglu: NOTRUN -> [SKIP][274] ([i915#5289])
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-rkl: NOTRUN -> [SKIP][275] ([i915#5289]) +2 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_scaling_modes@scaling-mode-full:
- shard-tglu: NOTRUN -> [SKIP][276] ([i915#3555]) +2 other tests skip
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_scaling_modes@scaling-mode-full.html
* igt@kms_vblank@query-forked@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [DMESG-WARN][277] ([i915#12964]) +16 other tests dmesg-warn
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@kms_vblank@query-forked@pipe-a-hdmi-a-1.html
* igt@kms_vrr@flip-basic-fastset:
- shard-tglu-1: NOTRUN -> [SKIP][278] ([i915#9906])
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-1/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@lobf:
- shard-tglu: NOTRUN -> [SKIP][279] ([i915#11920])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@kms_vrr@lobf.html
* igt@kms_vrr@negative-basic:
- shard-dg2: NOTRUN -> [SKIP][280] ([i915#3555] / [i915#9906])
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@kms_vrr@negative-basic.html
- shard-rkl: NOTRUN -> [SKIP][281] ([i915#3555] / [i915#9906])
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@kms_vrr@negative-basic.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-rkl: NOTRUN -> [SKIP][282] ([i915#9906]) +1 other test skip
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_vrr@seamless-rr-switch-drrs.html
- shard-tglu: NOTRUN -> [SKIP][283] ([i915#9906])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@kms_writeback@writeback-check-output:
- shard-rkl: NOTRUN -> [SKIP][284] ([i915#2437]) +1 other test skip
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-3/igt@kms_writeback@writeback-check-output.html
* igt@kms_writeback@writeback-fb-id-xrgb2101010:
- shard-dg2: NOTRUN -> [SKIP][285] ([i915#2437] / [i915#9412])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-rkl: NOTRUN -> [SKIP][286] ([i915#2433])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@interrupts:
- shard-rkl: NOTRUN -> [FAIL][287] ([i915#13977])
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-7/igt@perf_pmu@interrupts.html
* igt@perf_pmu@module-unload:
- shard-rkl: NOTRUN -> [INCOMPLETE][288] ([i915#12964] / [i915#13520])
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@perf_pmu@module-unload.html
* igt@perf_pmu@rc6@other-idle-gt0:
- shard-tglu: NOTRUN -> [SKIP][289] ([i915#8516])
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-5/igt@perf_pmu@rc6@other-idle-gt0.html
* igt@prime_mmap@test_aperture_limit:
- shard-dg2-9: NOTRUN -> [SKIP][290] ([i915#14121]) +1 other test skip
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@prime_mmap@test_aperture_limit.html
* igt@prime_vgem@basic-fence-flip:
- shard-dg2-9: NOTRUN -> [SKIP][291] ([i915#3708])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-9/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-read:
- shard-dg2: NOTRUN -> [SKIP][292] ([i915#3291] / [i915#3708])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-2/igt@prime_vgem@basic-fence-read.html
- shard-rkl: NOTRUN -> [SKIP][293] ([i915#3291] / [i915#3708])
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-5/igt@prime_vgem@basic-fence-read.html
* igt@sriov_basic@enable-vfs-autoprobe-on:
- shard-dg2: NOTRUN -> [SKIP][294] ([i915#9917])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-1/igt@sriov_basic@enable-vfs-autoprobe-on.html
#### Possible fixes ####
* igt@gem_eio@reset-stress:
- shard-dg1: [FAIL][295] ([i915#12543] / [i915#5784]) -> [PASS][296]
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg1-15/igt@gem_eio@reset-stress.html
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-12/igt@gem_eio@reset-stress.html
* igt@gem_pxp@create-regular-context-1:
- shard-rkl: [TIMEOUT][297] ([i915#12917] / [i915#12964]) -> [PASS][298]
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-3/igt@gem_pxp@create-regular-context-1.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@gem_pxp@create-regular-context-1.html
* igt@gem_pxp@create-valid-protected-context:
- shard-rkl: [TIMEOUT][299] ([i915#12964]) -> [PASS][300]
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-7/igt@gem_pxp@create-valid-protected-context.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@gem_pxp@create-valid-protected-context.html
* igt@i915_suspend@forcewake:
- shard-rkl: [INCOMPLETE][301] ([i915#4817]) -> [PASS][302]
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-3/igt@i915_suspend@forcewake.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@i915_suspend@forcewake.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-2-y-rc-ccs:
- shard-rkl: [DMESG-WARN][303] ([i915#12964]) -> [PASS][304] +13 other tests pass
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-3/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-2-y-rc-ccs.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-2-y-rc-ccs.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-dg2: [FAIL][305] ([i915#5956]) -> [PASS][306]
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-8/igt@kms_atomic_transition@plane-all-modeset-transition.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-6/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_cursor_crc@cursor-random-128x42:
- shard-tglu: [FAIL][307] ([i915#13566]) -> [PASS][308] +1 other test pass
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-tglu-3/igt@kms_cursor_crc@cursor-random-128x42.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-8/igt@kms_cursor_crc@cursor-random-128x42.html
* igt@kms_draw_crc@draw-method-blt:
- shard-dg1: [DMESG-WARN][309] ([i915#4423]) -> [PASS][310] +3 other tests pass
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg1-13/igt@kms_draw_crc@draw-method-blt.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-14/igt@kms_draw_crc@draw-method-blt.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-snb: [FAIL][311] ([i915#11832] / [i915#13734]) -> [PASS][312] +1 other test pass
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-snb1/igt@kms_flip@2x-wf_vblank-ts-check.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-snb7/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-tglu: [FAIL][313] ([i915#13734]) -> [PASS][314] +2 other tests pass
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-tglu-2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-tglu-2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@plain-flip-ts-check@b-hdmi-a2:
- shard-rkl: [FAIL][315] ([i915#13734]) -> [PASS][316]
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-3/igt@kms_flip@plain-flip-ts-check@b-hdmi-a2.html
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-6/igt@kms_flip@plain-flip-ts-check@b-hdmi-a2.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-dg2: [SKIP][317] ([i915#3555] / [i915#8228]) -> [PASS][318]
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-1/igt@kms_hdr@invalid-metadata-sizes.html
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-11/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-rkl: [SKIP][319] ([i915#9519]) -> [PASS][320]
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-8/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-dg2: [SKIP][321] ([i915#9519]) -> [PASS][322] +2 other tests pass
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-11/igt@kms_pm_rpm@modeset-lpsp-stress.html
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create:
- shard-glk: [ABORT][323] -> [PASS][324]
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-glk5/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create.html
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-glk9/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_create.html
* igt@perf_pmu@module-unload:
- shard-mtlp: [INCOMPLETE][325] ([i915#13520]) -> [PASS][326]
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-mtlp-1/igt@perf_pmu@module-unload.html
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-mtlp-2/igt@perf_pmu@module-unload.html
#### Warnings ####
* igt@gem_exec_capture@capture:
- shard-dg1: [FAIL][327] ([i915#14217]) -> [FAIL][328] ([i915#14214])
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg1-13/igt@gem_exec_capture@capture.html
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-14/igt@gem_exec_capture@capture.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2: [SKIP][329] ([i915#7118] / [i915#9424]) -> [FAIL][330] ([i915#7173])
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-6/igt@kms_content_protection@atomic-dpms.html
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-11/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2: [FAIL][331] ([i915#7173]) -> [SKIP][332] ([i915#9424])
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-11/igt@kms_content_protection@lic-type-0.html
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-8/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@uevent:
- shard-snb: [INCOMPLETE][333] ([i915#8816]) -> [SKIP][334]
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-snb1/igt@kms_content_protection@uevent.html
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-snb7/igt@kms_content_protection@uevent.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-dg1: [SKIP][335] ([i915#8708]) -> [SKIP][336] ([i915#4423] / [i915#8708])
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-13/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-dg2: [SKIP][337] ([i915#3458]) -> [SKIP][338] ([i915#10433] / [i915#3458]) +1 other test skip
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-dg2: [SKIP][339] ([i915#10433] / [i915#3458]) -> [SKIP][340] ([i915#3458]) +3 other tests skip
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_hdr@brightness-with-hdr:
- shard-dg1: [SKIP][341] ([i915#12713]) -> [SKIP][342] ([i915#1187] / [i915#12713])
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-dg1-17/igt@kms_hdr@brightness-with-hdr.html
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-dg1-13/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][343] ([i915#4070] / [i915#4816]) -> [SKIP][344] ([i915#4816])
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-5/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pm_dc@dc6-dpms:
- shard-rkl: [FAIL][345] ([i915#9295]) -> [SKIP][346] ([i915#3361])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-rkl-3/igt@kms_pm_dc@dc6-dpms.html
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-rkl-8/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free:
- shard-glk: [DMESG-FAIL][347] -> [ABORT][348] ([i915#13179])
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16537/shard-glk5/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free.html
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/shard-glk9/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11832]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11832
[i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
[i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
[i915#12394]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12394
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#12543]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12543
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#12916]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12916
[i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
[i915#12942]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12942
[i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
[i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
[i915#13193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13193
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
[i915#13734]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734
[i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
[i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
[i915#13781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13781
[i915#13798]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13798
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#13977]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13977
[i915#14036]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14036
[i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14121]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14121
[i915#14123]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14123
[i915#14214]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14214
[i915#14217]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14217
[i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
[i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
[i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
[i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4070]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
[i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
[i915#5882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5882
[i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
[i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
[i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
[i915#8816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8816
[i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
[i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
[i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
[i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9561
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_16537 -> Patchwork_147799v5
CI-20190529: 20190529
CI_DRM_16537: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8362: 8362
Patchwork_147799v5: ccbe266e6269fe62cb8f5d80cd9226134ea38e97 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147799v5/index.html
[-- Attachment #2: Type: text/html, Size: 119911 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers
2025-05-13 5:16 ` [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
@ 2025-05-27 6:17 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2025-05-27 6:17 UTC (permalink / raw)
To: Mitul Golani, intel-gfx, intel-xe; +Cc: ville.syrjala
On 5/13/2025 10:46 AM, Mitul Golani wrote:
> Write DC Balance parameters to hw registers.
>
> --v2:
> - Update commit header.
> - Separate crtc_state params from this patch. (Ankit)
>
> --v3:
> - Write registers at compute config.
> - Update condition for write.
>
> --v4:
> - Address issue with state checker.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 26 ++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index dcaae7631b0a..b2348ae10a1a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -627,6 +627,23 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> }
> }
> +
> + if (crtc_state->vrr.dc_balance.enable) {
> + intel_de_write(display, PIPEDMC_DCB_VMIN(pipe),
> + crtc_state->vrr.dc_balance.vmin - 1);
> + intel_de_write(display, PIPEDMC_DCB_VMAX(pipe),
> + crtc_state->vrr.dc_balance.vmax - 1);
> + intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe),
> + crtc_state->vrr.dc_balance.max_increase);
> + intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe),
> + crtc_state->vrr.dc_balance.max_decrease);
> + intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe),
> + crtc_state->vrr.dc_balance.guardband);
> + intel_de_write(display, PIPEDMC_DCB_SLOPE(pipe),
> + crtc_state->vrr.dc_balance.slope);
> + intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe),
> + crtc_state->vrr.dc_balance.vblank_target);
> + }
> }
>
> void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> @@ -637,6 +654,15 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> if (!old_crtc_state->vrr.enable)
> return;
>
> + if (old_crtc_state->vrr.dc_balance.enable) {
> + intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0);
> + intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0);
> + intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe), 0);
> + intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe), 0);
> + intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe), 0);
> + intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe), 0);
> + }
> +
> if (!intel_vrr_always_use_vrr_tg(display)) {
> intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> trans_vrr_ctl(old_crtc_state));
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance
2025-05-13 5:16 ` [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
@ 2025-05-30 6:22 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2025-05-30 6:22 UTC (permalink / raw)
To: Mitul Golani, intel-gfx, intel-xe; +Cc: ville.syrjala
On 5/13/2025 10:46 AM, Mitul Golani wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add pipe dmc registers and access bits for DC Balance params
> configuration and enablement.
>
> --v2:
> - Separate register definitions for transcoder and
> pipe dmc. (Ankit)
> - Use MMIO pipe macros instead of transcoder ones. (Ankit)
> - Remove dev_priv use. (Jani, Nikula)
>
> --v3:
> - Add all register address, from capital alphabet to small. (Ankit)
> - Add EVT CTL registers.
> - Add co-author tag.
> - Add event flag for Triggering DC Balance.
>
> Co-authored-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dmc_regs.h | 52 +++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> index e16ea3f16ed8..137816cb9e9d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> @@ -75,6 +75,7 @@
> #define DMC_EVT_CTL_EVENT_ID_MASK REG_GENMASK(15, 8)
> #define DMC_EVT_CTL_EVENT_ID_FALSE 0x01
> #define DMC_EVT_CTL_EVENT_ID_VBLANK_A 0x32 /* main DMC */
> +#define DMC_EVT_CTL_EVENT_ID_ADAPTIVE_DC_BALANCE_TRIGGER 0x3D
> /* An event handler scheduled to run at a 1 kHz frequency. */
> #define DMC_EVT_CTL_EVENT_ID_CLK_MSEC 0xbf
>
> @@ -117,4 +118,55 @@
> #define DMC_WAKELOCK_CTL_REQ REG_BIT(31)
> #define DMC_WAKELOCK_CTL_ACK REG_BIT(15)
>
> +#define _PIPEDMC_DCB_CTL_A 0x5f1a0
> +#define _PIPEDMC_DCB_CTL_B 0x5f5a0
> +#define PIPEDMC_DCB_CTL(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_CTL_A,\
> + _PIPEDMC_DCB_CTL_B)
> +#define PIPEDMC_ADAPTIVE_DCB_ENABLE REG_BIT(31)
> +
> +#define _PIPEDMC_DCB_VBLANK_A 0x5f1bc
> +#define _PIPEDMC_DCB_VBLANK_B 0x5f5bc
> +#define PIPEDMC_DCB_VBLANK(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VBLANK_A,\
> + _PIPEDMC_DCB_VBLANK_B)
> +
> +#define _PIPEDMC_DCB_SLOPE_A 0x5f1b8
> +#define _PIPEDMC_DCB_SLOPE_B 0x5f5b8
> +#define PIPEDMC_DCB_SLOPE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_SLOPE_A,\
> + _PIPEDMC_DCB_SLOPE_B)
> +
> +#define _PIPEDMC_DCB_GUARDBAND_A 0x5f1b4
> +#define _PIPEDMC_DCB_GUARDBAND_B 0x5f5b4
> +#define PIPEDMC_DCB_GUARDBAND(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_GUARDBAND_A,\
> + _PIPEDMC_DCB_GUARDBAND_B)
> +
> +#define _PIPEDMC_DCB_MAX_INCREASE_A 0x5f1ac
> +#define _PIPEDMC_DCB_MAX_INCREASE_B 0x5f5ac
> +#define PIPEDMC_DCB_MAX_INCREASE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_INCREASE_A,\
> + _PIPEDMC_DCB_MAX_INCREASE_B)
> +
> +#define _PIPEDMC_DCB_MAX_DECREASE_A 0x5f1b0
> +#define _PIPEDMC_DCB_MAX_DECREASE_B 0x5f5b0
> +#define PIPEDMC_DCB_MAX_DECREASE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_DECREASE_A,\
> + _PIPEDMC_DCB_MAX_DECREASE_B)
> +
> +#define _PIPEDMC_DCB_VMIN_A 0x5f1a4
> +#define _PIPEDMC_DCB_VMIN_B 0x5f5a4
> +#define PIPEDMC_DCB_VMIN(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VMIN_A,\
> + _PIPEDMC_DCB_VMIN_B)
> +
> +#define _PIPEDMC_DCB_VMAX_A 0x5f1a8
> +#define _PIPEDMC_DCB_VMAX_B 0x5f5a8
> +#define PIPEDMC_DCB_VMAX(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VMAX_A,\
> + _PIPEDMC_DCB_VMAX_B)
> +
> +#define _PIPEDMC_DCB_DEBUG_A 0x5f1c0
> +#define _PIPEDMC_DCB_DEBUG_B 0x5f5c0
> +#define PIPEDMC_DCB_DEBUG(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_DEBUG_A,\
> + _PIPEDMC_DCB_DEBUG_B)
> +
> +#define _PIPEDMC_EVT_CTL_3_A 0x5f040
> +#define _PIPEDMC_EVT_CTL_3_B 0x5f440
> +#define PIPEDMC_EVT_CTL_3(pipe) _MMIO_PIPE(pipe, _PIPEDMC_EVT_CTL_3_A,\
> + _PIPEDMC_EVT_CTL_3_B)
> +
> #endif /* __INTEL_DMC_REGS_H__ */
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2025-05-30 6:23 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-05-13 5:16 [PATCH v5 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-05-13 5:16 ` [PATCH v5 01/17] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
2025-05-13 5:16 ` [PATCH v5 02/17] drm/i915/display: Add source param for dc balance Mitul Golani
2025-05-13 5:16 ` [PATCH v5 03/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
2025-05-30 6:22 ` Nautiyal, Ankit K
2025-05-13 5:16 ` [PATCH v5 04/17] drm/i915/display: Add VRR DC balance registers Mitul Golani
2025-05-13 7:15 ` Jani Nikula
2025-05-13 5:16 ` [PATCH v5 05/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
2025-05-13 5:16 ` [PATCH v5 06/17] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
2025-05-13 5:16 ` [PATCH v5 07/17] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
2025-05-13 5:16 ` [PATCH v5 08/17] drm/i915/vrr: Add compute config " Mitul Golani
2025-05-13 5:16 ` [PATCH v5 09/17] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
2025-05-27 6:17 ` Nautiyal, Ankit K
2025-05-13 5:16 ` [PATCH v5 10/17] drm/i915: Extract vrr_vblank_start() Mitul Golani
2025-05-13 5:16 ` [PATCH v5 11/17] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
2025-05-13 5:16 ` [PATCH v5 12/17] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
2025-05-13 5:16 ` [PATCH v5 13/17] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
2025-05-13 5:16 ` [PATCH v5 14/17] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
2025-05-13 5:16 ` [PATCH v5 15/17] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
2025-05-13 5:16 ` [PATCH v5 16/17] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
2025-05-13 5:17 ` [PATCH v5 17/17] drm/i915/vrr: Enable DC Balance bit Mitul Golani
2025-05-13 6:02 ` ✗ Fi.CI.CHECKPATCH: warning for Enable/Disable DC balance along with VRR DSB (rev5) Patchwork
2025-05-13 6:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-05-13 6:26 ` ✗ i915.CI.BAT: failure " Patchwork
2025-05-15 7:55 ` Golani, Mitulkumar Ajitkumar
2025-05-15 8:20 ` ✓ i915.CI.BAT: success " Patchwork
2025-05-15 9:56 ` ✗ i915.CI.Full: failure " Patchwork
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