Re: [v6 13/16] drm/i915/xelpd: Program Plane Post CSC Registers

[kernel test robot <lkp@intel.com>]

Hi Uma,

kernel test robot noticed the following build warnings:

[auto build test WARNING on next-20251105]
[cannot apply to drm-xe/drm-xe-next drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.18-rc4 v6.18-rc3 v6.18-rc2 v6.18-rc4]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Uma-Shankar/drm-AMD-series-squashed/20251105-202623
base:   next-20251105
patch link:    https://lore.kernel.org/r/20251105123413.2671075-14-uma.shankar%40intel.com
patch subject: [v6 13/16] drm/i915/xelpd: Program Plane Post CSC Registers
config: i386-defconfig (https://download.01.org/0day-ci/archive/20251106/202511062120.wwoYUHAR-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251106/202511062120.wwoYUHAR-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202511062120.wwoYUHAR-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_color.c:4018:52: warning: variable 'j' is uninitialized when used here [-Wuninitialized]
    4018 |                                 lut_val = drm_color_lut32_extract(post_csc_lut[j++].green, 24);
         |                                                                                ^
   drivers/gpu/drm/i915/display/intel_color.c:4007:10: note: initialize the variable 'j' to silence this warning
    4007 |         u32 i, j, lut_size, lut_val;
         |                 ^
         |                  = 0
   1 warning generated.


vim +/j +4018 drivers/gpu/drm/i915/display/intel_color.c

  3997	
  3998	static void
  3999	xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
  4000					 const struct intel_plane_state *plane_state)
  4001	{
  4002		struct intel_display *display = to_intel_display(plane_state);
  4003		const struct drm_plane_state *state = &plane_state->uapi;
  4004		enum pipe pipe = to_intel_plane(state->plane)->pipe;
  4005		enum plane_id plane = to_intel_plane(state->plane)->id;
  4006		const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut->data;
  4007		u32 i, j, lut_size, lut_val;
  4008	
  4009		if (icl_is_hdr_plane(display, plane)) {
  4010			intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
  4011					   PLANE_PAL_PREC_AUTO_INCREMENT);
  4012			/* TODO: Add macro */
  4013			intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),
  4014					   PLANE_PAL_PREC_AUTO_INCREMENT);
  4015			if (post_csc_lut) {
  4016				lut_size = 32;
  4017				for (i = 0; i < lut_size; i++) {
> 4018					lut_val = drm_color_lut32_extract(post_csc_lut[j++].green, 24);
  4019	
  4020					intel_de_write_dsb(display, dsb,
  4021							   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
  4022							   lut_val);
  4023				}
  4024	
  4025				/* Segment 2 */
  4026				do {
  4027					intel_de_write_dsb(display, dsb,
  4028							   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
  4029							   (1 << 24));
  4030				} while (++j < 34);
  4031			} else {
  4032				/*TODO: Add for segment 0 */
  4033				lut_size = 32;
  4034				for (i = 0; i < lut_size; i++) {
  4035					u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
  4036	
  4037					intel_de_write_dsb(display, dsb,
  4038							   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);
  4039				}
  4040	
  4041				do {
  4042					intel_de_write_dsb(display, dsb,
  4043							   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
  4044							   1 << 24);
  4045				} while (i++ < 34);
  4046			}
  4047	
  4048			intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
  4049			intel_de_write_dsb(display, dsb,
  4050					   PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);
  4051		}
  4052	}
  4053	

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