Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>
To: "Kandpal, Suraj" <suraj.kandpal@intel.com>,
	"Shankar, Uma" <uma.shankar@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Cc: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"pekka.paalanen@collabora.com" <pekka.paalanen@collabora.com>,
	"contact@emersion.fr" <contact@emersion.fr>,
	"harry.wentland@amd.com" <harry.wentland@amd.com>,
	"mwen@igalia.com" <mwen@igalia.com>,
	"jadahl@redhat.com" <jadahl@redhat.com>,
	"sebastian.wick@redhat.com" <sebastian.wick@redhat.com>,
	"shashank.sharma@amd.com" <shashank.sharma@amd.com>,
	"Sharma, Swati2" <swati2.sharma@intel.com>,
	"alex.hung@amd.com" <alex.hung@amd.com>,
	"Nikula, Jani" <jani.nikula@intel.com>
Subject: Re: [v6 06/16] drm/i915/color: Add framework to program CSC
Date: Tue, 18 Nov 2025 14:22:53 +0530	[thread overview]
Message-ID: <4c7a4163-9df8-4cb7-af9b-1a7f97bd9690@intel.com> (raw)
In-Reply-To: <DM3PPF208195D8DD135EB18FD08B152D983E3D6A@DM3PPF208195D8D.namprd11.prod.outlook.com>



On 11/18/2025 1:54 PM, Kandpal, Suraj wrote:
>> Subject: [v6 06/16] drm/i915/color: Add framework to program CSC
>>
>> From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>>
>> Add framework to program CSC. It enables copying of matrix from uapi to intel
> 
> *UAPI
> 
>> plane state. Also adding helper functions which will eventually program values
> 
> *add
> 

Ack.

>> to hardware.
>>
>> Add a crtc state variable to track plane color change.
>>
>> v2:
>> - Add crtc_state->plane_color_changed
>> - Improve comments (Suraj)
>> - s/intel_plane_*_color/intel_plane_color_* (Suraj)
>>
>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_color.c    | 21 ++++++++
>>   drivers/gpu/drm/i915/display/intel_color.h    |  4 +-
>>   .../drm/i915/display/intel_display_types.h    |  4 ++
>>   drivers/gpu/drm/i915/display/intel_plane.c    | 49 +++++++++++++++++++
>>   4 files changed, 77 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
>> b/drivers/gpu/drm/i915/display/intel_color.c
>> index 1e97020e7304..a45d348c9851 100644
>> --- a/drivers/gpu/drm/i915/display/intel_color.c
>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
>> @@ -87,6 +87,10 @@ struct intel_color_funcs {
>>   	 * Read config other than LUTs and CSCs, before them. Optional.
>>   	 */
>>   	void (*get_config)(struct intel_crtc_state *crtc_state);
>> +
>> +	/* Plane CSC*/
>> +	void (*load_plane_csc_matrix)(struct intel_dsb *dsb,
>> +				      const struct intel_plane_state
>> *plane_state);
>>   };
>>
>>   #define CTM_COEFF_SIGN	(1ULL << 63)
>> @@ -3962,6 +3966,23 @@ static const struct intel_color_funcs
>> ilk_color_funcs = {
>>   	.get_config = ilk_get_config,
>>   };
>>
>> +static void
>> +intel_color_load_plane_csc_matrix(struct intel_dsb *dsb,
>> +				  const struct intel_plane_state *plane_state)
>> {
>> +	struct intel_display *display = to_intel_display(plane_state);
>> +
>> +	if (display->funcs.color->load_plane_csc_matrix)
>> +		display->funcs.color->load_plane_csc_matrix(dsb,
>> plane_state); }
>> +
>> +void intel_color_plane_program_pipeline(struct intel_dsb *dsb,
>> +					const struct intel_plane_state
>> *plane_state) {
>> +	if (plane_state->hw.ctm)
>> +		intel_color_load_plane_csc_matrix(dsb, plane_state); }
>> +
>>   void intel_color_crtc_init(struct intel_crtc *crtc)  {
>>   	struct intel_display *display = to_intel_display(crtc); diff --git
>> a/drivers/gpu/drm/i915/display/intel_color.h
>> b/drivers/gpu/drm/i915/display/intel_color.h
>> index bf7a12ce9df0..8051c827a1d8 100644
>> --- a/drivers/gpu/drm/i915/display/intel_color.h
>> +++ b/drivers/gpu/drm/i915/display/intel_color.h
>> @@ -13,6 +13,7 @@ struct intel_crtc_state;  struct intel_crtc;  struct
>> intel_display;  struct intel_dsb;
>> +struct intel_plane_state;
>>   struct drm_property_blob;
>>
>>   void intel_color_init_hooks(struct intel_display *display); @@ -40,5 +41,6
>> @@ bool intel_color_lut_equal(const struct intel_crtc_state *crtc_state,
>>   			   const struct drm_property_blob *blob2,
>>   			   bool is_pre_csc_lut);
>>   void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
>> -
>> +void intel_color_plane_program_pipeline(struct intel_dsb *dsb,
>> +					const struct intel_plane_state
>> *plane_state);
>>   #endif /* __INTEL_COLOR_H__ */
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
>> b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index fa39f3236597..d25f90ded71f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -646,6 +646,7 @@ struct intel_plane_state {
>>   		enum drm_color_encoding color_encoding;
>>   		enum drm_color_range color_range;
>>   		enum drm_scaling_filter scaling_filter;
>> +		struct drm_property_blob *ctm;
>>   	} hw;
>>
>>   	struct i915_vma *ggtt_vma;
>> @@ -1392,6 +1393,9 @@ struct intel_crtc_state {
>>   		u8 silence_period_sym_clocks;
>>   		u8 lfps_half_cycle_num_of_syms;
>>   	} alpm_state;
>> +
>> +	/* to track changes in plane color blocks */
>> +	bool plane_color_changed;
>>   };
>>
>>   enum intel_pipe_crc_source {
>> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c
>> b/drivers/gpu/drm/i915/display/intel_plane.c
>> index 505c776c0585..a5d0f95a6f10 100644
>> --- a/drivers/gpu/drm/i915/display/intel_plane.c
>> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
>> @@ -49,6 +49,7 @@
>>   #include "i9xx_plane_regs.h"
>>   #include "intel_cdclk.h"
>>   #include "intel_cursor.h"
>> +#include "intel_colorop.h"
>>   #include "intel_display_rps.h"
>>   #include "intel_display_trace.h"
>>   #include "intel_display_types.h"
>> @@ -336,6 +337,52 @@ intel_plane_copy_uapi_plane_damage(struct
>> intel_plane_state *new_plane_state,
>>   		*damage = drm_plane_state_src(&new_uapi_plane_state-
>>> uapi);
>>   }
>>
>> +static bool
>> +intel_plane_colorop_replace_blob(struct intel_plane_state *plane_state,
>> +				 struct intel_colorop *intel_colorop,
>> +				 struct drm_property_blob *blob)
>> +{
>> +	if (intel_colorop->id == INTEL_PLANE_CB_CSC)
>> +		return drm_property_replace_blob(&plane_state->hw.ctm,
>> blob);
>> +
>> +	return false;
>> +}
>> +
>> +static void
>> +intel_plane_color_copy_uapi_to_hw_state(struct intel_plane_state
>> *plane_state,
>> +					const struct intel_plane_state
>> *from_plane_state,
>> +					struct intel_crtc *crtc)
>> +{
>> +	struct drm_colorop *iter_colorop, *colorop;
>> +	struct drm_colorop_state *new_colorop_state;
>> +	struct drm_atomic_state *state = plane_state->uapi.state;
>> +	struct intel_colorop *intel_colorop;
>> +	struct drm_property_blob *blob;
>> +	int i = 0;
>> +	struct intel_atomic_state *intel_atomic_state =
>> to_intel_atomic_state(state);
>> +	struct intel_crtc_state *new_crtc_state = intel_atomic_state ?
>> +		intel_atomic_get_new_crtc_state(intel_atomic_state, crtc) :
>> NULL;
>> +	bool changed = false;
>> +
>> +	iter_colorop = plane_state->uapi.color_pipeline;
>> +
>> +	while (iter_colorop) {
>> +		for_each_new_colorop_in_state(state, colorop,
>> new_colorop_state, i) {
>> +			if (new_colorop_state->colorop == iter_colorop) {
>> +				blob = new_colorop_state->bypass ? NULL :
>> new_colorop_state->data;
>> +				intel_colorop = to_intel_colorop(colorop);
>> +				changed |=
>> intel_plane_colorop_replace_blob(plane_state,
>> +
>> intel_colorop,
>> +								 blob);
> 
> These params need to be aligned with open braces.

Ack.

> Also I noticed a lot of checkpatch errors that can be resolved please run checkpatch --strict
> Resolve all of them then send the patches unless the warning or check is just unavoidable.
> 

Anything you are particularly referring to in this patch?
Most of the warnings are from the squashed patch.
And then there are the register addition patches from where we should be 
able to fix the leading spaces ones. Will fix them in the next version.

==
Chaitanya

> Regards,
> Suraj Kandpal
> 
>> +			}
>> +		}
>> +		iter_colorop = iter_colorop->next;
>> +	}
>> +
>> +	if (new_crtc_state && changed)
>> +		new_crtc_state->plane_color_changed = true; }
>> +
>>   void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state
>> *plane_state,
>>   				       const struct intel_plane_state
>> *from_plane_state,
>>   				       struct intel_crtc *crtc)
>> @@ -364,6 +411,8 @@ void intel_plane_copy_uapi_to_hw_state(struct
>> intel_plane_state *plane_state,
>>
>>   	plane_state->uapi.src = drm_plane_state_src(&from_plane_state-
>>> uapi);
>>   	plane_state->uapi.dst = drm_plane_state_dest(&from_plane_state-
>>> uapi);
>> +
>> +	intel_plane_color_copy_uapi_to_hw_state(plane_state,
>> from_plane_state,
>> +crtc);
>>   }
>>
>>   void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
>> --
>> 2.50.1
> 


  reply	other threads:[~2025-11-18  8:53 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05 12:33 [v6 00/16] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-11-05 12:33 ` [v6 01/16] [NOT FOR REVIEW] drm: AMD series squashed Uma Shankar
2025-11-05 12:33 ` [v6 02/16] drm/i915: Add identifiers for driver specific blocks Uma Shankar
2025-11-11  9:20   ` Kandpal, Suraj
2025-11-05 12:33 ` [v6 03/16] drm/i915: Add intel_color_op Uma Shankar
2025-11-18  6:06   ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 04/16] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-11-18  6:09   ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 05/16] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-11-18  6:23   ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 06/16] drm/i915/color: Add framework to program CSC Uma Shankar
2025-11-18  8:24   ` Kandpal, Suraj
2025-11-18  8:52     ` Borah, Chaitanya Kumar [this message]
2025-11-18  8:55       ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 07/16] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-11-18  6:29   ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 08/16] drm/i915/color: Add plane CTM callback for D12 and beyond Uma Shankar
2025-11-05 12:34 ` [v6 09/16] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-11-18  8:56   ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 10/16] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-11-18  8:30   ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 11/16] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-11-05 12:34 ` [v6 12/16] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-11-18  9:03   ` Kandpal, Suraj
2025-11-19  8:14     ` Borah, Chaitanya Kumar
2025-11-05 12:34 ` [v6 13/16] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-11-06 13:16   ` kernel test robot
2025-11-05 12:34 ` [v6 14/16] drm/i915/display: Add registers for 3D LUT Uma Shankar
2025-11-10 12:08   ` Jani Nikula
2025-11-11  8:39     ` Borah, Chaitanya Kumar
2025-11-18  8:36   ` Kandpal, Suraj
2025-11-05 12:34 ` [v6 15/16] drm/i915/color: Add 3D LUT to color pipeline Uma Shankar
2025-11-10 12:09   ` Jani Nikula
2025-11-11  8:39     ` Borah, Chaitanya Kumar
2025-11-11  9:02       ` Jani Nikula
2025-11-18  8:50   ` Kandpal, Suraj
2025-11-18  8:56     ` Borah, Chaitanya Kumar
2025-11-05 12:34 ` [v6 16/16] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-11-18  8:52   ` Kandpal, Suraj
2025-11-05 13:38 ` ✗ i915.CI.BAT: failure for Plane Color Pipeline support for Intel platforms (rev6) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4c7a4163-9df8-4cb7-af9b-1a7f97bd9690@intel.com \
    --to=chaitanya.kumar.borah@intel.com \
    --cc=alex.hung@amd.com \
    --cc=contact@emersion.fr \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=harry.wentland@amd.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=jadahl@redhat.com \
    --cc=jani.nikula@intel.com \
    --cc=mwen@igalia.com \
    --cc=pekka.paalanen@collabora.com \
    --cc=sebastian.wick@redhat.com \
    --cc=shashank.sharma@amd.com \
    --cc=suraj.kandpal@intel.com \
    --cc=swati2.sharma@intel.com \
    --cc=uma.shankar@intel.com \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox