From: Suraj Kandpal <suraj.kandpal@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, Suraj Kandpal <suraj.kandpal@intel.com>
Subject: [PATCH] drm/i915/display: Disable DMG Clock Gating
Date: Tue, 20 Jan 2026 10:30:33 +0530 [thread overview]
Message-ID: <20260120050033.635681-1-suraj.kandpal@intel.com> (raw)
Disable DMG Clock gating during display initialization.
WA: 22021451799
Bspec: 69095
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_modeset_setup.c | 7 +++++++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index d10cbf69a5f8..2d46f00bd0d8 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -910,6 +910,13 @@ get_encoder_power_domains(struct intel_display *display)
static void intel_early_display_was(struct intel_display *display)
{
+ /*
+ * Wa_22021451799
+ * Disable DMG Clock gating
+ */
+ if (DISPLAY_VER(display) == 35)
+ intel_de_rmw(display, GEN9_CLKGATE_DIS_0, 0, DMG_GATING_DIS);
+
/*
* Display WA #1185 WaDisableDARBFClkGating:glk,icl,ehl,tgl
* Also known as Wa_14010480278.
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5bf3b4ab2baa..f928db78a3fa 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -763,6 +763,7 @@
*/
#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
#define DARBF_GATING_DIS REG_BIT(27)
+#define DMG_GATING_DIS REG_BIT(21)
#define MTL_PIPEDMC_GATING_DIS(pipe) REG_BIT(15 - (pipe))
#define PWM2_GATING_DIS REG_BIT(14)
#define PWM1_GATING_DIS REG_BIT(13)
--
2.34.1
next reply other threads:[~2026-01-20 5:00 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-20 5:00 Suraj Kandpal [this message]
2026-01-20 5:58 ` ✓ i915.CI.BAT: success for drm/i915/display: Disable DMG Clock Gating Patchwork
2026-01-20 8:23 ` [PATCH] " Garg, Nemesa
2026-01-20 8:25 ` Kandpal, Suraj
2026-01-20 16:13 ` Ville Syrjälä
2026-01-21 2:55 ` Kandpal, Suraj
2026-01-20 11:05 ` ✗ i915.CI.Full: failure for " Patchwork
2026-01-21 3:02 ` [PATCH v2] " Suraj Kandpal
2026-01-21 3:58 ` Nautiyal, Ankit K
2026-01-21 5:14 ` Kandpal, Suraj
2026-01-21 10:34 ` Jani Nikula
2026-01-21 3:05 ` ✗ Fi.CI.BUILD: failure for drm/i915/display: Disable DMG Clock Gating (rev2) Patchwork
2026-01-22 3:18 ` [PATCH v3] drm/i915/display: Disable DMG Clock Gating Suraj Kandpal
2026-01-22 4:20 ` ✓ i915.CI.BAT: success for drm/i915/display: Disable DMG Clock Gating (rev3) Patchwork
2026-01-22 11:59 ` ✓ i915.CI.Full: " Patchwork
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