Re: [PATCH v2] drm/i915/display: Disable DMG Clock Gating

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 1/21/2026 8:32 AM, Suraj Kandpal wrote:
> Incorrect clock is connected to DMG registers.
> Disable DMG Clock gating during display initialization.
>
> WA: 22021451799
> Bspec: 69095
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
> ---
>
> v1 -> v2:
> -Remove details from comment (Nemesa)
> -Add details in commit message (Ville)
>
>   drivers/gpu/drm/i915/display/intel_modeset_setup.c | 4 ++++
>   drivers/gpu/drm/i915/i915_reg.h                    | 1 +
>   drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 1 +
>   3 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index d10cbf69a5f8..7180e54af50b 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -910,6 +910,10 @@ get_encoder_power_domains(struct intel_display *display)
>   
>   static void intel_early_display_was(struct intel_display *display)
>   {
> +	/* Wa_22021451799 */
> +	if (DISPLAY_VER(display) == 35)

I think we are now moving all display WAs into intel_display_wa.c.

So instead of the open‑coded DISPLAY_VER(display) == 35 check here, this 
should use: intel_display_needs_wa_22021451799()

Regards,

Ankit


> +		intel_de_rmw(display, GEN9_CLKGATE_DIS_0, 0, DMG_GATING_DIS);
> +
>   	/*
>   	 * Display WA #1185 WaDisableDARBFClkGating:glk,icl,ehl,tgl
>   	 * Also known as Wa_14010480278.
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 5bf3b4ab2baa..f928db78a3fa 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -763,6 +763,7 @@
>    */
>   #define GEN9_CLKGATE_DIS_0		_MMIO(0x46530)
>   #define   DARBF_GATING_DIS		REG_BIT(27)
> +#define   DMG_GATING_DIS		REG_BIT(21)
>   #define   MTL_PIPEDMC_GATING_DIS(pipe)	REG_BIT(15 - (pipe))
>   #define   PWM2_GATING_DIS		REG_BIT(14)
>   #define   PWM1_GATING_DIS		REG_BIT(13)
> diff --git a/drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c b/drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
> index d95786faf181..c4c4058c8ac5 100644
> --- a/drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
> +++ b/drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
> @@ -2923,6 +2923,7 @@ static void drm_test_check_reject_hdr_infoframe_bpc_10(struct kunit *test)
>   						&new_conn_state->hdr_output_metadata,
>   						hdr_blob->base.id,
>   						sizeof(struct hdr_output_metadata), -1,
> +						sizeof(struct hdr_output_metadata),
>   						&replaced);
>   	KUNIT_ASSERT_EQ(test, ret, 0);
>   	KUNIT_ASSERT_EQ(test, replaced, true);