* [PATCH v7 00/14] Add support for Common SDP Transmission Line
@ 2026-09-15 16:46 Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 01/14] drm/i915/dip: Add new file to handle Data Island Packet hardware Ankit Nautiyal
` (16 more replies)
0 siblings, 17 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Xe3p_lpd introduces new register bits to program a common SDP
Transmission line that will be used by the Hardware to position the
SDPs. Along with this, another new register is also added to stagger
the different SDPs.
This series adds support for programming the Common SDP Transmission Line
(CMN_SDP_TL) and its stagger control registers.
Rev2:
- Add tracking for AS SDP Transmission line first. Instead of directly
programming it in the register, compute the state during
compute_config_late() and write the value from crtc_state.
Readout from the register through a vrr helper, since the register is
defined in context of VRR and will be used for both DP and HDMI VRR
packets.
- Add support to track other SDP transmission lines, instead of stagger
values.
- Compute the transmission lines in compute_config_late path and add
readout.
- Always write the Common SDP Transmission line and other stagger
values, whether the packets are sent or not.
- Dump SDP transmission lines in crtc_state.
Rev3:
- Introduce new files for handling the Data Island Packets (DIPs)
programming in one place. (Ville)
- Extract the Transmission Line programming for
HDMI Extended Metadata Packet (EMP) and Adaptive Sync SDP (AS SDP)
i.e. EMP_AS_SDP_TL in the new file.
- Add programming for Common Base SDP Transmission lines and other
stagger offsets in the new file.
- Add a #TODO to extract other helpers that deal with Data Island Packets
and VIDEO_DIP registers.
- Place the HAS_* Macros related to DIP in the intel_dip.h file
instead of intel_display_devices.h (Jani)
- Make function names more descriptive and avoid overuse of multiple
acronyms. (Jani)
Note:
- Though I have fixed the naming as suggested in most places, I
have retained HAS_EMP_AS_SDP_TL for the following reasons:
1) Lack of an apt name that avoids the acronym for
'Extended Metadata Packet Adaptive Sync Secondary Packet Transmission
Line'.
2) Keeping this name makes it easier to find and map with the exact name
for such a complex register name.
However, I am open to suggestions for a better name.
Rev4:
- Drop the patch to check for DP encoder before writing EMP_AS_SDP_TL
register. Instead reset the register to 0 for non DP encoder case.
Rev5:
- Rebase
- Address review comments from Suraj:
- Drop some redundant checks, and fix few commit messages.
Rev6:
- Move the new struct in intel_display_types.h from intel_dip.h (Jani)
- Check for CMN_SDP_TL restriction and Warn if not followed. (Suraj)
- Use HAS_CMN_SDP_TL() instead of checking if cmn_sdp_tl is set or not.
(Sashiko)
- Make sure that the guardband is sufficient as per CMN_SDP_TL while
optiminzing the guardband.
Rev7:
- Account for VSC SDP's own minimum guardband requirement in
intel_dp_sdp_min_guardband(), for completeness. (Sashiko)
- Wrap two long line macro definitions in intel_dip_regs.h.
Ankit Nautiyal (13):
drm/i915/dip: Add new file to handle Data Island Packet hardware
drm/i915/vrr: Use the helper to write EMP_AS_SDP_TL register
drm/i915/intel_dip: Add check for DP encoder
drm/i915/dip: Add helper to get AS SDP Transmission Line
drm/i915/display: Add crtc state for DIP transmission lines
drm/i915/dip: Store and use AS SDP transmission line from crtc state
drm/i915/dip: Add HAS_COMMON_SDP_TL macro
drm/i915/dip: Store SDP transmission lines in crtc_state
drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission
line
drm/i915/dip: Enable Common SDP Transmission line
drm/i915/dp: Account VSC SDP in min guardband
drm/i915/dp: Adjust SDP guardband requirement for CMN_SDP_TL
drm/i915/display: Dump DIP Transmission lines
Arun R Murthy (1):
drm/i915/dip_regs: Add register definitions for common SDP
Transmission Line
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915/display/intel_crtc_state_dump.c | 9 +
drivers/gpu/drm/i915/display/intel_ddi.c | 5 +
drivers/gpu/drm/i915/display/intel_dip.c | 215 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dip.h | 53 +++++
drivers/gpu/drm/i915/display/intel_dip_regs.h | 38 ++++
drivers/gpu/drm/i915/display/intel_display.c | 6 +
.../drm/i915/display/intel_display_types.h | 16 ++
drivers/gpu/drm/i915/display/intel_dp.c | 62 ++++-
drivers/gpu/drm/i915/display/intel_vrr.c | 14 +-
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 6 -
drivers/gpu/drm/xe/Makefile | 1 +
12 files changed, 407 insertions(+), 19 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dip.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dip.h
create mode 100644 drivers/gpu/drm/i915/display/intel_dip_regs.h
--
2.50.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v7 01/14] drm/i915/dip: Add new file to handle Data Island Packet hardware
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 02/14] drm/i915/vrr: Use the helper to write EMP_AS_SDP_TL register Ankit Nautiyal
` (15 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Add new files intel_dip.c, intel_dip.h, and intel_dip_regs.h to handle
low level hardware programming related to Data Island Packets.
Currently only programming of the Transmission Line for HDMI 2.1
Extended Metadata Packet (EMP) and DP Adaptive-Sync Secondary Data
Packet (SDP) is added (MMIO register EMP_AS_SDP_TL).
This will serve as a common place for DIP related code, which is currently
scattered across DP and HDMI files. A TODO has been added for extracting
the remaining DIP helpers.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_dip.c | 39 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dip.h | 38 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dip_regs.h | 18 +++++++++
drivers/gpu/drm/i915/display/intel_vrr.c | 1 +
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 6 ---
drivers/gpu/drm/xe/Makefile | 1 +
7 files changed, 98 insertions(+), 6 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dip.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dip.h
create mode 100644 drivers/gpu/drm/i915/display/intel_dip_regs.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index a83fa8be0aba..d4e7764621e1 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -349,6 +349,7 @@ i915-y += \
display/intel_cx0_phy.o \
display/intel_ddi.o \
display/intel_ddi_buf_trans.o \
+ display/intel_dip.o \
display/intel_display_device.o \
display/intel_display_trace.o \
display/intel_dkl_phy.o \
diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
new file mode 100644
index 000000000000..2e2bdb2b199c
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ *
+ */
+
+#include "intel_de.h"
+#include "intel_dip.h"
+#include "intel_dip_regs.h"
+#include "intel_display_types.h"
+
+u16 intel_dip_read_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 val;
+
+ if (!HAS_EMP_AS_SDP_TL(display))
+ return 0;
+
+ val = intel_de_read(display, EMP_AS_SDP_TL(display, cpu_transcoder));
+ return REG_FIELD_GET(EMP_AS_SDP_DB_TL_MASK, val);
+}
+
+void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+ if (!HAS_EMP_AS_SDP_TL(display))
+ return;
+ /*
+ * Since currently we support VRR only for DP/eDP, so this is programmed
+ * only for Adaptive Sync SDP to Vsync start.
+ */
+ intel_de_write(display,
+ EMP_AS_SDP_TL(display, cpu_transcoder),
+ EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start));
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dip.h b/drivers/gpu/drm/i915/display/intel_dip.h
new file mode 100644
index 000000000000..25bae4a04d6b
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_dip.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __INTEL_DIP_H__
+#define __INTEL_DIP_H__
+
+#include "intel_display_device.h"
+
+/*
+ * Video DIP (Data Island Packet) helpers.
+ *
+ * This file contains helpers for programming video DIP related hardware.
+ *
+ * TODO: Currently, this is only used for programming EMP_AS_SDP_TL i.e. to
+ * program Transmission Line for HDMI 2.1 Extended Metadata Packet (EMP) and
+ * DP Adaptive Sync (AS) Secondary Data Packet (SDP). However, all low level
+ * DIP buffer read/write and related helpers should be extracted here later.
+ */
+
+struct intel_crtc_state;
+
+/*
+ * EMP AS SDP TL: Extended Metadata Packet (EMP) Adaptive Sync (AS)
+ * Secondary Data Packet (SDP) Transmission Line (TL).
+ *
+ * Starting with BMG (display ver 14.01) and LNL+ (display ver 20+),
+ * the AS SDP transmission line is programmable via the EMP AS SDP TL
+ * register.
+ */
+#define HAS_EMP_AS_SDP_TL(__display) (DISPLAY_VERx100(__display) == 1401 || \
+ DISPLAY_VER(__display) >= 20)
+
+u16 intel_dip_read_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
+void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
+
+#endif /* __INTEL_DIP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dip_regs.h b/drivers/gpu/drm/i915/display/intel_dip_regs.h
new file mode 100644
index 000000000000..c4e1dab1ea46
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_dip_regs.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __INTEL_DIP_REGS_H__
+#define __INTEL_DIP_REGS_H__
+
+#include "intel_display_reg_defs.h"
+
+/* EMP (Extended Metadata Packet) AS (Adaptive Sync) SDP Transmission Line */
+#define _EMP_AS_SDP_TL_A 0x60204
+#define EMP_AS_SDP_TL(display, trans) _MMIO_TRANS2((display), (trans), _EMP_AS_SDP_TL_A)
+#define EMP_AS_SDP_DB_TL_MASK REG_GENMASK(12, 0)
+#define EMP_AS_SDP_DB_TL(db_transmit_line) REG_FIELD_PREP(EMP_AS_SDP_DB_TL_MASK, \
+ (db_transmit_line))
+
+#endif /* __INTEL_DIP_REGS_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index e36db1174440..fd8b6f829cfe 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -17,6 +17,7 @@
#include "intel_cmtg.h"
#include "intel_crtc.h"
#include "intel_de.h"
+#include "intel_dip_regs.h"
#include "intel_display_limits.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
index 9d4d6573a149..ba8631cbc672 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
@@ -174,12 +174,6 @@
#define VRR_VSYNC_START_MASK REG_GENMASK(12, 0)
#define VRR_VSYNC_START(vsync_start) REG_FIELD_PREP(VRR_VSYNC_START_MASK, (vsync_start))
-/* Common register for HDMI EMP and DP AS SDP */
-#define _EMP_AS_SDP_TL_A 0x60204
-#define EMP_AS_SDP_TL(display, trans) _MMIO_TRANS2((display), (trans), _EMP_AS_SDP_TL_A)
-#define EMP_AS_SDP_DB_TL_MASK REG_GENMASK(12, 0)
-#define EMP_AS_SDP_DB_TL(db_transmit_line) REG_FIELD_PREP(EMP_AS_SDP_DB_TL_MASK, (db_transmit_line))
-
#define _TRANS_CMRR_M_LO_A 0x604F0
#define TRANS_CMRR_M_LO(display, trans) _MMIO_TRANS2((display), (trans), _TRANS_CMRR_M_LO_A)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 67b8b5477639..ba4404896f2f 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -259,6 +259,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_ddi.o \
i915-display/intel_ddi_buf_trans.o \
i915-display/intel_de.o \
+ i915-display/intel_dip.o \
i915-display/intel_display.o \
i915-display/intel_display_conversion.o \
i915-display/intel_display_device.o \
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 02/14] drm/i915/vrr: Use the helper to write EMP_AS_SDP_TL register
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 01/14] drm/i915/dip: Add new file to handle Data Island Packet hardware Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 03/14] drm/i915/intel_dip: Add check for DP encoder Ankit Nautiyal
` (14 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Now that intel_dip_write_emp_as_sdp_tl() exists, use it instead of
the open-coded EMP_AS_SDP_TL programming sequence in
intel_vrr_set_transcoder_timings().
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 13 ++-----------
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index fd8b6f829cfe..a516ba34e0d0 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -17,6 +17,7 @@
#include "intel_cmtg.h"
#include "intel_crtc.h"
#include "intel_de.h"
+#include "intel_dip.h"
#include "intel_dip_regs.h"
#include "intel_display_limits.h"
#include "intel_display_regs.h"
@@ -711,17 +712,7 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
VRR_VSYNC_START(crtc_state->vrr.vsync_start));
- /*
- * For BMG and LNL+ onwards the EMP_AS_SDP_TL is used for programming
- * double buffering point and transmission line for VRR packets for
- * HDMI2.1/DP/eDP/DP->HDMI2.1 PCON.
- * Since currently we support VRR only for DP/eDP, so this is programmed
- * to for Adaptive Sync SDP to Vsync start.
- */
- if (DISPLAY_VERx100(display) == 1401 || DISPLAY_VER(display) >= 20)
- intel_de_write(display,
- EMP_AS_SDP_TL(display, cpu_transcoder),
- EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start));
+ intel_dip_write_emp_as_sdp_tl(crtc_state);
}
void
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 03/14] drm/i915/intel_dip: Add check for DP encoder
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 01/14] drm/i915/dip: Add new file to handle Data Island Packet hardware Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 02/14] drm/i915/vrr: Use the helper to write EMP_AS_SDP_TL register Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 04/14] drm/i915/dip: Add helper to get AS SDP Transmission Line Ankit Nautiyal
` (13 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
At the moment, the common register for programming Transmission line for
Extended Metadata Packet and Adaptive-Sync Secondary Data Packet
(EMP_AS_SDP_TL) is only used to program Adaptive-Sync SDP (AS SDP).
Since VRR and Video Timing Extended Metadat Packet (VTEMP) are not yet
implemented for HDMI, add an explicit check to write the register only
for DP encoders (that may use AS SDP) and reset the register for non-DP
encoders.
In subsequent changes, instead of directly writing the value,
appropriate helpers will be called, that will supply the transmission line
for these packets.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dip.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
index 2e2bdb2b199c..b28352a9e23f 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.c
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -26,14 +26,19 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 transmission_line = 0;
if (!HAS_EMP_AS_SDP_TL(display))
return;
/*
- * Since currently we support VRR only for DP/eDP, so this is programmed
- * only for Adaptive Sync SDP to Vsync start.
+ * Since we currently support VRR only for DP/eDP, program the register
+ * for Adaptive Sync SDP using vsync start. For non-DP encoders,
+ * the register is reset to 0.
*/
+ if (intel_crtc_has_dp_encoder(crtc_state))
+ transmission_line = crtc_state->vrr.vsync_start;
+
intel_de_write(display,
EMP_AS_SDP_TL(display, cpu_transcoder),
- EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start));
+ EMP_AS_SDP_DB_TL(transmission_line));
}
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 04/14] drm/i915/dip: Add helper to get AS SDP Transmission Line
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (2 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 03/14] drm/i915/intel_dip: Add check for DP encoder Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 05/14] drm/i915/display: Add crtc state for DIP transmission lines Ankit Nautiyal
` (12 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Introduce a DIP helper to compute the Adaptive Sync SDP transmission line
and use it when programming the EMP_AS_SDP_TL register.
Currently the AS SDP transmission line is programmed to the T1 position.
This can be extended in the future to support programming the T2 position
as well.
While at it, improve the documentation: the AS SDP transmission line
corresponds to the T1 position, which maps to the start of the VSYNC
pulse.
v2:
- Move the helper into intel_dip.c and make it static, since intel_dip.c
is its only caller.
- Drop the now unused prototype from intel_dp.h.
- Add the check HAS_EMP_AS_SDP_TL(). (Suraj)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> (#v1)
---
drivers/gpu/drm/i915/display/intel_dip.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
index b28352a9e23f..0277b15e1c82 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.c
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -9,6 +9,23 @@
#include "intel_dip_regs.h"
#include "intel_display_types.h"
+static int intel_dip_get_as_sdp_transmission_line(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+
+ if (!HAS_EMP_AS_SDP_TL(display))
+ return 0;
+
+ /*
+ * EMP_AS_SDP_TL defines the T1 position as the default AS SDP
+ * Transmission Line, which corresponds to the start of the
+ * VSYNC pulse.
+ *
+ * Use the T1 position for now.
+ */
+ return crtc_state->vrr.vsync_start;
+}
+
u16 intel_dip_read_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
@@ -36,7 +53,7 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
* the register is reset to 0.
*/
if (intel_crtc_has_dp_encoder(crtc_state))
- transmission_line = crtc_state->vrr.vsync_start;
+ transmission_line = intel_dip_get_as_sdp_transmission_line(crtc_state);
intel_de_write(display,
EMP_AS_SDP_TL(display, cpu_transcoder),
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 05/14] drm/i915/display: Add crtc state for DIP transmission lines
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (3 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 04/14] drm/i915/dip: Add helper to get AS SDP Transmission Line Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 06/14] drm/i915/dip: Store and use AS SDP transmission line from crtc state Ankit Nautiyal
` (11 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
The Adaptive Sync SDP is currently the only packet with a programmable
transmission line.
Make a structure struct intel_dip for Data Island Packets. Add a member to
track Adaptive-Sync SDP transmission line. Include the new member in the
pipe configuration comparison.
This will pave the way for supporting more packets' programmable
transmission lines, including the common base SDP transmission line
introduced with Xe3p_lpd.
v2:
- Move struct intel_dip from intel_dip.h to intel_display_types.h (Jani)
- Move PIPE_CONF_CHECK for emp_as_sdp_tl in !fastset block. (Sashiko)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> (#v1)
---
drivers/gpu/drm/i915/display/intel_display.c | 1 +
drivers/gpu/drm/i915/display/intel_display_types.h | 10 ++++++++++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9151ea6c15ab..5e8f2e48e95b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5602,6 +5602,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(vrr.dc_balance.max_increase);
PIPE_CONF_CHECK_I(vrr.dc_balance.max_decrease);
PIPE_CONF_CHECK_I(vrr.dc_balance.vblank_target);
+ PIPE_CONF_CHECK_I(dip.emp_as_sdp_tl);
}
if (!fastset || intel_vrr_always_use_vrr_tg(display)) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index a5f18ac8a7d0..334179685ea2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1007,6 +1007,14 @@ struct intel_casf {
bool enable;
};
+struct intel_dip {
+ /*
+ * DIP Transmission line, relative to the Vtotal.
+ * The programmed transmit line is (Vtotal - value)
+ */
+ u16 emp_as_sdp_tl;
+};
+
struct intel_crtc_state {
/*
* uapi (drm) state. This is the software state shown to userspace.
@@ -1315,6 +1323,8 @@ struct intel_crtc_state {
struct drm_dp_as_sdp as_sdp;
} infoframes;
+ struct intel_dip dip;
+
u8 eld[MAX_ELD_BYTES];
/* HDMI scrambling status */
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 06/14] drm/i915/dip: Store and use AS SDP transmission line from crtc state
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (4 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 05/14] drm/i915/display: Add crtc state for DIP transmission lines Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 17:22 ` sashiko-bot
2026-09-15 16:46 ` [PATCH v7 07/14] drm/i915/dip_regs: Add register definitions for common SDP Transmission Line Ankit Nautiyal
` (10 subsequent siblings)
16 siblings, 1 reply; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
The driver currently computes the Adaptive Sync SDP transmission line
directly at programming time. Instead, compute and store the
AS SDP transmission line in the crtc state and use it when programming the
EMP_AS_SDP_TL register.
We get the clear picture about the SDPs and guardband only in
intel_dp_sdp_compute_config_late() therefore we must configure the
AS SDP transmission line at this point when AS SDP is enabled in
crtc_state.
This prepares the ground for supporting programmable transmission lines
for additional DP SDPs.
While moving the helper into intel_dip.c, drop the
intel_crtc_has_dp_encoder() check instead of relocating it. It was
needed in the old VRR write path shared by other encoderes as well, but
intel_dip_sdp_tl_compute_config_late() is only reached via DP, so HDMI
never sets crtc_state->dip.emp_as_sdp_tl and it stays 0 by default.
v2:
- Move the helper into intel_dip.c and drop the
intel_crtc_has_dp_encoder() check.
- Drop the redundant checks. (Suraj)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
drivers/gpu/drm/i915/display/intel_dip.c | 20 +++++++++++---------
drivers/gpu/drm/i915/display/intel_dip.h | 3 +++
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
4 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9b3b526e5e55..dacb4b7588a0 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -49,6 +49,7 @@
#include "intel_ddi.h"
#include "intel_ddi_buf_trans.h"
#include "intel_de.h"
+#include "intel_dip.h"
#include "intel_display_power.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
@@ -4235,6 +4236,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);
intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);
+ intel_dip_sdp_transmission_line_get_config(pipe_config);
intel_audio_codec_get_config(encoder, pipe_config);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
index 0277b15e1c82..d1acc7eb5a39 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.c
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -43,19 +43,21 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
- u32 transmission_line = 0;
if (!HAS_EMP_AS_SDP_TL(display))
return;
- /*
- * Since we currently support VRR only for DP/eDP, program the register
- * for Adaptive Sync SDP using vsync start. For non-DP encoders,
- * the register is reset to 0.
- */
- if (intel_crtc_has_dp_encoder(crtc_state))
- transmission_line = intel_dip_get_as_sdp_transmission_line(crtc_state);
intel_de_write(display,
EMP_AS_SDP_TL(display, cpu_transcoder),
- EMP_AS_SDP_DB_TL(transmission_line));
+ EMP_AS_SDP_DB_TL(crtc_state->dip.emp_as_sdp_tl));
+}
+
+void intel_dip_sdp_tl_compute_config_late(struct intel_crtc_state *crtc_state)
+{
+ crtc_state->dip.emp_as_sdp_tl = intel_dip_get_as_sdp_transmission_line(crtc_state);
+}
+
+void intel_dip_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state)
+{
+ crtc_state->dip.emp_as_sdp_tl = intel_dip_read_emp_as_sdp_tl(crtc_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dip.h b/drivers/gpu/drm/i915/display/intel_dip.h
index 25bae4a04d6b..20f9aeb85c39 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.h
+++ b/drivers/gpu/drm/i915/display/intel_dip.h
@@ -35,4 +35,7 @@ struct intel_crtc_state;
u16 intel_dip_read_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
+void intel_dip_sdp_tl_compute_config_late(struct intel_crtc_state *crtc_state);
+void intel_dip_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state);
+
#endif /* __INTEL_DIP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0cd5e6b5034c..8c3a324e164e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -61,6 +61,7 @@
#include "intel_cx0_phy.h"
#include "intel_ddi.h"
#include "intel_de.h"
+#include "intel_dip.h"
#include "intel_display_driver.h"
#include "intel_display_jiffies.h"
#include "intel_display_utils.h"
@@ -7324,6 +7325,8 @@ int intel_dp_sdp_compute_config_late(struct intel_crtc_state *crtc_state)
return -EINVAL;
}
+ intel_dip_sdp_tl_compute_config_late(crtc_state);
+
return 0;
}
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 07/14] drm/i915/dip_regs: Add register definitions for common SDP Transmission Line
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (5 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 06/14] drm/i915/dip: Store and use AS SDP transmission line from crtc state Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 08/14] drm/i915/dip: Add HAS_COMMON_SDP_TL macro Ankit Nautiyal
` (9 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
From: Arun R Murthy <arun.r.murthy@intel.com>
Add registers definitions for common SDP transmission line CMN_SDP_TL
and CMN_SDP_TL_STGR_CTL.
v2: Move all registers to intel_dip_regs.h (Ankit)
Bspec: 74384
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dip_regs.h | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dip_regs.h b/drivers/gpu/drm/i915/display/intel_dip_regs.h
index c4e1dab1ea46..d7e40a613913 100644
--- a/drivers/gpu/drm/i915/display/intel_dip_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dip_regs.h
@@ -15,4 +15,24 @@
#define EMP_AS_SDP_DB_TL(db_transmit_line) REG_FIELD_PREP(EMP_AS_SDP_DB_TL_MASK, \
(db_transmit_line))
+/* COMMON SDP TRANSMISSION LINE */
+#define _CMN_SDP_TL_A 0x6020c
+#define CMN_SDP_TL(display, trans) _MMIO_TRANS2(display, (trans), _CMN_SDP_TL_A)
+#define TRANSMISSION_LINE_ENABLE REG_BIT(31)
+#define BASE_TRANSMISSION_LINE_MASK REG_GENMASK(12, 0)
+#define BASE_TRANSMISSION_LINE(x) REG_FIELD_PREP(BASE_TRANSMISSION_LINE_MASK, x)
+
+#define _CMN_SDP_TL_STGR_CTL_A 0x60214
+#define CMN_SDP_TL_STGR_CTL(display, trans) _MMIO_TRANS2(display, (trans), \
+ _CMN_SDP_TL_STGR_CTL_A)
+#define VSC_EXT_STAGGER_MASK REG_GENMASK(11, 8)
+#define VSC_EXT_STAGGER(x) REG_FIELD_PREP(VSC_EXT_STAGGER_MASK, x)
+#define VSC_EXT_STAGGER_DEFAULT 0x2
+#define PPS_STAGGER_MASK REG_GENMASK(7, 4)
+#define PPS_STAGGER(x) REG_FIELD_PREP(PPS_STAGGER_MASK, x)
+#define PPS_STAGGER_DEFAULT 0x1
+#define GMP_STAGGER_MASK REG_GENMASK(3, 0)
+#define GMP_STAGGER(x) REG_FIELD_PREP(GMP_STAGGER_MASK, x)
+#define GMP_STAGGER_DEFAULT 0x0
+
#endif /* __INTEL_DIP_REGS_H__ */
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 08/14] drm/i915/dip: Add HAS_COMMON_SDP_TL macro
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (6 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 07/14] drm/i915/dip_regs: Add register definitions for common SDP Transmission Line Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 09/14] drm/i915/dip: Store SDP transmission lines in crtc_state Ankit Nautiyal
` (8 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Add a helper macro to detect CMN SDP TL support on platforms with display
version 35 and above.
v2: Use prefix drm/i915/dip. (Suraj)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dip.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dip.h b/drivers/gpu/drm/i915/display/intel_dip.h
index 20f9aeb85c39..8ff22eb5663b 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.h
+++ b/drivers/gpu/drm/i915/display/intel_dip.h
@@ -32,6 +32,16 @@ struct intel_crtc_state;
#define HAS_EMP_AS_SDP_TL(__display) (DISPLAY_VERx100(__display) == 1401 || \
DISPLAY_VER(__display) >= 20)
+/*
+ * CMN SDP TL: Common Secondary Data Packet Transmission Line.
+ *
+ * Xe3p_lpd introduces new register CMN_SDP_TL to program a common SDP
+ * Transmission line that will be used by the Hardware to position the
+ * SDPs. Along with this, another new register CMN_SDP_TL_STGR_CTL is
+ * also added to stagger the different SDPs.
+ */
+#define HAS_COMMON_SDP_TL(__display) (DISPLAY_VER(__display) >= 35)
+
u16 intel_dip_read_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 09/14] drm/i915/dip: Store SDP transmission lines in crtc_state
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (7 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 08/14] drm/i915/dip: Add HAS_COMMON_SDP_TL macro Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 10/14] drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line Ankit Nautiyal
` (7 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Currently the driver only programs the transmission line for the
Adaptive-Sync SDP, while the hardware controls the transmission lines for
other SDPs.
Starting with Xe3p_lpd, the hardware allows the driver to program
transmission lines for additional DP SDPs. Prepare for this by adding
fields to struct intel_crtc_state to store SDP transmission lines, and
include them in pipe config comparison.
The SDP transmission line fields track vrr.vsync_start/vtotal, which are
allowed to change during a seamless LRR fastset. Guard their pipe config
comparison under !fastset, same as vrr.vsync_start/vsync_end, so a fastset
is not unnecessarily turned into a full modeset.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5e8f2e48e95b..e052c5ad99d9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5603,6 +5603,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(vrr.dc_balance.max_decrease);
PIPE_CONF_CHECK_I(vrr.dc_balance.vblank_target);
PIPE_CONF_CHECK_I(dip.emp_as_sdp_tl);
+ PIPE_CONF_CHECK_I(dip.gmp_sdp_tl);
+ PIPE_CONF_CHECK_I(dip.pps_sdp_tl);
+ PIPE_CONF_CHECK_I(dip.vsc_sdp_tl);
+ PIPE_CONF_CHECK_I(dip.vsc_ext_sdp_tl);
+ PIPE_CONF_CHECK_I(dip.cmn_sdp_tl);
}
if (!fastset || intel_vrr_always_use_vrr_tg(display)) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 334179685ea2..79f30660c2b6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1013,6 +1013,12 @@ struct intel_dip {
* The programmed transmit line is (Vtotal - value)
*/
u16 emp_as_sdp_tl;
+ u16 gmp_sdp_tl;
+ u16 pps_sdp_tl;
+ u16 vsc_sdp_tl;
+ u16 vsc_ext_sdp_tl;
+ /* Common SDP Base transmission line (Xe3p_lpd+) */
+ u16 cmn_sdp_tl;
};
struct intel_crtc_state {
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 10/14] drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (8 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 09/14] drm/i915/dip: Store SDP transmission lines in crtc_state Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 11/14] drm/i915/dip: Enable Common " Ankit Nautiyal
` (6 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Introduce helpers to program or disable CMN_SDP_TL and stagger registers
using the state stored in crtc_state.
v2:
- Use HAS_COMMON_SDP_TL(display) instead of checking
crtc_state->dip.cmn_sdp_tl, since 0 is a valid transmission line value.
(Sashiko)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dip.c | 56 ++++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dip.h | 2 +
2 files changed, 58 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
index d1acc7eb5a39..f8e8577b2755 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.c
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -4,6 +4,8 @@
*
*/
+#include <drm/drm_print.h>
+
#include "intel_de.h"
#include "intel_dip.h"
#include "intel_dip_regs.h"
@@ -61,3 +63,57 @@ void intel_dip_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_st
{
crtc_state->dip.emp_as_sdp_tl = intel_dip_read_emp_as_sdp_tl(crtc_state);
}
+
+static int intel_dip_sdp_tl_to_stagger(const struct intel_crtc_state *crtc_state,
+ u16 sdp_transmission_line)
+{
+ return sdp_transmission_line - crtc_state->dip.cmn_sdp_tl;
+}
+
+void intel_dip_cmn_sdp_transmission_line_enable(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ int gmp_stagger;
+ int pps_stagger;
+ int vsc_ext_stagger;
+
+ if (!HAS_COMMON_SDP_TL(display))
+ return;
+
+ gmp_stagger = intel_dip_sdp_tl_to_stagger(crtc_state,
+ crtc_state->dip.gmp_sdp_tl);
+
+ pps_stagger = intel_dip_sdp_tl_to_stagger(crtc_state,
+ crtc_state->dip.pps_sdp_tl);
+
+ vsc_ext_stagger = intel_dip_sdp_tl_to_stagger(crtc_state,
+ crtc_state->dip.vsc_ext_sdp_tl);
+
+ if (drm_WARN_ON(display->drm, gmp_stagger < 0))
+ return;
+ if (drm_WARN_ON(display->drm, pps_stagger < 0))
+ return;
+ if (drm_WARN_ON(display->drm, vsc_ext_stagger < 0))
+ return;
+
+ intel_de_write(display, CMN_SDP_TL_STGR_CTL(display, cpu_transcoder),
+ GMP_STAGGER(gmp_stagger) |
+ PPS_STAGGER(pps_stagger) |
+ VSC_EXT_STAGGER(vsc_ext_stagger));
+
+ intel_de_write(display, CMN_SDP_TL(display, cpu_transcoder),
+ TRANSMISSION_LINE_ENABLE |
+ BASE_TRANSMISSION_LINE(crtc_state->dip.cmn_sdp_tl));
+}
+
+void intel_dip_cmn_sdp_transmission_line_disable(const struct intel_crtc_state *old_crtc_state)
+{
+ struct intel_display *display = to_intel_display(old_crtc_state);
+ enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
+
+ if (!HAS_COMMON_SDP_TL(display))
+ return;
+
+ intel_de_write(display, CMN_SDP_TL(display, cpu_transcoder), 0);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dip.h b/drivers/gpu/drm/i915/display/intel_dip.h
index 8ff22eb5663b..7c64c84cb1be 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.h
+++ b/drivers/gpu/drm/i915/display/intel_dip.h
@@ -47,5 +47,7 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
void intel_dip_sdp_tl_compute_config_late(struct intel_crtc_state *crtc_state);
void intel_dip_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state);
+void intel_dip_cmn_sdp_transmission_line_enable(const struct intel_crtc_state *crtc_state);
+void intel_dip_cmn_sdp_transmission_line_disable(const struct intel_crtc_state *old_crtc_state);
#endif /* __INTEL_DIP_H__ */
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 11/14] drm/i915/dip: Enable Common SDP Transmission line
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (9 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 10/14] drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 17:28 ` sashiko-bot
2026-09-15 16:46 ` [PATCH v7 12/14] drm/i915/dp: Account VSC SDP in min guardband Ankit Nautiyal
` (5 subsequent siblings)
16 siblings, 1 reply; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Enable programming of the common SDP transmission line on platforms that
support it. Compute and program the common base transmission line and
per-SDP stagger values from the crtc state during modeset, and disable the
feature on pipe disable.
Currently, the stagger values are set as per the default policy of the
Hardware. This can be optimized later if we come up with a specific driver
policy to sequence the SDPs better.
v2: Add WARN if the Common Transmission Line is more than Guardband +
SCL. (Suraj)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +
drivers/gpu/drm/i915/display/intel_dip.c | 96 ++++++++++++++++++++++++
2 files changed, 99 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index dacb4b7588a0..3cdb06e81130 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2737,6 +2737,8 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
/* 6.o Configure and enable FEC if needed */
intel_ddi_enable_fec(encoder, crtc_state);
+ intel_dip_cmn_sdp_transmission_line_enable(crtc_state);
+
/* 7.a 128b/132b SST. */
if (!is_mst && intel_dp_is_uhbr(crtc_state)) {
/* VCPID 1, start slot 0 for 128b/132b, tu slots */
@@ -3124,6 +3126,7 @@ static void intel_ddi_buf_disable(struct intel_encoder *encoder,
DP_TP_CTL_ENABLE, 0);
}
+ intel_dip_cmn_sdp_transmission_line_disable(crtc_state);
intel_ddi_disable_fec(encoder, crtc_state);
if (DISPLAY_VER(display) < 14)
diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
index f8e8577b2755..f447150ff7bc 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.c
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -10,6 +10,7 @@
#include "intel_dip.h"
#include "intel_dip_regs.h"
#include "intel_display_types.h"
+#include "intel_hdmi.h"
static int intel_dip_get_as_sdp_transmission_line(const struct intel_crtc_state *crtc_state)
{
@@ -54,14 +55,109 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
EMP_AS_SDP_DB_TL(crtc_state->dip.emp_as_sdp_tl));
}
+static int intel_dip_sdp_stagger_to_tl(struct intel_crtc_state *crtc_state,
+ int stagger)
+{
+ return crtc_state->dip.cmn_sdp_tl + stagger;
+}
+
+static
+void intel_dip_cmn_sdp_tl_compute_config_late(struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ bool as_sdp;
+
+ if (!HAS_COMMON_SDP_TL(display))
+ return;
+
+ as_sdp = crtc_state->infoframes.enable &
+ intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);
+ /*
+ * When AS SDP is enabled :
+ * - The common SDP Transmission Line matches the EMP SDP Transmission Line.
+ *
+ * When AS SDP is disabled:
+ * - Bspec mentions the positions as lines of delayed vblank.
+ * - Guardband = 1st line of delayed vblank
+ * - Common SDP Transmission line is set to 2nd line of delayed vblank.
+ */
+
+ if (as_sdp)
+ crtc_state->dip.cmn_sdp_tl = crtc_state->dip.emp_as_sdp_tl;
+ else
+ crtc_state->dip.cmn_sdp_tl = crtc_state->vrr.guardband - 1;
+
+ if (drm_WARN_ON(display->drm,
+ crtc_state->dip.cmn_sdp_tl >=
+ crtc_state->vrr.guardband + crtc_state->set_context_latency))
+ return;
+
+ /*
+ * Currently we are programming the default stagger values, but these
+ * can be optimized if required, based on number of SDPs enabled.
+ *
+ * Default values of the Transmission lines for SDPs other than AS SDP:
+ * VSC : CMN SDP Transmission line
+ * GMP : CMN SDP Transmission line
+ * PPS : CMN SDP Transmission line + 1
+ * VSC_EXT: CMN SDP Transmission line + 2
+ */
+ crtc_state->dip.vsc_sdp_tl = crtc_state->dip.cmn_sdp_tl;
+ crtc_state->dip.gmp_sdp_tl =
+ intel_dip_sdp_stagger_to_tl(crtc_state, GMP_STAGGER_DEFAULT);
+ crtc_state->dip.pps_sdp_tl =
+ intel_dip_sdp_stagger_to_tl(crtc_state, PPS_STAGGER_DEFAULT);
+ crtc_state->dip.vsc_ext_sdp_tl =
+ intel_dip_sdp_stagger_to_tl(crtc_state, VSC_EXT_STAGGER_DEFAULT);
+}
+
void intel_dip_sdp_tl_compute_config_late(struct intel_crtc_state *crtc_state)
{
crtc_state->dip.emp_as_sdp_tl = intel_dip_get_as_sdp_transmission_line(crtc_state);
+
+ intel_dip_cmn_sdp_tl_compute_config_late(crtc_state);
+}
+
+static
+void intel_dip_cmn_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u16 vsc_ext_stagger, pps_stagger, gmp_stagger;
+ u32 val;
+
+ if (!HAS_COMMON_SDP_TL(display))
+ return;
+
+ val = intel_de_read(display, CMN_SDP_TL(display, cpu_transcoder));
+
+ if (!(val & TRANSMISSION_LINE_ENABLE))
+ return;
+
+ crtc_state->dip.cmn_sdp_tl = REG_FIELD_GET(BASE_TRANSMISSION_LINE_MASK, val);
+
+ /* SDP VSC uses same transmission line as CMN base transmission line */
+ crtc_state->dip.vsc_sdp_tl = crtc_state->dip.cmn_sdp_tl;
+
+ val = intel_de_read(display, CMN_SDP_TL_STGR_CTL(display, cpu_transcoder));
+
+ vsc_ext_stagger = REG_FIELD_GET(VSC_EXT_STAGGER_MASK, val);
+ pps_stagger = REG_FIELD_GET(PPS_STAGGER_MASK, val);
+ gmp_stagger = REG_FIELD_GET(GMP_STAGGER_MASK, val);
+
+ crtc_state->dip.vsc_ext_sdp_tl =
+ intel_dip_sdp_stagger_to_tl(crtc_state, vsc_ext_stagger);
+ crtc_state->dip.pps_sdp_tl =
+ intel_dip_sdp_stagger_to_tl(crtc_state, pps_stagger);
+ crtc_state->dip.gmp_sdp_tl =
+ intel_dip_sdp_stagger_to_tl(crtc_state, gmp_stagger);
}
void intel_dip_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state)
{
crtc_state->dip.emp_as_sdp_tl = intel_dip_read_emp_as_sdp_tl(crtc_state);
+
+ intel_dip_cmn_sdp_transmission_line_get_config(crtc_state);
}
static int intel_dip_sdp_tl_to_stagger(const struct intel_crtc_state *crtc_state,
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 12/14] drm/i915/dp: Account VSC SDP in min guardband
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (10 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 11/14] drm/i915/dip: Enable Common " Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-16 2:41 ` Kandpal, Suraj
2026-09-15 16:46 ` [PATCH v7 13/14] drm/i915/dp: Adjust SDP guardband requirement for CMN_SDP_TL Ankit Nautiyal
` (4 subsequent siblings)
16 siblings, 1 reply; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
The transmission line for VSC SDP is the same as AS SDP
(EMP_AS_SDP_TL) when AS SDP is enabled. Otherwise, it uses the
second line of delayed vblank. For VSC without AS SDP, this
requires 2 lines plus 1 setup line, so the VRR guardband must be
at least 3 lines.
When both AS SDP and VSC SDP are enabled, the guardband
requirement is already accounted for during optimized guardband
calculation and the final guardband validation in
compute_config_late(). However, when VSC SDP is enabled without
AS SDP, the VSC SDP requirement is not checked explicitly.
Even in the unlikely case where the optimized guardband is
clamped to vblank length, it cannot fall below 5 lines since such
modes are already pruned. Still, for completeness, account for
VSC SDP and ensure a minimum guardband of 3 lines.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8c3a324e164e..018dc6303dfe 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -7359,6 +7359,8 @@ int intel_dp_get_lines_for_sdp(const struct intel_crtc_state *crtc_state, u32 ty
return 8;
case DP_SDP_PPS:
return 7;
+ case DP_SDP_VSC:
+ return 3;
case DP_SDP_ADAPTIVE_SYNC:
return crtc_state->vrr.vsync_start + 1;
default:
@@ -7390,6 +7392,11 @@ int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
sdp_guardband = max(sdp_guardband,
intel_dp_get_lines_for_sdp(crtc_state, DP_SDP_ADAPTIVE_SYNC));
+ if (crtc_state->infoframes.enable &
+ intel_hdmi_infoframe_enable(DP_SDP_VSC))
+ sdp_guardband = max(sdp_guardband,
+ intel_dp_get_lines_for_sdp(crtc_state, DP_SDP_VSC));
+
return sdp_guardband;
}
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 13/14] drm/i915/dp: Adjust SDP guardband requirement for CMN_SDP_TL
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (11 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 12/14] drm/i915/dp: Account VSC SDP in min guardband Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 14/14] drm/i915/display: Dump DIP Transmission lines Ankit Nautiyal
` (3 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Once CMN_SDP_TL is enabled, GMP/PPS/VSC/VSC_EXT/AS SDPs are no longer
positioned relative to the guardband: they are anchored via
CMN_SDP_TL/CMN_SDP_TL_STGR_CTL instead. As per Bspec 68921, SDP Setup is
0 in this mode, so the old per-packet guardband sizing (based on
GMP/PPS/AS-SDP being enabled) no longer applies for GMP/PPS/VSC/VSC_EXT.
Since we are using the default stagger values for now, size the guardband
such that the max default transmission line can be supported, similar to
when CMN SDP TL is not set:
base : 2nd line of delayed vblank
GMP : 2 + GMP_STAGGER
VSC_EXT: 2 + VSC_EXT_STAGGER
VSC : 2
PPS : 2 + PPS_STAGGER
SDP Setup = 1 + MAX(GMP, VSC_EXT, VSC, PPS setup lines)
Add intel_dp_get_lines_for_cmn_sdp_tl() and route it via the existing
intel_dp_get_lines_for_sdp().
The AS SDP check in intel_dp_sdp_min_guardband() still adds
vrr.vsync_start + 1 to the guardband, since AS SDP positioning is
unaffected by CMN_SDP_TL.
v2: Add VSC min SDP guardband. (Sashiko)
Bspec: 68921
Assisted-by: Copilot:claude-sonnet-4.5
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 52 ++++++++++++++++++++++++-
1 file changed, 50 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 018dc6303dfe..f13f17d67d5a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -62,6 +62,7 @@
#include "intel_ddi.h"
#include "intel_de.h"
#include "intel_dip.h"
+#include "intel_dip_regs.h"
#include "intel_display_driver.h"
#include "intel_display_jiffies.h"
#include "intel_display_utils.h"
@@ -7348,9 +7349,58 @@ int intel_dp_compute_config_late(struct intel_encoder *encoder,
return 0;
}
+static
+int intel_dp_get_lines_for_cmn_sdp_tl(u32 type)
+{
+ u32 stagger_val;
+
+ /*
+ * Since we are using default stagger values similar to the case
+ * where CMN SDP TL is not set, the different SDP transmission
+ * lines are:
+ * base : 2nd line of delayed vblank:
+ * GMP : 2 + GMP_STAGGER
+ * VSC_EXT: 2 + VSC_EXT_STAGGER
+ * VSC : 2
+ * PPS : 2 + PPS_STAGGER
+ *
+ * SDP Setup = 1 + MAX(GMP, VSC_EXT, VSC, PPS setup lines)
+ *
+ * For EMP_AS_SDP_TL guardband should be more than vrr.vsync_start.
+ */
+
+ switch (type) {
+ case DP_SDP_VSC_EXT_VESA:
+ case DP_SDP_VSC_EXT_CEA:
+ stagger_val = VSC_EXT_STAGGER_DEFAULT;
+ break;
+ case HDMI_PACKET_TYPE_GAMUT_METADATA:
+ stagger_val = GMP_STAGGER_DEFAULT;
+ break;
+ case DP_SDP_PPS:
+ stagger_val = PPS_STAGGER_DEFAULT;
+ break;
+ case DP_SDP_VSC:
+ stagger_val = 0;
+ break;
+ default:
+ return 0;
+ }
+
+ return 1 + 2 + stagger_val;
+}
+
static
int intel_dp_get_lines_for_sdp(const struct intel_crtc_state *crtc_state, u32 type)
{
+ struct intel_display *display = to_intel_display(crtc_state);
+
+ if (type == DP_SDP_ADAPTIVE_SYNC)
+ return crtc_state->vrr.vsync_start + 1;
+
+ if (HAS_COMMON_SDP_TL(display))
+ return intel_dp_get_lines_for_cmn_sdp_tl(type);
+
switch (type) {
case DP_SDP_VSC_EXT_VESA:
case DP_SDP_VSC_EXT_CEA:
@@ -7361,8 +7411,6 @@ int intel_dp_get_lines_for_sdp(const struct intel_crtc_state *crtc_state, u32 ty
return 7;
case DP_SDP_VSC:
return 3;
- case DP_SDP_ADAPTIVE_SYNC:
- return crtc_state->vrr.vsync_start + 1;
default:
break;
}
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v7 14/14] drm/i915/display: Dump DIP Transmission lines
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (12 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 13/14] drm/i915/dp: Adjust SDP guardband requirement for CMN_SDP_TL Ankit Nautiyal
@ 2026-09-15 16:46 ` Ankit Nautiyal
2026-09-15 20:23 ` ✓ i915.CI.BAT: success for Add support for Common SDP Transmission Line (rev7) Patchwork
` (2 subsequent siblings)
16 siblings, 0 replies; 23+ messages in thread
From: Ankit Nautiyal @ 2026-09-15 16:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal,
Ankit Nautiyal
Add DIP transmission lines to the CRTC state dump.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index ad4f362e0c09..92675a88b969 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -251,6 +251,15 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
str_enabled_disabled(pipe_config->has_panel_replay),
str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));
drm_printf(&p, "minimum hblank: %d\n", pipe_config->min_hblank);
+
+ drm_printf(&p, "DIP Transmission Lines: EMP/AS SDP: %u\n",
+ pipe_config->dip.emp_as_sdp_tl);
+ drm_printf(&p, "DIP Transmission Lines: Common Base SDP: %u, GMP SDP: %u, PPS SDP: %u, VSC SDP: %u, VSC_EXT SDP: %u\n",
+ pipe_config->dip.cmn_sdp_tl,
+ pipe_config->dip.gmp_sdp_tl,
+ pipe_config->dip.pps_sdp_tl,
+ pipe_config->dip.vsc_sdp_tl,
+ pipe_config->dip.vsc_ext_sdp_tl);
}
drm_printf(&p, "audio: %i, infoframes: %i, infoframes enabled: 0x%x\n",
--
2.50.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [PATCH v7 06/14] drm/i915/dip: Store and use AS SDP transmission line from crtc state
2026-09-15 16:46 ` [PATCH v7 06/14] drm/i915/dip: Store and use AS SDP transmission line from crtc state Ankit Nautiyal
@ 2026-09-15 17:22 ` sashiko-bot
2026-09-16 4:18 ` Nautiyal, Ankit K
0 siblings, 1 reply; 23+ messages in thread
From: sashiko-bot @ 2026-09-15 17:22 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/i915/dip: Spurious state mismatch for EMP_AS_SDP_TL on HDMI fastsets
--
commit 33aef03ce9383e1676d66a385c5b27a724956776
Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: drm/i915/dip: Store and use AS SDP transmission line from crtc state
The driver computes and stores the Adaptive Sync SDP transmission line in the
crtc state and uses it when programming the EMP_AS_SDP_TL register. This
prepares the ground for supporting programmable transmission lines for
additional DP SDPs.
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9b3b526e5e55b..dacb4b7588a02 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
[ ... ]
> @@ -4235,6 +4236,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
> intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);
> intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
> intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);
> + intel_dip_sdp_transmission_line_get_config(pipe_config);
[Severity: Medium]
Will this trigger a spurious state mismatch for EMP_AS_SDP_TL on HDMI fastsets?
If a non-DP (e.g., HDMI) connection inherits a non-zero EMP_AS_SDP_TL value
from a BIOS handover or a previous DP VRR mode, the hardware state
(hw_crtc_state) will reflect this non-zero value.
This happens because intel_dip_sdp_transmission_line_get_config()
unconditionally reads the register here via intel_dip_read_emp_as_sdp_tl()
without verifying if the encoder is DP:
drivers/gpu/drm/i915/display/intel_dip.c:intel_dip_read_emp_as_sdp_tl() {
...
val = intel_de_read(display, EMP_AS_SDP_TL(display, cpu_transcoder));
return REG_FIELD_GET(EMP_AS_SDP_DB_TL_MASK, val);
}
Meanwhile, the software state (sw_crtc_state) expects 0 for HDMI since
intel_dip_sdp_tl_compute_config_late() is only called for DP.
Because the dip.emp_as_sdp_tl comparison is guarded by if (!fastset) in
intel_pipe_config_compare(), the discrepancy is ignored during the fastset
compatibility check, allowing a fastset to proceed.
The fastset skips reprogramming the VRR transcoder timings, leaving the
hardware register at its stale non-zero value.
During post-commit hardware verification in verify_crtc_state(),
intel_pipe_config_compare() is called with fastset = false, which strictly
checks the field. This causes a drm_WARN backtrace when comparing the expected
0 against the stale non-zero hardware value.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260915164657.3429075-1-ankit.k.nautiyal@intel.com?part=6
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v7 11/14] drm/i915/dip: Enable Common SDP Transmission line
2026-09-15 16:46 ` [PATCH v7 11/14] drm/i915/dip: Enable Common " Ankit Nautiyal
@ 2026-09-15 17:28 ` sashiko-bot
2026-09-16 4:19 ` Nautiyal, Ankit K
0 siblings, 1 reply; 23+ messages in thread
From: sashiko-bot @ 2026-09-15 17:28 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/i915/dip: Missing CMN_SDP_TL programming for DP MST slave transcoders
--
commit de3a67cbeba4a6e70cc767d1dce1950454f58dfa
Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
drm/i915/dip: Enable Common SDP Transmission line
This commit enables programming of the common SDP transmission line on
supported platforms. It computes and programs the base transmission line
and stagger values during modeset. It also disables the feature on pipe
disable.
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index dacb4b7588a02..3cdb06e81130b 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2737,6 +2737,8 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> /* 6.o Configure and enable FEC if needed */
> intel_ddi_enable_fec(encoder, crtc_state);
>
> + intel_dip_cmn_sdp_transmission_line_enable(crtc_state);
> +
[Severity: Medium]
Will placing this transcoder-specific initialization in mtl_ddi_pre_enable_dp()
cause it to be skipped for subsequent MST streams?
In DP MST configurations, mst_stream_pre_enable() invokes the primary encoder's
pre_enable hook (mtl_ddi_pre_enable_dp()) solely for the first active MST
stream.
Because intel_dip_cmn_sdp_transmission_line_enable() is called here, it
appears it will be skipped for all subsequent streams. This would leave the
CMN_SDP_TL registers uninitialized for slave transcoders, potentially causing
broken or mistimed SDP transmission on secondary MST monitors.
> /* 7.a 128b/132b SST. */
> if (!is_mst && intel_dp_is_uhbr(crtc_state)) {
> /* VCPID 1, start slot 0 for 128b/132b, tu slots */
[ ... ]
> @@ -3124,6 +3126,7 @@ static void intel_ddi_buf_disable(struct intel_encoder *encoder,
> DP_TP_CTL_ENABLE, 0);
> }
>
> + intel_dip_cmn_sdp_transmission_line_disable(crtc_state);
[Severity: Medium]
Does placing this disable routine in intel_ddi_buf_disable() prevent it from
executing for slave transcoders during MST teardown?
Similar to the enable path, intel_ddi_buf_disable() is only called for the
last active stream during teardown, which means the CMN_SDP_TL disable routine
would be skipped for slave streams.
> intel_ddi_disable_fec(encoder, crtc_state);
>
> if (DISPLAY_VER(display) < 14)
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260915164657.3429075-1-ankit.k.nautiyal@intel.com?part=11
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ i915.CI.BAT: success for Add support for Common SDP Transmission Line (rev7)
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (13 preceding siblings ...)
2026-09-15 16:46 ` [PATCH v7 14/14] drm/i915/display: Dump DIP Transmission lines Ankit Nautiyal
@ 2026-09-15 20:23 ` Patchwork
2026-09-16 7:09 ` ✓ i915.CI.Full: " Patchwork
2026-09-18 3:54 ` [PATCH v7 00/14] Add support for Common SDP Transmission Line Nautiyal, Ankit K
16 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-09-15 20:23 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 997 bytes --]
== Series Details ==
Series: Add support for Common SDP Transmission Line (rev7)
URL : https://patchwork.freedesktop.org/series/162622/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19152 -> Patchwork_162622v7
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/index.html
Participating hosts (39 -> 38)
------------------------------
Missing (1): bat-dg2-13
Changes
-------
No changes found
Build changes
-------------
* Linux: CI_DRM_19152 -> Patchwork_162622v7
CI-20190529: 20190529
CI_DRM_19152: 0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9098: 9098
Patchwork_162622v7: 0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/index.html
[-- Attachment #2: Type: text/html, Size: 1562 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH v7 12/14] drm/i915/dp: Account VSC SDP in min guardband
2026-09-15 16:46 ` [PATCH v7 12/14] drm/i915/dp: Account VSC SDP in min guardband Ankit Nautiyal
@ 2026-09-16 2:41 ` Kandpal, Suraj
0 siblings, 0 replies; 23+ messages in thread
From: Kandpal, Suraj @ 2026-09-16 2:41 UTC (permalink / raw)
To: Nautiyal, Ankit K, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, Murthy, Arun R,
jani.nikula@linux.intel.com
> Subject: [PATCH v7 12/14] drm/i915/dp: Account VSC SDP in min guardband
>
> The transmission line for VSC SDP is the same as AS SDP
> (EMP_AS_SDP_TL) when AS SDP is enabled. Otherwise, it uses the second line
> of delayed vblank. For VSC without AS SDP, this requires 2 lines plus 1 setup
> line, so the VRR guardband must be at least 3 lines.
>
> When both AS SDP and VSC SDP are enabled, the guardband requirement is
> already accounted for during optimized guardband calculation and the final
> guardband validation in compute_config_late(). However, when VSC SDP is
> enabled without AS SDP, the VSC SDP requirement is not checked explicitly.
>
> Even in the unlikely case where the optimized guardband is clamped to vblank
> length, it cannot fall below 5 lines since such modes are already pruned. Still,
> for completeness, account for VSC SDP and ensure a minimum guardband of 3
> lines.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 8c3a324e164e..018dc6303dfe 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -7359,6 +7359,8 @@ int intel_dp_get_lines_for_sdp(const struct
> intel_crtc_state *crtc_state, u32 ty
> return 8;
> case DP_SDP_PPS:
> return 7;
> + case DP_SDP_VSC:
> + return 3;
> case DP_SDP_ADAPTIVE_SYNC:
> return crtc_state->vrr.vsync_start + 1;
> default:
> @@ -7390,6 +7392,11 @@ int intel_dp_sdp_min_guardband(const struct
> intel_crtc_state *crtc_state,
> sdp_guardband = max(sdp_guardband,
> intel_dp_get_lines_for_sdp(crtc_state,
> DP_SDP_ADAPTIVE_SYNC));
>
> + if (crtc_state->infoframes.enable &
> + intel_hdmi_infoframe_enable(DP_SDP_VSC))
> + sdp_guardband = max(sdp_guardband,
> + intel_dp_get_lines_for_sdp(crtc_state,
> DP_SDP_VSC));
> +
> return sdp_guardband;
> }
>
> --
> 2.50.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v7 06/14] drm/i915/dip: Store and use AS SDP transmission line from crtc state
2026-09-15 17:22 ` sashiko-bot
@ 2026-09-16 4:18 ` Nautiyal, Ankit K
0 siblings, 0 replies; 23+ messages in thread
From: Nautiyal, Ankit K @ 2026-09-16 4:18 UTC (permalink / raw)
To: sashiko-reviews; +Cc: intel-gfx, intel-xe
On 9/15/2026 10:52 PM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] drm/i915/dip: Spurious state mismatch for EMP_AS_SDP_TL on HDMI fastsets
> --
>
> commit 33aef03ce9383e1676d66a385c5b27a724956776
> Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Subject: drm/i915/dip: Store and use AS SDP transmission line from crtc state
>
> The driver computes and stores the Adaptive Sync SDP transmission line in the
> crtc state and uses it when programming the EMP_AS_SDP_TL register. This
> prepares the ground for supporting programmable transmission lines for
> additional DP SDPs.
>
>> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>> index 9b3b526e5e55b..dacb4b7588a02 100644
>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> [ ... ]
>> @@ -4235,6 +4236,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
>> intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);
>> intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
>> intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);
>> + intel_dip_sdp_transmission_line_get_config(pipe_config);
> [Severity: Medium]
> Will this trigger a spurious state mismatch for EMP_AS_SDP_TL on HDMI fastsets?
>
> If a non-DP (e.g., HDMI) connection inherits a non-zero EMP_AS_SDP_TL value
> from a BIOS handover or a previous DP VRR mode, the hardware state
> (hw_crtc_state) will reflect this non-zero value.
>
> This happens because intel_dip_sdp_transmission_line_get_config()
> unconditionally reads the register here via intel_dip_read_emp_as_sdp_tl()
> without verifying if the encoder is DP:
>
> drivers/gpu/drm/i915/display/intel_dip.c:intel_dip_read_emp_as_sdp_tl() {
> ...
> val = intel_de_read(display, EMP_AS_SDP_TL(display, cpu_transcoder));
> return REG_FIELD_GET(EMP_AS_SDP_DB_TL_MASK, val);
> }
>
> Meanwhile, the software state (sw_crtc_state) expects 0 for HDMI since
> intel_dip_sdp_tl_compute_config_late() is only called for DP.
>
> Because the dip.emp_as_sdp_tl comparison is guarded by if (!fastset) in
> intel_pipe_config_compare(), the discrepancy is ignored during the fastset
> compatibility check, allowing a fastset to proceed.
>
> The fastset skips reprogramming the VRR transcoder timings, leaving the
> hardware register at its stale non-zero value.
intel_vrr_set_transcoder_timings() is set from both modeset and fastset
path and is written for all platforms that support VRR && have
EMP_AS_SDP_TL.
intel_vrr_possible() is basically checking flipline that is always set
for the platforms that have VRR and EMP_AS_SDP_TL, so there is no early
return from intel_vrr_set_transcoder_timings() either.
Regards,
Ankit
>
> During post-commit hardware verification in verify_crtc_state(),
> intel_pipe_config_compare() is called with fastset = false, which strictly
> checks the field. This causes a drm_WARN backtrace when comparing the expected
> 0 against the stale non-zero hardware value.
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v7 11/14] drm/i915/dip: Enable Common SDP Transmission line
2026-09-15 17:28 ` sashiko-bot
@ 2026-09-16 4:19 ` Nautiyal, Ankit K
0 siblings, 0 replies; 23+ messages in thread
From: Nautiyal, Ankit K @ 2026-09-16 4:19 UTC (permalink / raw)
To: sashiko-reviews; +Cc: intel-gfx, intel-xe
On 9/15/2026 10:58 PM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] drm/i915/dip: Missing CMN_SDP_TL programming for DP MST slave transcoders
> --
>
> commit de3a67cbeba4a6e70cc767d1dce1950454f58dfa
> Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>
> drm/i915/dip: Enable Common SDP Transmission line
>
> This commit enables programming of the common SDP transmission line on
> supported platforms. It computes and programs the base transmission line
> and stagger values during modeset. It also disables the feature on pipe
> disable.
>
>> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>> index dacb4b7588a02..3cdb06e81130b 100644
>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> @@ -2737,6 +2737,8 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>> /* 6.o Configure and enable FEC if needed */
>> intel_ddi_enable_fec(encoder, crtc_state);
>>
>> + intel_dip_cmn_sdp_transmission_line_enable(crtc_state);
>> +
> [Severity: Medium]
> Will placing this transcoder-specific initialization in mtl_ddi_pre_enable_dp()
> cause it to be skipped for subsequent MST streams?
>
> In DP MST configurations, mst_stream_pre_enable() invokes the primary encoder's
> pre_enable hook (mtl_ddi_pre_enable_dp()) solely for the first active MST
> stream.
>
> Because intel_dip_cmn_sdp_transmission_line_enable() is called here, it
> appears it will be skipped for all subsequent streams. This would leave the
> CMN_SDP_TL registers uninitialized for slave transcoders, potentially causing
> broken or mistimed SDP transmission on secondary MST monitors.
>
>> /* 7.a 128b/132b SST. */
>> if (!is_mst && intel_dp_is_uhbr(crtc_state)) {
>> /* VCPID 1, start slot 0 for 128b/132b, tu slots */
> [ ... ]
>> @@ -3124,6 +3126,7 @@ static void intel_ddi_buf_disable(struct intel_encoder *encoder,
>> DP_TP_CTL_ENABLE, 0);
>> }
>>
>> + intel_dip_cmn_sdp_transmission_line_disable(crtc_state);
> [Severity: Medium]
> Does placing this disable routine in intel_ddi_buf_disable() prevent it from
> executing for slave transcoders during MST teardown?
>
> Similar to the enable path, intel_ddi_buf_disable() is only called for the
> last active stream during teardown, which means the CMN_SDP_TL disable routine
> would be skipped for slave streams.
For both comments. MST + VRR is not yet supported.
Regards,
Ankit
>
>> intel_ddi_disable_fec(encoder, crtc_state);
>>
>> if (DISPLAY_VER(display) < 14)
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ i915.CI.Full: success for Add support for Common SDP Transmission Line (rev7)
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (14 preceding siblings ...)
2026-09-15 20:23 ` ✓ i915.CI.BAT: success for Add support for Common SDP Transmission Line (rev7) Patchwork
@ 2026-09-16 7:09 ` Patchwork
2026-09-18 3:54 ` [PATCH v7 00/14] Add support for Common SDP Transmission Line Nautiyal, Ankit K
16 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-09-16 7:09 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 155246 bytes --]
== Series Details ==
Series: Add support for Common SDP Transmission Line (rev7)
URL : https://patchwork.freedesktop.org/series/162622/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19152_full -> Patchwork_162622v7_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_162622v7_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg1: NOTRUN -> [SKIP][1] ([i915#8411])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-rkl: NOTRUN -> [SKIP][2] ([i915#8411])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@gem_bad_reloc@negative-reloc-bltcopy:
- shard-mtlp: NOTRUN -> [SKIP][3] ([i915#3281]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_bad_reloc@negative-reloc-bltcopy.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#9323])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_ccs@block-multicopy-inplace:
- shard-tglu-1: NOTRUN -> [SKIP][5] ([i915#3555] / [i915#9323])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@gem_ccs@block-multicopy-inplace.html
* igt@gem_ccs@suspend-resume:
- shard-tglu: NOTRUN -> [SKIP][6] ([i915#9323])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@gem_ccs@suspend-resume.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-tglu-1: NOTRUN -> [SKIP][7] ([i915#6335])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_freq@sysfs@gt0:
- shard-dg2: [PASS][8] -> [FAIL][9] ([i915#9561]) +1 other test fail
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg2-1/igt@gem_ctx_freq@sysfs@gt0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-5/igt@gem_ctx_freq@sysfs@gt0.html
* igt@gem_ctx_isolation@preservation-s3:
- shard-dg2: [PASS][10] -> [INCOMPLETE][11] ([i915#13356]) +1 other test incomplete
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg2-1/igt@gem_ctx_isolation@preservation-s3.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-5/igt@gem_ctx_isolation@preservation-s3.html
- shard-glk10: NOTRUN -> [INCOMPLETE][12] ([i915#13356] / [i915#16466]) +1 other test incomplete
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@gem_ctx_isolation@preservation-s3.html
* igt@gem_ctx_persistence@engines-hang:
- shard-snb: NOTRUN -> [SKIP][13] ([i915#1099]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-snb4/igt@gem_ctx_persistence@engines-hang.html
* igt@gem_ctx_sseu@engines:
- shard-rkl: NOTRUN -> [SKIP][14] ([i915#280])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@gem_ctx_sseu@engines.html
* igt@gem_eio@in-flight-suspend:
- shard-rkl: [PASS][15] -> [INCOMPLETE][16] ([i915#13390])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-5/igt@gem_eio@in-flight-suspend.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@gem_eio@in-flight-suspend.html
- shard-glk: NOTRUN -> [INCOMPLETE][17] ([i915#13390])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk8/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_balancer@parallel:
- shard-rkl: NOTRUN -> [SKIP][18] ([i915#4525]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-tglu: NOTRUN -> [SKIP][19] ([i915#4525])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_big@single:
- shard-rkl: NOTRUN -> [FAIL][20] ([i915#16604])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@gem_exec_big@single.html
* igt@gem_exec_capture@capture-recoverable:
- shard-tglu: NOTRUN -> [SKIP][21] ([i915#6344])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_flush@basic-uc-set-default:
- shard-dg1: NOTRUN -> [SKIP][22] ([i915#3539])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_exec_flush@basic-uc-set-default.html
* igt@gem_exec_flush@basic-wb-ro-before-default:
- shard-dg1: NOTRUN -> [SKIP][23] ([i915#3539] / [i915#4852])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_exec_flush@basic-wb-ro-before-default.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- shard-rkl: NOTRUN -> [SKIP][24] ([i915#3281]) +6 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_exec_reloc@basic-wc-gtt:
- shard-dg1: NOTRUN -> [SKIP][25] ([i915#3281]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_exec_reloc@basic-wc-gtt.html
* igt@gem_fence_thrash@bo-write-verify-none:
- shard-dg1: NOTRUN -> [SKIP][26] ([i915#4860])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_fence_thrash@bo-write-verify-none.html
* igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][27] ([i915#4860])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
* igt@gem_lmem_evict@dontneed-evict-race:
- shard-rkl: NOTRUN -> [SKIP][28] ([i915#4613] / [i915#7582])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@gem_lmem_evict@dontneed-evict-race.html
* igt@gem_lmem_swapping@heavy-multi:
- shard-mtlp: NOTRUN -> [SKIP][29] ([i915#4613])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_lmem_swapping@heavy-multi.html
* igt@gem_lmem_swapping@massive-random:
- shard-tglu-1: NOTRUN -> [SKIP][30] ([i915#4613]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-rkl: NOTRUN -> [SKIP][31] ([i915#4613]) +3 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@random-engines:
- shard-glk: NOTRUN -> [SKIP][32] ([i915#4613]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk8/igt@gem_lmem_swapping@random-engines.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-tglu: NOTRUN -> [SKIP][33] ([i915#4613]) +3 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_madvise@dontneed-before-pwrite:
- shard-mtlp: NOTRUN -> [SKIP][34] ([i915#3282])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_madvise@dontneed-before-pwrite.html
* igt@gem_media_vme:
- shard-tglu-1: NOTRUN -> [SKIP][35] ([i915#284])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@gem_media_vme.html
* igt@gem_mmap@big-bo:
- shard-dg1: NOTRUN -> [SKIP][36] ([i915#4083])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_mmap@big-bo.html
* igt@gem_mmap_gtt@fault-concurrent:
- shard-dg1: NOTRUN -> [SKIP][37] ([i915#4077]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_mmap_gtt@fault-concurrent.html
* igt@gem_mmap_wc@write-read:
- shard-mtlp: NOTRUN -> [SKIP][38] ([i915#4083])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_mmap_wc@write-read.html
* igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#3282])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-6/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
- shard-dg1: NOTRUN -> [SKIP][40] ([i915#3282])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
* igt@gem_pwrite@basic-random:
- shard-rkl: NOTRUN -> [SKIP][41] ([i915#3282]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@gem_pwrite@basic-random.html
* igt@gem_pxp@create-regular-context-2:
- shard-dg1: NOTRUN -> [SKIP][42] ([i915#4270])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_pxp@create-regular-context-2.html
* igt@gem_render_copy@y-tiled-mc-ccs-to-y-tiled-ccs:
- shard-dg2: NOTRUN -> [SKIP][43] ([i915#5190] / [i915#8428])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-8/igt@gem_render_copy@y-tiled-mc-ccs-to-y-tiled-ccs.html
* igt@gem_render_copy@yf-tiled-ccs-to-linear:
- shard-mtlp: NOTRUN -> [SKIP][44] ([i915#8428]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_render_copy@yf-tiled-ccs-to-linear.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-dg1: NOTRUN -> [SKIP][45] ([i915#4079])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-tglu: NOTRUN -> [SKIP][46] ([i915#3297])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-rkl: NOTRUN -> [SKIP][47] ([i915#3297]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
* igt@gen9_exec_parse@batch-without-end:
- shard-tglu-1: NOTRUN -> [SKIP][48] ([i915#2527] / [i915#2856]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@gen9_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@bb-chained:
- shard-mtlp: NOTRUN -> [SKIP][49] ([i915#2856])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gen9_exec_parse@bb-chained.html
* igt@gen9_exec_parse@bb-start-far:
- shard-rkl: NOTRUN -> [SKIP][50] ([i915#2527]) +3 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@gen9_exec_parse@bb-start-far.html
* igt@gen9_exec_parse@valid-registers:
- shard-dg1: NOTRUN -> [SKIP][51] ([i915#2527])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@gen9_exec_parse@valid-registers.html
* igt@gpu_buddy@gpu_buddy:
- shard-tglu-1: NOTRUN -> [SKIP][52] ([i915#15678])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@gpu_buddy@gpu_buddy.html
* igt@i915_module_load@fault-injection@__uc_init:
- shard-tglu-1: NOTRUN -> [SKIP][53] ([i915#15479]) +4 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@i915_module_load@fault-injection@__uc_init.html
* igt@i915_module_load@fault-injection@intel_connector_register:
- shard-snb: NOTRUN -> [ABORT][54] ([i915#15342]) +1 other test abort
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-snb4/igt@i915_module_load@fault-injection@intel_connector_register.html
- shard-tglu-1: NOTRUN -> [ABORT][55] ([i915#15342]) +1 other test abort
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@i915_module_load@fault-injection@intel_connector_register.html
* igt@i915_module_load@fault-injection@intel_guc_ct_init:
- shard-snb: NOTRUN -> [SKIP][56] +288 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-snb4/igt@i915_module_load@fault-injection@intel_guc_ct_init.html
* igt@i915_module_load@resize-bar:
- shard-rkl: NOTRUN -> [SKIP][57] ([i915#6412])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@i915_module_load@resize-bar.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-tglu-1: NOTRUN -> [SKIP][58] ([i915#8399])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2: [PASS][59] -> [INCOMPLETE][60] ([i915#13356] / [i915#13820]) +1 other test incomplete
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg2-3/igt@i915_pm_freq_api@freq-suspend@gt0.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-3/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@i915_pm_sseu@full-enable:
- shard-mtlp: NOTRUN -> [SKIP][61] ([i915#8437])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-tglu: NOTRUN -> [SKIP][62] ([i915#16109])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_query@query-topology-unsupported:
- shard-rkl: NOTRUN -> [SKIP][63] ([i915#16079])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@i915_query@query-topology-unsupported.html
* igt@i915_query@test-query-geometry-subslices:
- shard-rkl: NOTRUN -> [SKIP][64] ([i915#5723])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@i915_query@test-query-geometry-subslices.html
* igt@i915_selftest@perf:
- shard-mtlp: [PASS][65] -> [ABORT][66] ([i915#17077]) +1 other test abort
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@i915_selftest@perf.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@i915_selftest@perf.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-rkl: [PASS][67] -> [INCOMPLETE][68] ([i915#4817])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@i915_suspend@fence-restore-tiled2untiled.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-tglu: NOTRUN -> [SKIP][69] ([i915#12454] / [i915#12712])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1:
- shard-glk: [PASS][70] -> [FAIL][71] ([i915#14888])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk6/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk2/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3:
- shard-dg2: [PASS][72] -> [FAIL][73] ([i915#14888]) +1 other test fail
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg2-5/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][74] ([i915#5286]) +2 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][75] ([i915#5286]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-tglu-1: NOTRUN -> [SKIP][76] ([i915#5286]) +2 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-dg1: NOTRUN -> [SKIP][77] ([i915#4538] / [i915#5286]) +1 other test skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
- shard-dg1: NOTRUN -> [SKIP][78] ([i915#3828])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][79] ([i915#3638]) +3 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-mtlp: NOTRUN -> [SKIP][80] +2 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-tglu-1: NOTRUN -> [SKIP][81] +46 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-dg1: NOTRUN -> [SKIP][82] ([i915#4538])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][83] ([i915#6095]) +29 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc@pipe-c-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][84] ([i915#6095]) +45 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc@pipe-c-edp-1.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][85] ([i915#14544] / [i915#6095]) +3 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#14098] / [i915#14544] / [i915#6095]) +1 other test skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][87] ([i915#6095]) +55 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][88] ([i915#14098] / [i915#6095]) +36 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][89] ([i915#6095]) +175 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1:
- shard-glk10: NOTRUN -> [SKIP][90] +86 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][91] ([i915#12805])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][92] ([i915#6095]) +7 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][93] ([i915#12313]) +1 other test skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs:
- shard-tglu: NOTRUN -> [SKIP][94] ([i915#6095]) +34 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][95] ([i915#10307] / [i915#6095]) +74 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-6/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-3.html
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][96] ([i915#10307] / [i915#10434] / [i915#6095]) +4 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-4/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@mode-transition:
- shard-tglu: NOTRUN -> [SKIP][97] ([i915#3742])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-rkl: NOTRUN -> [SKIP][98] ([i915#3742])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_audio@hdmi-audio-after-suspend:
- shard-mtlp: NOTRUN -> [SKIP][99] ([i915#11151])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_chamelium_audio@hdmi-audio-after-suspend.html
* igt@kms_chamelium_color_pipeline@plane-lut1d:
- shard-rkl: NOTRUN -> [SKIP][100] ([i915#16471]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_chamelium_color_pipeline@plane-lut1d.html
* igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
- shard-dg1: NOTRUN -> [SKIP][101] ([i915#11151] / [i915#7828]) +2 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
* igt@kms_chamelium_frames@hdmi-aspect-ratio:
- shard-tglu: NOTRUN -> [SKIP][102] ([i915#11151] / [i915#7828]) +1 other test skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_chamelium_frames@hdmi-aspect-ratio.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-tglu-1: NOTRUN -> [SKIP][103] ([i915#11151] / [i915#7828]) +5 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- shard-mtlp: NOTRUN -> [SKIP][104] ([i915#11151] / [i915#7828])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
- shard-rkl: NOTRUN -> [SKIP][105] ([i915#11151] / [i915#7828]) +3 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html
* igt@kms_color@deep-color:
- shard-rkl: [PASS][106] -> [SKIP][107] ([i915#12655] / [i915#3555])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_color@deep-color.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_color@deep-color.html
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4:
- shard-mtlp: NOTRUN -> [SKIP][108] ([i915#16990]) +7 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4.html
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-4:
- shard-tglu-1: NOTRUN -> [SKIP][109] ([i915#16990]) +31 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-4.html
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4:
- shard-rkl: NOTRUN -> [SKIP][110] ([i915#16990]) +5 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4.html
* igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
- shard-rkl: NOTRUN -> [SKIP][111] ([i915#15330]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html
* igt@kms_content_protection@mei-interface:
- shard-rkl: NOTRUN -> [SKIP][112] ([i915#15865]) +3 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@srm:
- shard-tglu: NOTRUN -> [SKIP][113] ([i915#15865]) +1 other test skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_content_protection@srm.html
* igt@kms_content_protection@type1:
- shard-tglu-1: NOTRUN -> [SKIP][114] ([i915#15865]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-tglu: NOTRUN -> [SKIP][115] ([i915#13049]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-rkl: NOTRUN -> [SKIP][116] ([i915#3555]) +3 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-random-128x42:
- shard-rkl: [PASS][117] -> [FAIL][118] ([i915#13566]) +4 other tests fail
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_cursor_crc@cursor-random-128x42.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_cursor_crc@cursor-random-128x42.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-mtlp: NOTRUN -> [SKIP][119] ([i915#13049])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-tglu: NOTRUN -> [SKIP][120] ([i915#3555])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-sliding-256x85@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][121] ([i915#13566])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-256x85@pipe-a-hdmi-a-1.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-tglu-1: NOTRUN -> [SKIP][122] ([i915#13049]) +2 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-rkl: NOTRUN -> [SKIP][123] +82 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_display_modes@extended-mode-basic:
- shard-rkl: NOTRUN -> [SKIP][124] ([i915#13691])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][125] ([i915#14544] / [i915#3804])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-tglu: NOTRUN -> [SKIP][126] ([i915#13749])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-mtlp: NOTRUN -> [SKIP][127] ([i915#16867])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-tglu-1: NOTRUN -> [SKIP][128] ([i915#13707])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_draw_crc@draw-method-blt:
- shard-glk: [PASS][129] -> [DMESG-WARN][130] ([i915#16477]) +1 other test dmesg-warn
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk8/igt@kms_draw_crc@draw-method-blt.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk4/igt@kms_draw_crc@draw-method-blt.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-dg1: NOTRUN -> [SKIP][131] ([i915#16361]) +1 other test skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-fractional-bpp-bigjoiner:
- shard-mtlp: NOTRUN -> [SKIP][132] ([i915#16361])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_dsc@dsc-fractional-bpp-bigjoiner.html
* igt@kms_dsc@dsc-with-bpc-bigjoiner:
- shard-tglu: NOTRUN -> [SKIP][133] ([i915#16361])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_dsc@dsc-with-bpc-bigjoiner.html
* igt@kms_dsc@dsc-with-formats-ultrajoiner:
- shard-rkl: NOTRUN -> [SKIP][134] ([i915#16361]) +1 other test skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_dsc@dsc-with-formats-ultrajoiner.html
* igt@kms_dsc@dsc-with-output-formats-bigjoiner:
- shard-tglu-1: NOTRUN -> [SKIP][135] ([i915#16361]) +1 other test skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_dsc@dsc-with-output-formats-bigjoiner.html
* igt@kms_feature_discovery@display-3x:
- shard-tglu: NOTRUN -> [SKIP][136] ([i915#16081]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@hdr:
- shard-mtlp: NOTRUN -> [SKIP][137] ([i915#16600])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_feature_discovery@hdr.html
* igt@kms_feature_discovery@psr1:
- shard-rkl: NOTRUN -> [SKIP][138] ([i915#658])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_feature_discovery@psr1.html
* igt@kms_feature_discovery@vrr:
- shard-dg1: NOTRUN -> [SKIP][139] ([i915#16600])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_feature_discovery@vrr.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-mtlp: NOTRUN -> [SKIP][140] ([i915#3637] / [i915#9934]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@2x-flip-vs-panning-vs-hang:
- shard-rkl: NOTRUN -> [SKIP][141] ([i915#9934]) +6 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-glk10: NOTRUN -> [INCOMPLETE][142] ([i915#12745] / [i915#4839])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk10: NOTRUN -> [INCOMPLETE][143] ([i915#12745])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-plain-flip:
- shard-tglu: NOTRUN -> [SKIP][144] ([i915#3637] / [i915#9934]) +1 other test skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-dg1: NOTRUN -> [SKIP][145] ([i915#9934]) +1 other test skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-tglu-1: NOTRUN -> [SKIP][146] ([i915#3637] / [i915#9934]) +3 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@blocking-wf_vblank:
- shard-dg1: [PASS][147] -> [FAIL][148] ([i915#14600])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-17/igt@kms_flip@blocking-wf_vblank.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-12/igt@kms_flip@blocking-wf_vblank.html
* igt@kms_flip@blocking-wf_vblank@c-hdmi-a3:
- shard-dg1: NOTRUN -> [FAIL][149] ([i915#14600])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-12/igt@kms_flip@blocking-wf_vblank@c-hdmi-a3.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2:
- shard-glk: [PASS][150] -> [FAIL][151] ([i915#13027]) +1 other test fail
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend:
- shard-rkl: [PASS][152] -> [INCOMPLETE][153] ([i915#16276] / [i915#6113]) +1 other test incomplete
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-4/igt@kms_flip@flip-vs-suspend.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][154] ([i915#15643]) +1 other test skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][155] ([i915#3555] / [i915#8810] / [i915#8813]) +1 other test skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][156] ([i915#15643])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
- shard-rkl: NOTRUN -> [SKIP][157] ([i915#15643]) +3 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-dg1: NOTRUN -> [SKIP][158] ([i915#15643]) +1 other test skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][159] ([i915#15104] / [i915#15990])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][160] ([i915#15990] / [i915#8708]) +3 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render:
- shard-tglu: NOTRUN -> [SKIP][161] +51 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-glk11: NOTRUN -> [INCOMPLETE][162] ([i915#10056] / [i915#16593])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk11/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-tglu-1: NOTRUN -> [SKIP][163] ([i915#5439])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-tglu: NOTRUN -> [SKIP][164] ([i915#15989]) +9 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][165] ([i915#15990]) +6 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-plflip-blt:
- shard-rkl: [PASS][166] -> [SKIP][167] ([i915#15989]) +11 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-plflip-blt.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-indfb-draw-pwrite:
- shard-dg1: NOTRUN -> [SKIP][168] +15 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#15991] / [i915#5354])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][170] ([i915#15990] / [i915#8708])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- shard-tglu: NOTRUN -> [SKIP][171] ([i915#15102]) +19 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-rkl: NOTRUN -> [SKIP][172] ([i915#15102]) +43 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-cur-indfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][173] ([i915#15991]) +1 other test skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-indfb-plflip-blt:
- shard-mtlp: NOTRUN -> [SKIP][174] ([i915#15991]) +6 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][175] ([i915#15990]) +2 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-rkl: NOTRUN -> [SKIP][176] ([i915#15989]) +14 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][177] ([i915#15989]) +5 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-fullscreen:
- shard-glk: [PASS][178] -> [SKIP][179] +21 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk8/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-fullscreen.html
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk4/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-glk: NOTRUN -> [SKIP][180] +138 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk9/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@hdr-modesetfrombusy:
- shard-tglu-1: NOTRUN -> [SKIP][181] ([i915#15989]) +12 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_frontbuffer_tracking@hdr-modesetfrombusy.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-tglu-1: NOTRUN -> [SKIP][182] ([i915#15102]) +17 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt:
- shard-mtlp: [PASS][183] -> [SKIP][184] ([i915#17031]) +70 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt.html
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][185] ([i915#1825]) +6 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
- shard-mtlp: NOTRUN -> [SKIP][186] ([i915#15991] / [i915#1825]) +3 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][187] ([i915#15990] / [i915#8708]) +1 other test skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-indfb-draw-render:
- shard-dg1: NOTRUN -> [SKIP][188] ([i915#15102]) +6 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-pgflip-blt:
- shard-mtlp: NOTRUN -> [SKIP][189] ([i915#15989]) +6 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-suspend:
- shard-dg2: NOTRUN -> [SKIP][190] ([i915#15102]) +2 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-8/igt@kms_frontbuffer_tracking@psrhdr-suspend.html
* igt@kms_hdr@bpc-switch:
- shard-tglu-1: NOTRUN -> [SKIP][191] ([i915#3555] / [i915#8228])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg1: NOTRUN -> [SKIP][192] ([i915#3555] / [i915#8228])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@brightness-with-hdr:
- shard-tglu-1: NOTRUN -> [SKIP][193] ([i915#12713])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-rkl: NOTRUN -> [SKIP][194] ([i915#16644] / [i915#3555] / [i915#8228]) +1 other test skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_hdr@static-toggle:
- shard-rkl: [PASS][195] -> [SKIP][196] ([i915#16644] / [i915#3555] / [i915#8228])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_hdr@static-toggle.html
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_hdr@static-toggle.html
- shard-tglu: NOTRUN -> [SKIP][197] ([i915#3555] / [i915#8228])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@basic-big-joiner:
- shard-rkl: NOTRUN -> [SKIP][198] ([i915#15460]) +1 other test skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-tglu: NOTRUN -> [SKIP][199] ([i915#15459])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-mtlp: NOTRUN -> [SKIP][200] ([i915#13688])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][201] ([i915#15458])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-mtlp: NOTRUN -> [SKIP][202] ([i915#15458])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-tglu: NOTRUN -> [SKIP][203] ([i915#16451])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-mtlp: NOTRUN -> [SKIP][204] ([i915#15815])
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
- shard-dg1: NOTRUN -> [SKIP][205] ([i915#15709])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
- shard-tglu-1: NOTRUN -> [SKIP][206] ([i915#15709]) +2 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
- shard-tglu: NOTRUN -> [SKIP][207] ([i915#15709]) +1 other test skip
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier:
- shard-mtlp: NOTRUN -> [SKIP][208] ([i915#15709]) +1 other test skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
- shard-rkl: NOTRUN -> [SKIP][209] ([i915#15709]) +1 other test skip
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html
* igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y:
- shard-mtlp: NOTRUN -> [SKIP][210] ([i915#16112])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y.html
* igt@kms_plane_alpha_blend@alpha-basic:
- shard-glk: NOTRUN -> [FAIL][211] ([i915#12178])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk9/igt@kms_plane_alpha_blend@alpha-basic.html
* igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][212] ([i915#7862]) +1 other test fail
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk9/igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1.html
* igt@kms_plane_alpha_blend@constant-alpha-max:
- shard-glk10: NOTRUN -> [FAIL][213] ([i915#10647] / [i915#12169])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_plane_alpha_blend@constant-alpha-max.html
* igt@kms_plane_alpha_blend@constant-alpha-max@pipe-a-hdmi-a-1:
- shard-glk10: NOTRUN -> [FAIL][214] ([i915#10647]) +1 other test fail
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_plane_alpha_blend@constant-alpha-max@pipe-a-hdmi-a-1.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-rkl: NOTRUN -> [SKIP][215] ([i915#13958])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-mtlp: NOTRUN -> [SKIP][216] ([i915#13958])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_plane_multiple@tiling-yf:
- shard-rkl: NOTRUN -> [SKIP][217] ([i915#14259])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a:
- shard-tglu: NOTRUN -> [SKIP][218] ([i915#15329]) +4 other tests skip
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html
* igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b:
- shard-tglu-1: NOTRUN -> [SKIP][219] ([i915#15329]) +4 other tests skip
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
- shard-mtlp: NOTRUN -> [SKIP][220] ([i915#15329]) +3 other tests skip
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_backlight@basic-brightness:
- shard-tglu: NOTRUN -> [SKIP][221] ([i915#12343] / [i915#9812])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-7/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@fade:
- shard-dg1: NOTRUN -> [SKIP][222] ([i915#12343] / [i915#5354])
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_pm_backlight@fade.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-rkl: NOTRUN -> [SKIP][223] ([i915#12343] / [i915#5354])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-mtlp: [PASS][224] -> [INCOMPLETE][225] ([i915#17032])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_pm_backlight@fade-with-suspend.html
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc5-dpms-suspend-resume:
- shard-rkl: [PASS][226] -> [INCOMPLETE][227] ([i915#16943])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_pm_dc@dc5-dpms-suspend-resume.html
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_pm_dc@dc5-dpms-suspend-resume.html
* igt@kms_pm_dc@dc9-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][228] ([i915#15739])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-rkl: NOTRUN -> [SKIP][229] ([i915#8430])
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@cursor-dpms:
- shard-mtlp: NOTRUN -> [SKIP][230] ([i915#4077]) +2 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_pm_rpm@cursor-dpms.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-rkl: [PASS][231] -> [SKIP][232] ([i915#15073])
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-5/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-dg1: [PASS][233] -> [SKIP][234] ([i915#15073])
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-19/igt@kms_pm_rpm@dpms-non-lpsp.html
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-14/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-rkl: [PASS][235] -> [SKIP][236] ([i915#14544] / [i915#15073])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_pm_rpm@modeset-lpsp.html
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-dg2: [PASS][237] -> [SKIP][238] ([i915#15073]) +2 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-6/igt@kms_pm_rpm@modeset-lpsp-stress.html
- shard-dg1: NOTRUN -> [SKIP][239] ([i915#15073])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@package-g7:
- shard-tglu-1: NOTRUN -> [SKIP][240] ([i915#15403])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_pm_rpm@package-g7.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-tglu: NOTRUN -> [SKIP][241] ([i915#11520]) +3 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-dg1: NOTRUN -> [SKIP][242] ([i915#11520])
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][243] ([i915#9808]) +1 other test skip
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][244] ([i915#12316]) +2 other tests skip
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@pr-cursor-plane-update-sf:
- shard-glk: NOTRUN -> [SKIP][245] ([i915#11520])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk9/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-glk10: NOTRUN -> [SKIP][246] ([i915#11520]) +2 other tests skip
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-tglu-1: NOTRUN -> [SKIP][247] ([i915#11520]) +3 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
- shard-rkl: NOTRUN -> [SKIP][248] ([i915#11520]) +6 other tests skip
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
- shard-snb: NOTRUN -> [SKIP][249] ([i915#11520]) +6 other tests skip
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-snb7/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-p010:
- shard-dg1: NOTRUN -> [SKIP][250] ([i915#9683])
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-psr-primary-page-flip:
- shard-tglu: NOTRUN -> [SKIP][251] ([i915#9732]) +7 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_psr@fbc-psr-primary-page-flip.html
* igt@kms_psr@fbc-psr2-dpms:
- shard-mtlp: NOTRUN -> [SKIP][252] ([i915#9688]) +8 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_psr@fbc-psr2-dpms.html
* igt@kms_psr@pr-cursor-plane-onoff:
- shard-glk11: NOTRUN -> [SKIP][253] +1 other test skip
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk11/igt@kms_psr@pr-cursor-plane-onoff.html
* igt@kms_psr@pr-no-drrs:
- shard-tglu-1: NOTRUN -> [SKIP][254] ([i915#9732]) +8 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_psr@pr-no-drrs.html
* igt@kms_psr@psr-sprite-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][255] ([i915#1072] / [i915#9732]) +4 other tests skip
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_psr@psr-sprite-mmap-cpu.html
* igt@kms_psr@psr-sprite-plane-move:
- shard-rkl: NOTRUN -> [SKIP][256] ([i915#1072] / [i915#9732]) +16 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_psr@psr-sprite-plane-move.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-rkl: NOTRUN -> [SKIP][257] ([i915#15949])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-tglu: NOTRUN -> [SKIP][258] ([i915#15949])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-dg1: NOTRUN -> [SKIP][259] ([i915#5289])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-mtlp: NOTRUN -> [SKIP][260] ([i915#12755] / [i915#15867])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-dg2: NOTRUN -> [SKIP][261] ([i915#3555])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-6/igt@kms_scaling_modes@scaling-mode-none.html
- shard-dg1: NOTRUN -> [SKIP][262] ([i915#3555]) +1 other test skip
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-mtlp: NOTRUN -> [SKIP][263] ([i915#3555] / [i915#8809])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_setmode@clone-exclusive-crtc.html
* igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-2:
- shard-glk: NOTRUN -> [INCOMPLETE][264] ([i915#12276]) +1 other test incomplete
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk4/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-2.html
* igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [INCOMPLETE][265] ([i915#12276]) +1 other test incomplete
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html
* igt@kms_vrr@flip-suspend:
- shard-rkl: NOTRUN -> [SKIP][266] ([i915#15243] / [i915#3555])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_vrr@flip-suspend.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-rkl: NOTRUN -> [SKIP][267] ([i915#9906])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-tglu-1: NOTRUN -> [SKIP][268] ([i915#9906]) +1 other test skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-rkl: NOTRUN -> [SKIP][269] ([i915#2433])
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@module-unload:
- shard-dg2: NOTRUN -> [ABORT][270] ([i915#13029] / [i915#15778])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-8/igt@perf_pmu@module-unload.html
- shard-tglu: NOTRUN -> [ABORT][271] ([i915#15778])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-2/igt@perf_pmu@module-unload.html
* igt@prime_udl@share-import-addfb:
- shard-tglu-1: NOTRUN -> [SKIP][272] ([i915#16420])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-tglu-1/igt@prime_udl@share-import-addfb.html
* igt@prime_vgem@basic-read:
- shard-rkl: NOTRUN -> [SKIP][273] ([i915#3291] / [i915#3708])
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@prime_vgem@basic-read.html
#### Possible fixes ####
* igt@core_setmaster@master-drop-set-root:
- shard-mtlp: [FAIL][274] ([i915#17048]) -> [PASS][275]
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@core_setmaster@master-drop-set-root.html
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@core_setmaster@master-drop-set-root.html
* igt@core_setmaster@master-drop-set-shared-fd:
- shard-glk10: [DMESG-WARN][276] ([i915#16685]) -> [PASS][277] +1 other test pass
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk10/igt@core_setmaster@master-drop-set-shared-fd.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@core_setmaster@master-drop-set-shared-fd.html
* igt@core_setmaster_vs_auth:
- shard-mtlp: [FAIL][278] -> [PASS][279]
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@core_setmaster_vs_auth.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@core_setmaster_vs_auth.html
* igt@gem_ccs@suspend-resume:
- shard-dg2: [INCOMPLETE][280] ([i915#13356] / [i915#16348]) -> [PASS][281] +1 other test pass
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg2-3/igt@gem_ccs@suspend-resume.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-8/igt@gem_ccs@suspend-resume.html
* igt@gem_ctx_isolation@preservation-s3:
- shard-rkl: [INCOMPLETE][282] ([i915#13356]) -> [PASS][283] +3 other tests pass
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-4/igt@gem_ctx_isolation@preservation-s3.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-8/igt@gem_ctx_isolation@preservation-s3.html
* igt@gem_exec_suspend@basic-s3:
- shard-glk: [INCOMPLETE][284] ([i915#13196] / [i915#13356]) -> [PASS][285] +1 other test pass
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk8/igt@gem_exec_suspend@basic-s3.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_mmap_gtt@cpuset-basic-small-copy:
- shard-glk10: [TIMEOUT][286] -> [PASS][287]
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk10/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
* igt@gem_mmap_offset@clear-via-pagefault:
- shard-mtlp: [INCOMPLETE][288] ([i915#16021] / [i915#16108] / [i915#16202]) -> [PASS][289] +1 other test pass
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@gem_mmap_offset@clear-via-pagefault.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@gem_mmap_offset@clear-via-pagefault.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [ABORT][290] ([i915#5566]) -> [PASS][291]
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk5/igt@gen9_exec_parse@allowed-single.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk9/igt@gen9_exec_parse@allowed-single.html
* igt@i915_drm_fdinfo@all-busy-idle-check-all:
- shard-glk10: [DMESG-FAIL][292] -> [PASS][293]
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk10/igt@i915_drm_fdinfo@all-busy-idle-check-all.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@i915_drm_fdinfo@all-busy-idle-check-all.html
* igt@i915_pm_rps@engine-order:
- shard-glk: [FAIL][294] ([i915#14896]) -> [PASS][295]
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk5/igt@i915_pm_rps@engine-order.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk3/igt@i915_pm_rps@engine-order.html
* igt@i915_suspend@sysfs-reader:
- shard-rkl: [INCOMPLETE][296] ([i915#4817]) -> [PASS][297]
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@i915_suspend@sysfs-reader.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@i915_suspend@sysfs-reader.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-1:
- shard-glk: [FAIL][298] ([i915#14888]) -> [PASS][299]
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk6/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-1.html
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk2/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-1.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [FAIL][300] ([i915#15733] / [i915#5138]) -> [PASS][301]
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-2:
- shard-rkl: [INCOMPLETE][302] ([i915#12358] / [i915#14152]) -> [PASS][303] +1 other test pass
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-3/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-2.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-4/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-2.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- shard-glk10: [DMESG-FAIL][304] ([i915#118]) -> [PASS][305]
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk10/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [FAIL][306] ([i915#13027]) -> [PASS][307] +1 other test pass
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
- shard-mtlp: [SKIP][308] ([i915#17031]) -> [PASS][309] +118 other tests pass
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite:
- shard-dg1: [DMESG-WARN][310] ([i915#4423]) -> [PASS][311] +2 other tests pass
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@hdr-farfromfence-mmap-gtt:
- shard-rkl: [SKIP][312] ([i915#15989]) -> [PASS][313] +7 other tests pass
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-7/igt@kms_frontbuffer_tracking@hdr-farfromfence-mmap-gtt.html
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-1/igt@kms_frontbuffer_tracking@hdr-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-render:
- shard-glk: [SKIP][314] -> [PASS][315] +11 other tests pass
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk5/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-render.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk8/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-render.html
* igt@kms_hdr@static-toggle-dpms:
- shard-rkl: [SKIP][316] ([i915#16644] / [i915#3555] / [i915#8228]) -> [PASS][317]
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-7/igt@kms_hdr@static-toggle-dpms.html
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-1/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-glk10: [INCOMPLETE][318] ([i915#13026]) -> [PASS][319]
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk10/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk10/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-rkl: [SKIP][320] ([i915#15073]) -> [PASS][321]
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-1/igt@kms_pm_rpm@dpms-lpsp.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-dg1: [SKIP][322] ([i915#15073]) -> [PASS][323]
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-19/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-14/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-dg2: [SKIP][324] ([i915#15073]) -> [PASS][325]
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg2-1/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
#### Warnings ####
* igt@gem_ccs@suspend-resume:
- shard-rkl: [SKIP][326] ([i915#14544] / [i915#9323]) -> [SKIP][327] ([i915#9323])
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gem_ccs@suspend-resume.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@gem_ccs@suspend-resume.html
* igt@gem_create@create-ext-set-pat:
- shard-rkl: [SKIP][328] ([i915#14544] / [i915#8562]) -> [SKIP][329] ([i915#8562])
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gem_create@create-ext-set-pat.html
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@gem_create@create-ext-set-pat.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-rkl: [SKIP][330] ([i915#14544] / [i915#4525]) -> [SKIP][331] ([i915#4525])
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gem_exec_balancer@parallel-bb-first.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_reloc@basic-cpu-wc-active:
- shard-mtlp: [SKIP][332] ([i915#17031]) -> [SKIP][333] ([i915#3281]) +8 other tests skip
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@gem_exec_reloc@basic-cpu-wc-active.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@gem_exec_reloc@basic-cpu-wc-active.html
* igt@gem_exec_reloc@basic-gtt-cpu-active:
- shard-rkl: [SKIP][334] ([i915#3281]) -> [SKIP][335] ([i915#14544] / [i915#3281]) +2 other tests skip
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@gem_exec_reloc@basic-gtt-cpu-active.html
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-cpu-active.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- shard-mtlp: [SKIP][336] ([i915#3281]) -> [SKIP][337] ([i915#17031]) +5 other tests skip
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_exec_reloc@basic-wc-read:
- shard-rkl: [SKIP][338] ([i915#14544] / [i915#3281]) -> [SKIP][339] ([i915#3281])
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gem_exec_reloc@basic-wc-read.html
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@gem_exec_reloc@basic-wc-read.html
* igt@gem_exec_schedule@semaphore-power:
- shard-rkl: [SKIP][340] ([i915#14544] / [i915#7276]) -> [SKIP][341] ([i915#7276])
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gem_exec_schedule@semaphore-power.html
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@gem_exec_schedule@semaphore-power.html
- shard-mtlp: [SKIP][342] ([i915#4537] / [i915#4812]) -> [SKIP][343] ([i915#17031])
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@gem_exec_schedule@semaphore-power.html
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@gem_exec_schedule@semaphore-power.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-rkl: [SKIP][344] ([i915#4613]) -> [SKIP][345] ([i915#14544] / [i915#4613])
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@gem_lmem_swapping@heavy-verify-random.html
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@verify-random:
- shard-rkl: [SKIP][346] ([i915#14544] / [i915#4613]) -> [SKIP][347] ([i915#4613]) +1 other test skip
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gem_lmem_swapping@verify-random.html
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@gem_lmem_swapping@verify-random.html
* igt@gem_readwrite@read-write:
- shard-rkl: [SKIP][348] ([i915#14544] / [i915#3282]) -> [SKIP][349] ([i915#3282]) +1 other test skip
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gem_readwrite@read-write.html
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@gem_readwrite@read-write.html
* igt@gem_tiled_partial_pwrite_pread@reads:
- shard-rkl: [SKIP][350] ([i915#3282]) -> [SKIP][351] ([i915#14544] / [i915#3282]) +1 other test skip
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@gem_tiled_partial_pwrite_pread@reads.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@gem_tiled_partial_pwrite_pread@reads.html
* igt@gen9_exec_parse@allowed-single:
- shard-rkl: [SKIP][352] ([i915#2527]) -> [SKIP][353] ([i915#14544] / [i915#2527])
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@gen9_exec_parse@allowed-single.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@unaligned-access:
- shard-rkl: [SKIP][354] ([i915#14544] / [i915#2527]) -> [SKIP][355] ([i915#2527])
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@gen9_exec_parse@unaligned-access.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_pm_freq_api@freq-suspend:
- shard-rkl: [SKIP][356] ([i915#8399]) -> [SKIP][357] ([i915#14544] / [i915#8399])
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@i915_pm_freq_api@freq-suspend.html
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@i915_pm_freq_api@freq-suspend.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-rkl: [SKIP][358] ([i915#14544] / [i915#16109]) -> [SKIP][359] ([i915#16109])
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@i915_query@query-topology-known-pci-ids.html
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@i915_query@query-topology-known-pci-ids.html
* igt@kms_3d@basic:
- shard-mtlp: [SKIP][360] ([i915#17031]) -> [SKIP][361] ([i915#15726])
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_3d@basic.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_3d@basic.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-mtlp: [SKIP][362] ([i915#17031]) -> [SKIP][363] ([i915#5190])
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@clobberred-modifier:
- shard-mtlp: [SKIP][364] ([i915#4212]) -> [SKIP][365] ([i915#17031])
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-4/igt@kms_addfb_basic@clobberred-modifier.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_addfb_basic@clobberred-modifier.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-rkl: [SKIP][366] ([i915#12454] / [i915#12712] / [i915#14544]) -> [SKIP][367] ([i915#12454] / [i915#12712])
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
- shard-mtlp: [SKIP][368] ([i915#12454] / [i915#12712]) -> [SKIP][369] ([i915#17031])
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-mtlp: [SKIP][370] ([i915#17031]) -> [SKIP][371] +14 other tests skip
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-rkl: [SKIP][372] ([i915#5286]) -> [SKIP][373] ([i915#14544] / [i915#5286])
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-rkl: [SKIP][374] ([i915#14544] / [i915#5286]) -> [SKIP][375] ([i915#5286])
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-rkl: [SKIP][376] ([i915#3638]) -> [SKIP][377] ([i915#14544] / [i915#3638]) +2 other tests skip
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_big_fb@linear-8bpp-rotate-270.html
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
- shard-mtlp: [SKIP][378] ([i915#17031]) -> [SKIP][379] ([i915#3828])
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- shard-dg1: [SKIP][380] ([i915#3638]) -> [SKIP][381] ([i915#3638] / [i915#4423])
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-12/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-mtlp: [SKIP][382] ([i915#17031]) -> [SKIP][383] ([i915#6187]) +1 other test skip
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-rkl: [SKIP][384] ([i915#14544]) -> [SKIP][385] +33 other tests skip
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
- shard-mtlp: [SKIP][386] -> [SKIP][387] ([i915#17031]) +11 other tests skip
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
- shard-rkl: [SKIP][388] ([i915#14098] / [i915#6095]) -> [SKIP][389] ([i915#14098] / [i915#14544] / [i915#6095]) +1 other test skip
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-rkl: [SKIP][390] ([i915#12313] / [i915#14544]) -> [SKIP][391] ([i915#12313])
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][392] ([i915#14544] / [i915#6095]) -> [SKIP][393] ([i915#6095]) +6 other tests skip
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs:
- shard-mtlp: [SKIP][394] ([i915#6095]) -> [SKIP][395] ([i915#17031]) +2 other tests skip
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
- shard-rkl: [SKIP][396] ([i915#12313]) -> [SKIP][397] ([i915#12313] / [i915#14544])
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-mtlp: [SKIP][398] ([i915#12313]) -> [SKIP][399] ([i915#17031])
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-mtlp: [SKIP][400] ([i915#17031]) -> [SKIP][401] ([i915#12805])
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-mtlp: [SKIP][402] ([i915#12805]) -> [SKIP][403] ([i915#17031])
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
- shard-glk: [INCOMPLETE][404] ([i915#15582]) -> [INCOMPLETE][405] ([i915#14694] / [i915#15582]) +1 other test incomplete
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk2/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk1/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
- shard-glk: [INCOMPLETE][406] ([i915#14694] / [i915#15582]) -> [INCOMPLETE][407] ([i915#15582]) +1 other test incomplete
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk3/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk2/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
- shard-rkl: [SKIP][408] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][409] ([i915#14098] / [i915#6095]) +7 other tests skip
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc:
- shard-mtlp: [SKIP][410] ([i915#17031]) -> [SKIP][411] ([i915#6095]) +8 other tests skip
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-mtlp: [SKIP][412] ([i915#17031]) -> [SKIP][413] ([i915#12313]) +3 other tests skip
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_cdclk@mode-transition:
- shard-rkl: [SKIP][414] ([i915#14544] / [i915#3742]) -> [SKIP][415] ([i915#3742])
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_cdclk@mode-transition.html
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_cdclk@mode-transition.html
- shard-mtlp: [SKIP][416] ([i915#17016]) -> [SKIP][417] ([i915#17031])
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_cdclk@mode-transition.html
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_cdclk@mode-transition.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4:
- shard-mtlp: [SKIP][418] ([i915#17031]) -> [SKIP][419] ([i915#16464] / [i915#16471])
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4.html
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-rkl: [SKIP][420] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][421] ([i915#11151] / [i915#7828])
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_chamelium_edid@dp-edid-resolution-list.html
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_edid@vga-edid-read:
- shard-rkl: [SKIP][422] ([i915#11151] / [i915#7828]) -> [SKIP][423] ([i915#11151] / [i915#14544] / [i915#7828])
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_chamelium_edid@vga-edid-read.html
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_chamelium_edid@vga-edid-read.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-mtlp: [SKIP][424] ([i915#11151] / [i915#7828]) -> [SKIP][425] ([i915#17031]) +1 other test skip
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-4/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
- shard-mtlp: [SKIP][426] ([i915#17031]) -> [SKIP][427] ([i915#11151] / [i915#7828]) +3 other tests skip
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-mtlp: [SKIP][428] ([i915#17031]) -> [SKIP][429] ([i915#15330] / [i915#3299])
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_content_protection@dp-mst-lic-type-1.html
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-type-0-suspend-resume:
- shard-mtlp: [SKIP][430] ([i915#17031]) -> [SKIP][431] ([i915#15330])
[430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
[431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
* igt@kms_content_protection@dp-mst-type-1-suspend-resume:
- shard-mtlp: [SKIP][432] ([i915#15330]) -> [SKIP][433] ([i915#17031]) +1 other test skip
[432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
[433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
* igt@kms_content_protection@srm:
- shard-rkl: [SKIP][434] ([i915#14544] / [i915#15865]) -> [SKIP][435] ([i915#15865]) +2 other tests skip
[434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_content_protection@srm.html
[435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_content_protection@srm.html
- shard-mtlp: [SKIP][436] ([i915#15865]) -> [SKIP][437] ([i915#17031]) +1 other test skip
[436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_content_protection@srm.html
[437]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-mtlp: [SKIP][438] ([i915#17031]) -> [SKIP][439] ([i915#15865]) +1 other test skip
[438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_content_protection@uevent.html
[439]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- shard-rkl: [SKIP][440] ([i915#3555]) -> [SKIP][441] ([i915#14544] / [i915#3555])
[440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-3/igt@kms_cursor_crc@cursor-offscreen-max-size.html
[441]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_cursor_crc@cursor-offscreen-max-size.html
* igt@kms_cursor_crc@cursor-onscreen-32x10:
- shard-dg1: [SKIP][442] ([i915#3555]) -> [SKIP][443] ([i915#3555] / [i915#4423])
[442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-12/igt@kms_cursor_crc@cursor-onscreen-32x10.html
[443]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_cursor_crc@cursor-onscreen-32x10.html
* igt@kms_cursor_crc@cursor-random-128x42:
- shard-mtlp: [SKIP][444] ([i915#8814]) -> [SKIP][445] ([i915#17031])
[444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_cursor_crc@cursor-random-128x42.html
[445]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_cursor_crc@cursor-random-128x42.html
* igt@kms_cursor_crc@cursor-random-64x21:
- shard-mtlp: [SKIP][446] ([i915#17031]) -> [SKIP][447] ([i915#8814])
[446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_cursor_crc@cursor-random-64x21.html
[447]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_cursor_crc@cursor-random-64x21.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-rkl: [SKIP][448] ([i915#14544] / [i915#3555]) -> [SKIP][449] ([i915#3555]) +1 other test skip
[448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
[449]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-mtlp: [SKIP][450] ([i915#13049]) -> [SKIP][451] ([i915#17031]) +1 other test skip
[450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_cursor_crc@cursor-sliding-512x170.html
[451]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_cursor_crc@cursor-sliding-512x170.html
- shard-rkl: [SKIP][452] ([i915#13049] / [i915#14544]) -> [SKIP][453] ([i915#13049])
[452]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-512x170.html
[453]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-mtlp: [SKIP][454] ([i915#17031]) -> [SKIP][455] ([i915#3555] / [i915#8814])
[454]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_cursor_crc@cursor-sliding-max-size.html
[455]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-mtlp: [SKIP][456] ([i915#17031]) -> [SKIP][457] ([i915#9809])
[456]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
[457]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-rkl: [SKIP][458] ([i915#4103]) -> [SKIP][459] ([i915#14544] / [i915#4103])
[458]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[459]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-mtlp: [SKIP][460] ([i915#9809]) -> [SKIP][461] ([i915#17031]) +2 other tests skip
[460]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[461]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-rkl: [SKIP][462] ([i915#14544] / [i915#4103]) -> [SKIP][463] ([i915#4103])
[462]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
[463]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-rkl: [SKIP][464] ([i915#3555] / [i915#3804]) -> [SKIP][465] ([i915#14544] / [i915#3555] / [i915#3804])
[464]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[465]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-mtlp: [SKIP][466] ([i915#17031]) -> [SKIP][467] ([i915#13749])
[466]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_dp_link_training@uhbr-sst.html
[467]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-mtlp: [SKIP][468] ([i915#17031]) -> [SKIP][469] ([i915#3555] / [i915#8812])
[468]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_draw_crc@draw-method-mmap-gtt.html
[469]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-rkl: [SKIP][470] ([i915#16361]) -> [SKIP][471] ([i915#14544] / [i915#16361])
[470]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_dsc@dsc-with-bpc-formats.html
[471]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_dsc@dsc-with-bpc-formats.html
- shard-mtlp: [SKIP][472] ([i915#17031]) -> [SKIP][473] ([i915#16361]) +1 other test skip
[472]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_dsc@dsc-with-bpc-formats.html
[473]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner:
- shard-rkl: [SKIP][474] ([i915#14544] / [i915#16361]) -> [SKIP][475] ([i915#16361])
[474]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
[475]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
* igt@kms_feature_discovery@display-3x:
- shard-rkl: [SKIP][476] ([i915#14544] / [i915#16081]) -> [SKIP][477] ([i915#16081])
[476]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_feature_discovery@display-3x.html
[477]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_feature_discovery@display-3x.html
- shard-mtlp: [SKIP][478] ([i915#16081]) -> [SKIP][479] ([i915#17031])
[478]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_feature_discovery@display-3x.html
[479]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@psr2:
- shard-rkl: [SKIP][480] ([i915#658]) -> [SKIP][481] ([i915#14544] / [i915#658])
[480]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_feature_discovery@psr2.html
[481]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
- shard-mtlp: [SKIP][482] ([i915#3637] / [i915#9934]) -> [SKIP][483] ([i915#17031]) +1 other test skip
[482]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html
[483]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html
* igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-mtlp: [SKIP][484] ([i915#17031]) -> [SKIP][485] ([i915#8381])
[484]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_flip@2x-flip-vs-fences-interruptible.html
[485]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_flip@2x-flip-vs-fences-interruptible.html
* igt@kms_flip@2x-nonexisting-fb-interruptible:
- shard-dg1: [SKIP][486] ([i915#9934]) -> [SKIP][487] ([i915#4423] / [i915#9934])
[486]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-17/igt@kms_flip@2x-nonexisting-fb-interruptible.html
[487]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-12/igt@kms_flip@2x-nonexisting-fb-interruptible.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-mtlp: [SKIP][488] ([i915#17031]) -> [SKIP][489] ([i915#3637] / [i915#9934]) +1 other test skip
[488]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_flip@2x-plain-flip-interruptible.html
[489]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
- shard-rkl: [SKIP][490] ([i915#9934]) -> [SKIP][491] ([i915#14544] / [i915#9934]) +1 other test skip
[490]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
[491]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-glk: [INCOMPLETE][492] ([i915#12745] / [i915#4839]) -> [INCOMPLETE][493] ([i915#12314] / [i915#12745] / [i915#4839])
[492]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk4/igt@kms_flip@flip-vs-suspend.html
[493]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk8/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-glk: [INCOMPLETE][494] ([i915#12745] / [i915#4839]) -> [INCOMPLETE][495] ([i915#12314] / [i915#12745] / [i915#4839] / [i915#6113])
[494]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible.html
[495]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk5/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
- shard-glk: [INCOMPLETE][496] ([i915#12745]) -> [INCOMPLETE][497] ([i915#12314] / [i915#12745]) +1 other test incomplete
[496]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk4/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
[497]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk8/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling:
- shard-mtlp: [SKIP][498] ([i915#17031]) -> [SKIP][499] ([i915#3555] / [i915#8810] / [i915#8813]) +1 other test skip
[498]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling.html
[499]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-rkl: [SKIP][500] ([i915#15643]) -> [SKIP][501] ([i915#14544] / [i915#15643])
[500]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
[501]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-rkl: [SKIP][502] ([i915#14544] / [i915#15643]) -> [SKIP][503] ([i915#15643]) +1 other test skip
[502]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
[503]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-mtlp: [SKIP][504] ([i915#17031]) -> [SKIP][505] ([i915#15643]) +2 other tests skip
[504]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
[505]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-mtlp: [SKIP][506] ([i915#15643]) -> [SKIP][507] ([i915#17031]) +2 other tests skip
[506]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
[507]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-mtlp: [SKIP][508] ([i915#17031]) -> [SKIP][509] ([i915#15990] / [i915#8708]) +10 other tests skip
[508]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
[509]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt:
- shard-mtlp: [SKIP][510] ([i915#15990] / [i915#8708]) -> [SKIP][511] ([i915#17031]) +2 other tests skip
[510]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
[511]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-mtlp: [SKIP][512] ([i915#17031]) -> [SKIP][513] ([i915#15989]) +28 other tests skip
[512]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-pwrite.html
[513]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-mtlp: [SKIP][514] ([i915#17031]) -> [SKIP][515] ([i915#15991]) +29 other tests skip
[514]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-indfb-draw-mmap-wc.html
[515]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-spr-indfb-draw-pwrite:
- shard-mtlp: [SKIP][516] ([i915#15991]) -> [SKIP][517] ([i915#17031]) +14 other tests skip
[516]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-spr-indfb-draw-pwrite.html
[517]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-mmap-gtt:
- shard-mtlp: [SKIP][518] ([i915#15990]) -> [SKIP][519] ([i915#17031]) +1 other test skip
[518]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-mmap-gtt.html
[519]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-gtt:
- shard-mtlp: [SKIP][520] ([i915#15104] / [i915#15990]) -> [SKIP][521] ([i915#17031])
[520]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
[521]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff:
- shard-mtlp: [SKIP][522] ([i915#15991] / [i915#1825]) -> [SKIP][523] ([i915#17031]) +12 other tests skip
[522]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html
[523]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt:
- shard-rkl: [SKIP][524] -> [SKIP][525] ([i915#14544]) +17 other tests skip
[524]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html
[525]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
- shard-dg1: [SKIP][526] ([i915#15102]) -> [SKIP][527] ([i915#15102] / [i915#4423])
[526]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html
[527]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-rkl: [SKIP][528] ([i915#15102]) -> [SKIP][529] ([i915#14544] / [i915#15102]) +9 other tests skip
[528]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-indfb-draw-pwrite.html
[529]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-fullscreen:
- shard-mtlp: [SKIP][530] ([i915#15989]) -> [SKIP][531] ([i915#17031]) +23 other tests skip
[530]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-fullscreen.html
[531]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-blt:
- shard-dg1: [SKIP][532] -> [SKIP][533] ([i915#4423])
[532]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-blt.html
[533]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-mtlp: [SKIP][534] ([i915#17031]) -> [SKIP][535] ([i915#15990]) +12 other tests skip
[534]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
[535]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y:
- shard-mtlp: [SKIP][536] ([i915#17031]) -> [SKIP][537] ([i915#10055])
[536]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y.html
[537]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt:
- shard-mtlp: [SKIP][538] ([i915#17031]) -> [SKIP][539] ([i915#15104] / [i915#15990])
[538]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
[539]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-rkl: [SKIP][540] ([i915#14544] / [i915#15102]) -> [SKIP][541] ([i915#15102]) +13 other tests skip
[540]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
[541]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][542] ([i915#1825]) -> [SKIP][543] ([i915#14544] / [i915#1825])
[542]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
[543]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg1: [SKIP][544] ([i915#15990] / [i915#4423] / [i915#8708]) -> [SKIP][545] ([i915#15990] / [i915#8708])
[544]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
[545]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu:
- shard-mtlp: [SKIP][546] ([i915#17031]) -> [SKIP][547] ([i915#15991] / [i915#1825]) +24 other tests skip
[546]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html
[547]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_hdr@static-toggle-dpms:
- shard-mtlp: [SKIP][548] ([i915#12713] / [i915#16490] / [i915#3555] / [i915#8228]) -> [SKIP][549] ([i915#17031]) +1 other test skip
[548]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_hdr@static-toggle-dpms.html
[549]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-mtlp: [SKIP][550] ([i915#15460]) -> [SKIP][551] ([i915#17031])
[550]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-4/igt@kms_joiner@invalid-modeset-big-joiner.html
[551]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-mtlp: [SKIP][552] ([i915#17031]) -> [SKIP][553] ([i915#15459])
[552]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[553]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-mtlp: [SKIP][554] ([i915#14712]) -> [SKIP][555] ([i915#17031])
[554]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
[555]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-glk: [DMESG-FAIL][556] ([i915#118]) -> [DMESG-WARN][557] ([i915#118])
[556]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-glk5/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
[557]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-glk3/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
- shard-dg1: [SKIP][558] ([i915#15709] / [i915#4423]) -> [SKIP][559] ([i915#15709])
[558]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html
[559]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping:
- shard-mtlp: [SKIP][560] ([i915#15709]) -> [SKIP][561] ([i915#17031])
[560]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html
[561]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
- shard-rkl: [SKIP][562] ([i915#14544] / [i915#15709]) -> [SKIP][563] ([i915#15709])
[562]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
[563]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier:
- shard-mtlp: [SKIP][564] ([i915#17031]) -> [SKIP][565] ([i915#15709]) +3 other tests skip
[564]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier.html
[565]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
- shard-rkl: [SKIP][566] ([i915#15709]) -> [SKIP][567] ([i915#14544] / [i915#15709])
[566]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html
[567]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-mtlp: [SKIP][568] ([i915#17031]) -> [SKIP][569] ([i915#13958]) +1 other test skip
[568]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_plane_multiple@2x-tiling-none.html
[569]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_multiple@tiling-y:
- shard-mtlp: [SKIP][570] ([i915#17031]) -> [SKIP][571] ([i915#14259])
[570]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_plane_multiple@tiling-y.html
[571]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers:
- shard-mtlp: [SKIP][572] ([i915#15329]) -> [SKIP][573] ([i915#17031])
[572]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers.html
[573]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a:
- shard-rkl: [SKIP][574] ([i915#14544] / [i915#15329]) -> [SKIP][575] ([i915#15329]) +3 other tests skip
[574]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html
[575]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75:
- shard-mtlp: [SKIP][576] ([i915#17031]) -> [SKIP][577] ([i915#15329] / [i915#3555] / [i915#6953])
[576]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_plane_scaling@planes-downscale-factor-0-75.html
[577]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_plane_scaling@planes-downscale-factor-0-75.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
- shard-mtlp: [SKIP][578] ([i915#15329] / [i915#6953]) -> [SKIP][579] ([i915#17031])
[578]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
[579]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-mtlp: [SKIP][580] ([i915#15073]) -> [SKIP][581] ([i915#17031])
[580]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_pm_rpm@modeset-non-lpsp.html
[581]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-mtlp: [SKIP][582] ([i915#17031]) -> [SKIP][583] ([i915#15073])
[582]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[583]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-mtlp: [SKIP][584] ([i915#17031]) -> [SKIP][585] ([i915#12316]) +6 other tests skip
[584]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
[585]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-mtlp: [SKIP][586] ([i915#12316]) -> [SKIP][587] ([i915#17031])
[586]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
[587]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-rkl: [SKIP][588] ([i915#11520] / [i915#14544]) -> [SKIP][589] ([i915#11520]) +2 other tests skip
[588]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html
[589]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@fbc-psr-primary-blt:
- shard-dg1: [SKIP][590] ([i915#1072] / [i915#9732]) -> [SKIP][591] ([i915#1072] / [i915#4423] / [i915#9732])
[590]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-dg1-12/igt@kms_psr@fbc-psr-primary-blt.html
[591]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-dg1-17/igt@kms_psr@fbc-psr-primary-blt.html
* igt@kms_psr@fbc-psr2-basic:
- shard-mtlp: [SKIP][592] ([i915#9688]) -> [SKIP][593] ([i915#17031]) +8 other tests skip
[592]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_psr@fbc-psr2-basic.html
[593]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_psr@fbc-psr2-basic.html
* igt@kms_psr@fbc-psr2-primary-mmap-cpu:
- shard-mtlp: [SKIP][594] ([i915#17031]) -> [SKIP][595] ([i915#9688]) +11 other tests skip
[594]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_psr@fbc-psr2-primary-mmap-cpu.html
[595]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-1/igt@kms_psr@fbc-psr2-primary-mmap-cpu.html
* igt@kms_psr@psr2-cursor-mmap-gtt:
- shard-rkl: [SKIP][596] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][597] ([i915#1072] / [i915#9732]) +5 other tests skip
[596]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_psr@psr2-cursor-mmap-gtt.html
[597]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_psr@psr2-cursor-mmap-gtt.html
* igt@kms_psr@psr2-primary-mmap-gtt:
- shard-mtlp: [SKIP][598] ([i915#4077] / [i915#9688]) -> [SKIP][599] ([i915#17031])
[598]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_psr@psr2-primary-mmap-gtt.html
[599]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_psr@psr2-primary-mmap-gtt.html
* igt@kms_psr@psr2-sprite-mmap-cpu:
- shard-rkl: [SKIP][600] ([i915#1072] / [i915#9732]) -> [SKIP][601] ([i915#1072] / [i915#14544] / [i915#9732]) +6 other tests skip
[600]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_psr@psr2-sprite-mmap-cpu.html
[601]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_psr@psr2-sprite-mmap-cpu.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-rkl: [SKIP][602] ([i915#14544] / [i915#15949]) -> [SKIP][603] ([i915#15949])
[602]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[603]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-3/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-mtlp: [SKIP][604] ([i915#12755] / [i915#15867]) -> [SKIP][605] ([i915#17031])
[604]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_rotation_crc@bad-pixel-format.html
[605]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@exhaust-fences:
- shard-mtlp: [SKIP][606] ([i915#4235]) -> [SKIP][607] ([i915#17031])
[606]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_rotation_crc@exhaust-fences.html
[607]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_rotation_crc@exhaust-fences.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-mtlp: [SKIP][608] ([i915#17031]) -> [SKIP][609] ([i915#12755] / [i915#15867]) +1 other test skip
[608]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_rotation_crc@primary-rotation-90.html
[609]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-mtlp: [SKIP][610] ([i915#5289]) -> [SKIP][611] ([i915#17031])
[610]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
[611]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-mtlp: [SKIP][612] ([i915#17031]) -> [SKIP][613] ([i915#5289])
[612]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
[613]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-rkl: [SKIP][614] ([i915#14544] / [i915#5289]) -> [SKIP][615] ([i915#5289]) +1 other test skip
[614]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
[615]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-mtlp: [SKIP][616] ([i915#17031]) -> [SKIP][617] ([i915#3555] / [i915#8809]) +1 other test skip
[616]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_setmode@basic-clone-single-crtc.html
[617]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-5/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-mtlp: [SKIP][618] ([i915#3555] / [i915#8809]) -> [SKIP][619] ([i915#17031])
[618]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-mtlp-7/igt@kms_setmode@invalid-clone-single-crtc.html
[619]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-mtlp-7/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_vrr@flipline:
- shard-rkl: [SKIP][620] ([i915#15243] / [i915#3555]) -> [SKIP][621] ([i915#14544] / [i915#15243] / [i915#3555])
[620]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19152/shard-rkl-8/igt@kms_vrr@flipline.html
[621]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/shard-rkl-6/igt@kms_vrr@flipline.html
[i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
[i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
[i915#12169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12169
[i915#12178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12178
[i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
[i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
[i915#13029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13196
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13390]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13390
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
[i915#13820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13820
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152
[i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14600
[i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
[i915#14896]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14896
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
[i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
[i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
[i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
[i915#15479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15479
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
[i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
[i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
[i915#15726]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15726
[i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733
[i915#15739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15739
[i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778
[i915#15815]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15815
[i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
[i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
[i915#15949]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15949
[i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989
[i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990
[i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991
[i915#16021]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16021
[i915#16079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16079
[i915#16081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16081
[i915#16108]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16108
[i915#16109]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16109
[i915#16112]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16112
[i915#16202]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16202
[i915#16276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16276
[i915#16348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16348
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#16420]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16420
[i915#16451]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16451
[i915#16464]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16464
[i915#16466]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16466
[i915#16471]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16471
[i915#16477]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16477
[i915#16490]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16490
[i915#16593]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16593
[i915#16600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16600
[i915#16604]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16604
[i915#16644]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16644
[i915#16685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16685
[i915#16867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16867
[i915#16943]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16943
[i915#16990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16990
[i915#17016]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17016
[i915#17031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17031
[i915#17032]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17032
[i915#17048]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17048
[i915#17077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17077
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5566
[i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
[i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
[i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8437
[i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
[i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
[i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
[i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
[i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9561
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
[i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_19152 -> Patchwork_162622v7
CI-20190529: 20190529
CI_DRM_19152: 0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9098: 9098
Patchwork_162622v7: 0fb8d1900f1a6b9d21aadbfa5f784979b950bcf8 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162622v7/index.html
[-- Attachment #2: Type: text/html, Size: 206360 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v7 00/14] Add support for Common SDP Transmission Line
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
` (15 preceding siblings ...)
2026-09-16 7:09 ` ✓ i915.CI.Full: " Patchwork
@ 2026-09-18 3:54 ` Nautiyal, Ankit K
16 siblings, 0 replies; 23+ messages in thread
From: Nautiyal, Ankit K @ 2026-09-18 3:54 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, arun.r.murthy, jani.nikula, suraj.kandpal
On 9/15/2026 10:16 PM, Ankit Nautiyal wrote:
> Xe3p_lpd introduces new register bits to program a common SDP
> Transmission line that will be used by the Hardware to position the
> SDPs. Along with this, another new register is also added to stagger
> the different SDPs.
>
> This series adds support for programming the Common SDP Transmission Line
> (CMN_SDP_TL) and its stagger control registers.
>
> Rev2:
> - Add tracking for AS SDP Transmission line first. Instead of directly
> programming it in the register, compute the state during
> compute_config_late() and write the value from crtc_state.
> Readout from the register through a vrr helper, since the register is
> defined in context of VRR and will be used for both DP and HDMI VRR
> packets.
> - Add support to track other SDP transmission lines, instead of stagger
> values.
> - Compute the transmission lines in compute_config_late path and add
> readout.
> - Always write the Common SDP Transmission line and other stagger
> values, whether the packets are sent or not.
> - Dump SDP transmission lines in crtc_state.
>
> Rev3:
> - Introduce new files for handling the Data Island Packets (DIPs)
> programming in one place. (Ville)
> - Extract the Transmission Line programming for
> HDMI Extended Metadata Packet (EMP) and Adaptive Sync SDP (AS SDP)
> i.e. EMP_AS_SDP_TL in the new file.
> - Add programming for Common Base SDP Transmission lines and other
> stagger offsets in the new file.
> - Add a #TODO to extract other helpers that deal with Data Island Packets
> and VIDEO_DIP registers.
> - Place the HAS_* Macros related to DIP in the intel_dip.h file
> instead of intel_display_devices.h (Jani)
> - Make function names more descriptive and avoid overuse of multiple
> acronyms. (Jani)
>
> Note:
> - Though I have fixed the naming as suggested in most places, I
> have retained HAS_EMP_AS_SDP_TL for the following reasons:
> 1) Lack of an apt name that avoids the acronym for
> 'Extended Metadata Packet Adaptive Sync Secondary Packet Transmission
> Line'.
> 2) Keeping this name makes it easier to find and map with the exact name
> for such a complex register name.
>
> However, I am open to suggestions for a better name.
>
> Rev4:
> - Drop the patch to check for DP encoder before writing EMP_AS_SDP_TL
> register. Instead reset the register to 0 for non DP encoder case.
>
> Rev5:
> - Rebase
> - Address review comments from Suraj:
> - Drop some redundant checks, and fix few commit messages.
>
> Rev6:
> - Move the new struct in intel_display_types.h from intel_dip.h (Jani)
> - Check for CMN_SDP_TL restriction and Warn if not followed. (Suraj)
> - Use HAS_CMN_SDP_TL() instead of checking if cmn_sdp_tl is set or not.
> (Sashiko)
> - Make sure that the guardband is sufficient as per CMN_SDP_TL while
> optiminzing the guardband.
>
> Rev7:
> - Account for VSC SDP's own minimum guardband requirement in
> intel_dp_sdp_min_guardband(), for completeness. (Sashiko)
> - Wrap two long line macro definitions in intel_dip_regs.h.
>
> Ankit Nautiyal (13):
> drm/i915/dip: Add new file to handle Data Island Packet hardware
> drm/i915/vrr: Use the helper to write EMP_AS_SDP_TL register
> drm/i915/intel_dip: Add check for DP encoder
> drm/i915/dip: Add helper to get AS SDP Transmission Line
> drm/i915/display: Add crtc state for DIP transmission lines
> drm/i915/dip: Store and use AS SDP transmission line from crtc state
> drm/i915/dip: Add HAS_COMMON_SDP_TL macro
> drm/i915/dip: Store SDP transmission lines in crtc_state
> drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission
> line
> drm/i915/dip: Enable Common SDP Transmission line
> drm/i915/dp: Account VSC SDP in min guardband
> drm/i915/dp: Adjust SDP guardband requirement for CMN_SDP_TL
> drm/i915/display: Dump DIP Transmission lines
>
> Arun R Murthy (1):
> drm/i915/dip_regs: Add register definitions for common SDP
> Transmission Line
Thanks for the review comments, and suggestions. Pushed to drm-intel-next.
intel_dip.c was introduced here but only covers the transmission-line
handling. Two follow-ups remain:
- Extract the remaining low-level DIP buffer/infoframe code out of
intel_hdmi.c into intel_dip.c.
- Introduce a DIP type enum so HDMI packet types and DP SDP types aren't
mixed in the same namespace in hsw_infoframe_enable()
I'll try to get to that next.
Thanks & Regards,
Ankit
>
> drivers/gpu/drm/i915/Makefile | 1 +
> .../drm/i915/display/intel_crtc_state_dump.c | 9 +
> drivers/gpu/drm/i915/display/intel_ddi.c | 5 +
> drivers/gpu/drm/i915/display/intel_dip.c | 215 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_dip.h | 53 +++++
> drivers/gpu/drm/i915/display/intel_dip_regs.h | 38 ++++
> drivers/gpu/drm/i915/display/intel_display.c | 6 +
> .../drm/i915/display/intel_display_types.h | 16 ++
> drivers/gpu/drm/i915/display/intel_dp.c | 62 ++++-
> drivers/gpu/drm/i915/display/intel_vrr.c | 14 +-
> drivers/gpu/drm/i915/display/intel_vrr_regs.h | 6 -
> drivers/gpu/drm/xe/Makefile | 1 +
> 12 files changed, 407 insertions(+), 19 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_dip.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_dip.h
> create mode 100644 drivers/gpu/drm/i915/display/intel_dip_regs.h
>
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2026-09-18 3:55 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-09-15 16:46 [PATCH v7 00/14] Add support for Common SDP Transmission Line Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 01/14] drm/i915/dip: Add new file to handle Data Island Packet hardware Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 02/14] drm/i915/vrr: Use the helper to write EMP_AS_SDP_TL register Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 03/14] drm/i915/intel_dip: Add check for DP encoder Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 04/14] drm/i915/dip: Add helper to get AS SDP Transmission Line Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 05/14] drm/i915/display: Add crtc state for DIP transmission lines Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 06/14] drm/i915/dip: Store and use AS SDP transmission line from crtc state Ankit Nautiyal
2026-09-15 17:22 ` sashiko-bot
2026-09-16 4:18 ` Nautiyal, Ankit K
2026-09-15 16:46 ` [PATCH v7 07/14] drm/i915/dip_regs: Add register definitions for common SDP Transmission Line Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 08/14] drm/i915/dip: Add HAS_COMMON_SDP_TL macro Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 09/14] drm/i915/dip: Store SDP transmission lines in crtc_state Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 10/14] drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 11/14] drm/i915/dip: Enable Common " Ankit Nautiyal
2026-09-15 17:28 ` sashiko-bot
2026-09-16 4:19 ` Nautiyal, Ankit K
2026-09-15 16:46 ` [PATCH v7 12/14] drm/i915/dp: Account VSC SDP in min guardband Ankit Nautiyal
2026-09-16 2:41 ` Kandpal, Suraj
2026-09-15 16:46 ` [PATCH v7 13/14] drm/i915/dp: Adjust SDP guardband requirement for CMN_SDP_TL Ankit Nautiyal
2026-09-15 16:46 ` [PATCH v7 14/14] drm/i915/display: Dump DIP Transmission lines Ankit Nautiyal
2026-09-15 20:23 ` ✓ i915.CI.BAT: success for Add support for Common SDP Transmission Line (rev7) Patchwork
2026-09-16 7:09 ` ✓ i915.CI.Full: " Patchwork
2026-09-18 3:54 ` [PATCH v7 00/14] Add support for Common SDP Transmission Line Nautiyal, Ankit K
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