From: Eugeni Dodonov <eugeni.dodonov@linux.intel.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: properly enable the blc controller on the right pipe
Date: Tue, 12 Jun 2012 12:15:22 -0300 [thread overview]
Message-ID: <4FD75D0A.7050009@linux.intel.com> (raw)
In-Reply-To: <1338891294-11845-1-git-send-email-daniel.vetter@ffwll.ch>
On 06/05/2012 07:14 AM, Daniel Vetter wrote:
> + /* Note that this can also get called through dpms changes. And
> + * we don't track the backlight dpms state, hence check whether
> + * we have to do anything first. */
> + if (tmp & BLM_PWM_ENABLE)
> + return;
> +
I am tempted to add a WARN_ON(pipe > dev_priv->num_pipe) here, now that
we should handle 3 pipes.
> + if (dev_priv->num_pipe == 3)
> + tmp &= ~BLM_PIPE_SELECT_IVB;
> + else
> + tmp &= ~BLM_PIPE_SELECT;
> +
> + tmp |= BLM_PIPE(pipe);
> + tmp &= ~BLM_PWM_ENABLE;
> +
> + I915_WRITE(reg, tmp);
> + POSTING_READ(reg);
> + I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
> + }
But besides that:
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Eugeni
next prev parent reply other threads:[~2012-06-12 15:13 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-05 8:07 [PATCH 1/4] drm/i915: pnv has a backlight polarity control bit, too Daniel Vetter
2012-06-05 8:07 ` [PATCH 2/4] drm/i915: clear up backlight #define confusion on gen4+ Daniel Vetter
2012-06-12 15:06 ` Eugeni Dodonov
2012-06-05 8:07 ` [PATCH 3/4] drm/i915: properly enable the blc controller on the right pipe Daniel Vetter
2012-06-05 11:15 ` Daniel Vetter
2012-06-05 10:14 ` [PATCH] " Daniel Vetter
2012-06-12 15:15 ` Eugeni Dodonov [this message]
2012-06-05 8:07 ` [PATCH 4/4] drm/i915: allow pipe A for lvds on gen4 Daniel Vetter
2012-06-12 15:35 ` Eugeni Dodonov
2012-06-12 17:29 ` Daniel Vetter
2012-06-05 9:25 ` [PATCH 1/4] drm/i915: pnv has a backlight polarity control bit, too Paul Menzel
2012-06-12 14:41 ` Eugeni Dodonov
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