From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 08/28] drm/i915/gt: Show all active timelines for debugging
Date: Tue, 17 Nov 2020 12:59:44 +0000 [thread overview]
Message-ID: <5672a04a-bc05-1d32-e051-b9a5a0fcc82d@linux.intel.com> (raw)
In-Reply-To: <20201117113103.21480-8-chris@chris-wilson.co.uk>
On 17/11/2020 11:30, Chris Wilson wrote:
> Include the active timelines for debugfs/i915_engine_info, so that we
> can see which have unready requests inflight which are not shown
> otherwise.
>
> Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/gt/intel_timeline.c | 79 ++++++++++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_timeline.h | 8 +++
> drivers/gpu/drm/i915/i915_debugfs.c | 18 +++---
> 3 files changed, 97 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
> index 7ea94d201fe6..2b4ed4b2b67c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
> @@ -617,6 +617,85 @@ void intel_gt_fini_timelines(struct intel_gt *gt)
> GEM_BUG_ON(!list_empty(&timelines->hwsp_free_list));
> }
>
> +void intel_gt_show_timelines(struct intel_gt *gt,
> + struct drm_printer *m,
> + void (*show_request)(struct drm_printer *m,
> + const struct i915_request *rq,
> + const char *prefix))
> +{
> + struct intel_gt_timelines *timelines = >->timelines;
> + struct intel_timeline *tl, *tn;
> + LIST_HEAD(free);
> +
> + spin_lock(&timelines->lock);
> + list_for_each_entry_safe(tl, tn, &timelines->active_list, link) {
> + unsigned long count, ready, inflight;
> + struct i915_request *rq, *rn;
> + struct dma_fence *fence;
> +
> + if (!mutex_trylock(&tl->mutex))
> + continue;
I suggest to print a marker like "Timeline %llx: busy" or so to avoid
confusion.
> +
> + intel_timeline_get(tl);
> + GEM_BUG_ON(!atomic_read(&tl->active_count));
> + atomic_inc(&tl->active_count); /* pin the list element */
> + spin_unlock(&timelines->lock);
> +
> + count = 0;
> + ready = 0;
> + inflight = 0;
> + list_for_each_entry_safe(rq, rn, &tl->requests, link) {
> + if (i915_request_completed(rq))
> + continue;
> +
> + count++;
> + if (i915_request_is_ready(rq))
> + ready++;
> + if (i915_request_is_active(rq))
> + inflight++;
> + }
> +
> + drm_printf(m, "Timeline %llx: { ", tl->fence_context);
> + drm_printf(m, "count %lu, ready: %lu, inflight: %lu",
> + count, ready, inflight);
> + drm_printf(m, ", seqno: { current: %d, last: %d }",
> + *tl->hwsp_seqno, tl->seqno);
> + fence = i915_active_fence_get(&tl->last_request);
> + if (fence) {
> + drm_printf(m, ", engine: %s",
> + to_request(fence)->engine->name);
> + dma_fence_put(fence);
> + }
> + drm_printf(m, " }\n");
> +
> + if (show_request) {
> + list_for_each_entry_safe(rq, rn, &tl->requests, link)
> + show_request(m, rq,
> + i915_request_is_active(rq) ? " E" :
> + i915_request_is_ready(rq) ? " Q" :
> + " U");
Can we get some consistency between the category counts and flags.
s/count/queued/ -> Q
ready -> R (also matches with term runnable)
active -> E ? hmmm E is consistent with the engine info dump.
Not ideal but perhaps every bit of more consistency is good.
> + }
> +
> + mutex_unlock(&tl->mutex);
> + spin_lock(&timelines->lock);
> +
> + /* Resume list iteration after reacquiring spinlock */
> + list_safe_reset_next(tl, tn, link);
> + if (atomic_dec_and_test(&tl->active_count))
> + list_del(&tl->link);
> +
> + /* Defer the final release to after the spinlock */
> + if (refcount_dec_and_test(&tl->kref.refcount)) {
> + GEM_BUG_ON(atomic_read(&tl->active_count));
> + list_add(&tl->link, &free);
> + }
> + }
> + spin_unlock(&timelines->lock);
> +
> + list_for_each_entry_safe(tl, tn, &free, link)
> + __intel_timeline_free(&tl->kref);
> +}
> +
> #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> #include "gt/selftests/mock_timeline.c"
> #include "gt/selftest_timeline.c"
> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.h b/drivers/gpu/drm/i915/gt/intel_timeline.h
> index 9882cd911d8e..9b88f220be2b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_timeline.h
> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.h
> @@ -31,6 +31,8 @@
> #include "i915_syncmap.h"
> #include "intel_timeline_types.h"
>
> +struct drm_printer;
> +
> struct intel_timeline *
> __intel_timeline_create(struct intel_gt *gt,
> struct i915_vma *global_hwsp,
> @@ -106,4 +108,10 @@ int intel_timeline_read_hwsp(struct i915_request *from,
> void intel_gt_init_timelines(struct intel_gt *gt);
> void intel_gt_fini_timelines(struct intel_gt *gt);
>
> +void intel_gt_show_timelines(struct intel_gt *gt,
> + struct drm_printer *m,
> + void (*show_request)(struct drm_printer *m,
> + const struct i915_request *rq,
> + const char *prefix));
> +
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 337293c7bb7d..498c82dcc7e9 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1306,26 +1306,28 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused)
>
> static int i915_engine_info(struct seq_file *m, void *unused)
> {
> - struct drm_i915_private *dev_priv = node_to_i915(m->private);
> + struct drm_i915_private *i915 = node_to_i915(m->private);
> struct intel_engine_cs *engine;
> intel_wakeref_t wakeref;
> struct drm_printer p;
>
> - wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> + wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> seq_printf(m, "GT awake? %s [%d]\n",
> - yesno(dev_priv->gt.awake),
> - atomic_read(&dev_priv->gt.wakeref.count));
> + yesno(i915->gt.awake),
> + atomic_read(&i915->gt.wakeref.count));
> seq_printf(m, "GT busy: %llu ms\n",
> - ktime_to_ms(intel_gt_get_busy_time(&dev_priv->gt)));
> + ktime_to_ms(intel_gt_get_busy_time(&i915->gt)));
> seq_printf(m, "CS timestamp frequency: %u Hz\n",
> - RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_hz);
> + RUNTIME_INFO(i915)->cs_timestamp_frequency_hz);
>
> p = drm_seq_file_printer(m);
> - for_each_uabi_engine(engine, dev_priv)
> + for_each_uabi_engine(engine, i915)
> intel_engine_dump(engine, &p, "%s\n", engine->name);
>
> - intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> + intel_gt_show_timelines(&i915->gt, &p, NULL);
> +
> + intel_runtime_pm_put(&i915->runtime_pm, wakeref);
>
> return 0;
> }
>
Regards,
Tvrtko
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next prev parent reply other threads:[~2020-11-17 12:59 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 11:30 [Intel-gfx] [PATCH 01/28] drm/i915/selftests: Improve granularity for mocs reset checks Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 02/28] drm/i915/selftests: Small tweak to put the termination conditions together Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 03/28] drm/i915/gem: Drop free_work for GEM contexts Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 04/28] drm/i915/gt: Ignore dt==0 for reporting underflows Chris Wilson
2020-11-17 11:42 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 05/28] drm/i915/gt: Track the overall busy time Chris Wilson
2020-11-17 12:44 ` Tvrtko Ursulin
2020-11-17 13:05 ` Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 06/28] drm/i915/gt: Include semaphore status in print_request() Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 07/28] drm/i915: Lift i915_request_show() Chris Wilson
2020-11-17 12:51 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 08/28] drm/i915/gt: Show all active timelines for debugging Chris Wilson
2020-11-17 12:59 ` Tvrtko Ursulin [this message]
2020-11-17 13:25 ` Chris Wilson
2020-11-18 15:51 ` Tvrtko Ursulin
2020-11-19 10:47 ` Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 09/28] drm/i915: Lift waiter/signaler iterators Chris Wilson
2020-11-17 13:00 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 10/28] drm/i915: Show timeline dependencies for debug Chris Wilson
2020-11-17 13:06 ` Tvrtko Ursulin
2020-11-17 13:30 ` Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 11/28] drm/i915/gt: Defer enabling the breadcrumb interrupt to after submission Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 12/28] drm/i915/gt: Track signaled breadcrumbs outside of the breadcrumb spinlock Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 13/28] drm/i915/gt: Don't cancel the interrupt shadow too early Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 14/28] drm/i915/gt: Free stale request on destroying the virtual engine Chris Wilson
2020-11-18 11:05 ` Tvrtko Ursulin
2020-11-18 11:24 ` Chris Wilson
2020-11-18 11:38 ` Tvrtko Ursulin
2020-11-18 12:10 ` Chris Wilson
2020-11-19 14:06 ` Tvrtko Ursulin
2020-11-19 14:22 ` Chris Wilson
2020-11-19 16:17 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 15/28] drm/i915/gt: Protect context lifetime with RCU Chris Wilson
2020-11-18 11:36 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 16/28] drm/i915/gt: Split the breadcrumb spinlock between global and contexts Chris Wilson
2020-11-18 11:35 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 17/28] drm/i915/gt: Move the breadcrumb to the signaler if completed upon cancel Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 18/28] drm/i915/gt: Decouple completed requests on unwind Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 19/28] drm/i915/gt: Check for a completed last request once Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 20/28] drm/i915/gt: Replace direct submit with direct call to tasklet Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 21/28] drm/i915/gt: ce->inflight updates are now serialised Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 22/28] drm/i915/gt: Use virtual_engine during execlists_dequeue Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 23/28] drm/i915/gt: Decouple inflight virtual engines Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 24/28] drm/i915/gt: Defer schedule_out until after the next dequeue Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 25/28] drm/i915/gt: Remove virtual breadcrumb before transfer Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 26/28] drm/i915/gt: Shrink the critical section for irq signaling Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 27/28] drm/i915/gt: Resubmit the virtual engine on schedule-out Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 28/28] drm/i915/gt: Simplify virtual engine handling for execlists_hold() Chris Wilson
2020-11-17 18:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/28] drm/i915/selftests: Improve granularity for mocs reset checks Patchwork
2020-11-17 18:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-17 19:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-17 22:56 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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