From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 10/28] drm/i915: Show timeline dependencies for debug
Date: Tue, 17 Nov 2020 13:06:22 +0000 [thread overview]
Message-ID: <c13730da-a33f-a0e5-6af3-36e15f8c2254@linux.intel.com> (raw)
In-Reply-To: <20201117113103.21480-10-chris@chris-wilson.co.uk>
On 17/11/2020 11:30, Chris Wilson wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Include the signalers each request in the timeline is waiting on, as a
> means to try and identify the cause of a stall. This can be quite
> verbose, even as for now we only show each request in the timeline and
> its immediate antecedents.
>
> This generates output like:
>
> Timeline 886: { count 1, ready: 0, inflight: 0, seqno: { current: 664, last: 666 }, engine: rcs0 }
Applies to earlier patch:
I am still tempted to suggest replacing "current: %d, last: %d" with
"seqno: %d/%d" for compactness and which is still completely intuitive
to me.
And maybe instead of "engine: %s" just append the engine name direct as tag.
But up to you.
> U 886:29a- prio=0 @ 134ms: gem_exec_parall<4621>
> - U bc1:27a- prio=0 @ 134ms: gem_exec_parall[4917]
> Timeline 825: { count 1, ready: 0, inflight: 0, seqno: { current: 802, last: 804 }, engine: vcs0 }
> U 825:324 prio=0 @ 107ms: gem_exec_parall<4518>
> - U b75:140- prio=0 @ 110ms: gem_exec_parall<5486>
> Timeline b46: { count 1, ready: 0, inflight: 0, seqno: { current: 782, last: 784 }, engine: vcs0 }
> U b46:310- prio=0 @ 70ms: gem_exec_parall<5428>
> - U c11:170- prio=0 @ 70ms: gem_exec_parall[5501]
> Timeline 96b: { count 1, ready: 0, inflight: 0, seqno: { current: 632, last: 634 }, engine: vcs0 }
> U 96b:27a- prio=0 @ 67ms: gem_exec_parall<4878>
> - U b75:19e- prio=0 @ 67ms: gem_exec_parall<5486>
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
> drivers/gpu/drm/i915/i915_scheduler.c | 31 +++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_scheduler.h | 6 ++++++
> 3 files changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 498c82dcc7e9..f6e71119891f 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -45,6 +45,7 @@
> #include "i915_debugfs.h"
> #include "i915_debugfs_params.h"
> #include "i915_irq.h"
> +#include "i915_scheduler.h"
> #include "i915_trace.h"
> #include "intel_pm.h"
> #include "intel_sideband.h"
> @@ -1325,7 +1326,7 @@ static int i915_engine_info(struct seq_file *m, void *unused)
> for_each_uabi_engine(engine, i915)
> intel_engine_dump(engine, &p, "%s\n", engine->name);
>
> - intel_gt_show_timelines(&i915->gt, &p, NULL);
> + intel_gt_show_timelines(&i915->gt, &p, i915_request_show_with_schedule);
>
> intel_runtime_pm_put(&i915->runtime_pm, wakeref);
>
> diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
> index cbb880b10c65..8837ba672933 100644
> --- a/drivers/gpu/drm/i915/i915_scheduler.c
> +++ b/drivers/gpu/drm/i915/i915_scheduler.c
> @@ -504,6 +504,37 @@ void i915_sched_node_fini(struct i915_sched_node *node)
> spin_unlock_irq(&schedule_lock);
> }
>
> +void i915_request_show_with_schedule(struct drm_printer *m,
> + const struct i915_request *rq,
> + const char *prefix)
> +{
> + struct i915_dependency *dep;
> +
> + i915_request_show(m, rq, prefix);
> + if (i915_request_completed(rq))
> + return;
> +
> + rcu_read_lock();
> + for_each_signaler(dep, rq) {
> + const struct i915_request *signaler =
> + node_to_request(dep->signaler);
> +
> + /* Dependencies along the same timeline are expected. */
> + if (signaler->timeline == rq->timeline)
> + continue;
> +
> + if (i915_request_completed(signaler))
> + continue;
> +
> + /* XXX ideally build indent into prefix */
> + i915_request_show(m, signaler,
> + i915_request_is_active(signaler) ? " - E" :
> + i915_request_is_ready(signaler) ? " - Q" :
> + " - U");
This we will see what we agree on in the previous patch.
> + }
> + rcu_read_unlock();
> +}
> +
> static void i915_global_scheduler_shrink(void)
> {
> kmem_cache_shrink(global.slab_dependencies);
> diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h
> index 6f0bf00fc569..34cee9a17801 100644
> --- a/drivers/gpu/drm/i915/i915_scheduler.h
> +++ b/drivers/gpu/drm/i915/i915_scheduler.h
> @@ -13,6 +13,8 @@
>
> #include "i915_scheduler_types.h"
>
> +struct drm_printer;
> +
> #define priolist_for_each_request(it, plist, idx) \
> for (idx = 0; idx < ARRAY_SIZE((plist)->requests); idx++) \
> list_for_each_entry(it, &(plist)->requests[idx], sched.link)
> @@ -54,4 +56,8 @@ static inline void i915_priolist_free(struct i915_priolist *p)
> __i915_priolist_free(p);
> }
>
> +void i915_request_show_with_schedule(struct drm_printer *m,
> + const struct i915_request *rq,
> + const char *prefix);
> +
> #endif /* _I915_SCHEDULER_H_ */
>
Overall looks good to me.
Regards,
Tvrtko
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next prev parent reply other threads:[~2020-11-17 13:06 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 11:30 [Intel-gfx] [PATCH 01/28] drm/i915/selftests: Improve granularity for mocs reset checks Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 02/28] drm/i915/selftests: Small tweak to put the termination conditions together Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 03/28] drm/i915/gem: Drop free_work for GEM contexts Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 04/28] drm/i915/gt: Ignore dt==0 for reporting underflows Chris Wilson
2020-11-17 11:42 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 05/28] drm/i915/gt: Track the overall busy time Chris Wilson
2020-11-17 12:44 ` Tvrtko Ursulin
2020-11-17 13:05 ` Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 06/28] drm/i915/gt: Include semaphore status in print_request() Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 07/28] drm/i915: Lift i915_request_show() Chris Wilson
2020-11-17 12:51 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 08/28] drm/i915/gt: Show all active timelines for debugging Chris Wilson
2020-11-17 12:59 ` Tvrtko Ursulin
2020-11-17 13:25 ` Chris Wilson
2020-11-18 15:51 ` Tvrtko Ursulin
2020-11-19 10:47 ` Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 09/28] drm/i915: Lift waiter/signaler iterators Chris Wilson
2020-11-17 13:00 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 10/28] drm/i915: Show timeline dependencies for debug Chris Wilson
2020-11-17 13:06 ` Tvrtko Ursulin [this message]
2020-11-17 13:30 ` Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 11/28] drm/i915/gt: Defer enabling the breadcrumb interrupt to after submission Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 12/28] drm/i915/gt: Track signaled breadcrumbs outside of the breadcrumb spinlock Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 13/28] drm/i915/gt: Don't cancel the interrupt shadow too early Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 14/28] drm/i915/gt: Free stale request on destroying the virtual engine Chris Wilson
2020-11-18 11:05 ` Tvrtko Ursulin
2020-11-18 11:24 ` Chris Wilson
2020-11-18 11:38 ` Tvrtko Ursulin
2020-11-18 12:10 ` Chris Wilson
2020-11-19 14:06 ` Tvrtko Ursulin
2020-11-19 14:22 ` Chris Wilson
2020-11-19 16:17 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 15/28] drm/i915/gt: Protect context lifetime with RCU Chris Wilson
2020-11-18 11:36 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 16/28] drm/i915/gt: Split the breadcrumb spinlock between global and contexts Chris Wilson
2020-11-18 11:35 ` Tvrtko Ursulin
2020-11-17 11:30 ` [Intel-gfx] [PATCH 17/28] drm/i915/gt: Move the breadcrumb to the signaler if completed upon cancel Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 18/28] drm/i915/gt: Decouple completed requests on unwind Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 19/28] drm/i915/gt: Check for a completed last request once Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 20/28] drm/i915/gt: Replace direct submit with direct call to tasklet Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 21/28] drm/i915/gt: ce->inflight updates are now serialised Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 22/28] drm/i915/gt: Use virtual_engine during execlists_dequeue Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 23/28] drm/i915/gt: Decouple inflight virtual engines Chris Wilson
2020-11-17 11:30 ` [Intel-gfx] [PATCH 24/28] drm/i915/gt: Defer schedule_out until after the next dequeue Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 25/28] drm/i915/gt: Remove virtual breadcrumb before transfer Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 26/28] drm/i915/gt: Shrink the critical section for irq signaling Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 27/28] drm/i915/gt: Resubmit the virtual engine on schedule-out Chris Wilson
2020-11-17 11:31 ` [Intel-gfx] [PATCH 28/28] drm/i915/gt: Simplify virtual engine handling for execlists_hold() Chris Wilson
2020-11-17 18:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/28] drm/i915/selftests: Improve granularity for mocs reset checks Patchwork
2020-11-17 18:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-17 19:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-17 22:56 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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