Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: akash.goel@intel.com, intel-gfx@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH 18/20] drm/i915: Use SSE4.1 movntdqa to accelerate reads from WC memory
Date: Fri, 12 Aug 2016 11:54:04 +0100	[thread overview]
Message-ID: <57ADAACC.2030405@linux.intel.com> (raw)
In-Reply-To: <1470983123-22127-19-git-send-email-akash.goel@intel.com>


On 12/08/16 07:25, akash.goel@intel.com wrote:
> From: Chris Wilson <chris@chris-wilson.co.uk>
>
> This patch provides the infrastructure for performing a 16-byte aligned
> read from WC memory using non-temporal instructions introduced with sse4.1.
> Using movntdqa we can bypass the CPU caches and read directly from memory
> and ignoring the page attributes set on the CPU PTE i.e. negating the
> impact of an otherwise UC access. Copying using movntqda from WC is almost
> as fast as reading from WB memory, modulo the possibility of both hitting
> the CPU cache or leaving the data in the CPU cache for the next consumer.
> (The CPU cache itself my be flushed for the region of the movntdqa and on
> later access the movntdqa reads from a separate internal buffer for the
> cacheline.) The write back to the memory is however cached.
>
> This will be used in later patches to accelerate accessing WC memory.
>
> v2: Report whether the accelerated copy is successful/possible.
> v3: Function alignment override was only necessary when using the
> function target("sse4.1") - which is not necessary for emitting movntdqa
> from __asm__.
> v4: Improve notes on CPU cache behaviour vs non-temporal stores.
> v5: Fix byte offsets for unrolled moves.
> v6: Find all remaining typos of movntqda, use kernel_fpu_begin.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Akash Goel <akash.goel@intel.com>
> Cc: Damien Lespiau <damien.lespiau@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/Makefile      |   3 ++
>   drivers/gpu/drm/i915/i915_drv.c    |   2 +
>   drivers/gpu/drm/i915/i915_drv.h    |   3 ++
>   drivers/gpu/drm/i915/i915_memcpy.c | 101 +++++++++++++++++++++++++++++++++++++
>   4 files changed, 109 insertions(+)
>   create mode 100644 drivers/gpu/drm/i915/i915_memcpy.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index dda724f..3412413 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -3,12 +3,15 @@
>   # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
>
>   subdir-ccflags-$(CONFIG_DRM_I915_WERROR) := -Werror
> +subdir-ccflags-y += \
> +	$(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
>
>   # Please keep these build lists sorted!
>
>   # core driver code
>   i915-y := i915_drv.o \
>   	  i915_irq.o \
> +	  i915_memcpy.o \
>   	  i915_params.o \
>   	  i915_pci.o \
>             i915_suspend.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index cb8c943..4bbf0af 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -841,6 +841,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
>   	mutex_init(&dev_priv->wm.wm_mutex);
>   	mutex_init(&dev_priv->pps_mutex);
>
> +	i915_memcpy_init_early(dev_priv);
> +
>   	ret = i915_workqueues_init(dev_priv);
>   	if (ret < 0)
>   		return ret;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6603812..fca09ea 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3909,4 +3909,7 @@ static inline bool __i915_request_irq_complete(struct drm_i915_gem_request *req)
>   	return false;
>   }
>
> +void i915_memcpy_init_early(struct drm_i915_private *dev_priv);
> +bool i915_memcpy_from_wc(void *dst, const void *src, unsigned long len);
> +
>   #endif
> diff --git a/drivers/gpu/drm/i915/i915_memcpy.c b/drivers/gpu/drm/i915/i915_memcpy.c
> new file mode 100644
> index 0000000..50fc579
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_memcpy.c
> @@ -0,0 +1,101 @@
> +/*
> + * Copyright © 2016 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#include <linux/kernel.h>
> +#include <asm/fpu/api.h>
> +
> +#include "i915_drv.h"
> +
> +DEFINE_STATIC_KEY_FALSE(has_movntdqa);
> +
> +#ifdef CONFIG_AS_MOVNTDQA
> +static void __memcpy_ntdqa(void *dst, const void *src, unsigned long len)
> +{
> +	kernel_fpu_begin();
> +
> +	len >>= 4;
> +	while (len >= 4) {
> +		asm("movntdqa   (%0), %%xmm0\n"
> +		    "movntdqa 16(%0), %%xmm1\n"
> +		    "movntdqa 32(%0), %%xmm2\n"
> +		    "movntdqa 48(%0), %%xmm3\n"
> +		    "movaps %%xmm0,   (%1)\n"
> +		    "movaps %%xmm1, 16(%1)\n"
> +		    "movaps %%xmm2, 32(%1)\n"
> +		    "movaps %%xmm3, 48(%1)\n"
> +		    :: "r" (src), "r" (dst) : "memory");
> +		src += 64;
> +		dst += 64;
> +		len -= 4;
> +	}
> +	while (len--) {
> +		asm("movntdqa (%0), %%xmm0\n"
> +		    "movaps %%xmm0, (%1)\n"
> +		    :: "r" (src), "r" (dst) : "memory");
> +		src += 16;
> +		dst += 16;
> +	}
> +
> +	kernel_fpu_end();
> +}
> +#endif
> +
> +/**
> + * i915_memcpy_from_wc: perform an accelerated *aligned* read from WC
> + * @dst: destination pointer
> + * @src: source pointer
> + * @len: how many bytes to copy
> + *
> + * i915_memcpy_from_wc copies @len bytes from @src to @dst using
> + * non-temporal instructions where available. Note that all arguments
> + * (@src, @dst) must be aligned to 16 bytes and @len must be a multiple
> + * of 16.
> + *
> + * To test whether accelerated reads from WC are supported, use
> + * i915_memcpy_from_wc(NULL, NULL, 0);
> + *
> + * Returns true if the copy was successful, false if the preconditions
> + * are not met.
> + */
> +bool i915_memcpy_from_wc(void *dst, const void *src, unsigned long len)
> +{
> +	if (unlikely(((unsigned long)dst | (unsigned long)src | len) & 15))
> +		return false;
> +
> +#ifdef CONFIG_AS_MOVNTDQA
> +	if (static_branch_likely(&has_movntdqa)) {
> +		if (len)

Potentially could annotate this with another likely.

> +			__memcpy_ntdqa(dst, src, len);
> +		return true;
> +	}
> +#endif
> +
> +	return false;
> +}
> +
> +void i915_memcpy_init_early(struct drm_i915_private *dev_priv)
> +{
> +	if (static_cpu_has(X86_FEATURE_XMM4_1))
> +		static_branch_enable(&has_movntdqa);
> +}
>

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-08-12 10:54 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-12  6:25 [PATCH v5 00/20] Support for sustained capturing of GuC firmware logs akash.goel
2016-08-12  6:25 ` [PATCH 01/20] drm/i915: Decouple GuC log setup from verbosity parameter akash.goel
2016-08-12  6:25 ` [PATCH 02/20] drm/i915: Add GuC ukernel logging related fields to fw interface file akash.goel
2016-08-12  6:25 ` [PATCH 03/20] drm/i915: New structure to contain GuC logging related fields akash.goel
2016-08-12  6:25 ` [PATCH 04/20] drm/i915: Add low level set of routines for programming PM IER/IIR/IMR register set akash.goel
2016-08-12 11:15   ` Tvrtko Ursulin
2016-08-12  6:25 ` [PATCH 05/20] drm/i915: Support for GuC interrupts akash.goel
2016-08-12 11:54   ` Tvrtko Ursulin
2016-08-12 13:10     ` Goel, Akash
2016-08-12 13:31       ` Tvrtko Ursulin
2016-08-12 14:31         ` Goel, Akash
2016-08-12 15:05           ` Tvrtko Ursulin
2016-08-12 15:32             ` Goel, Akash
2016-08-12  6:25 ` [PATCH 06/20] drm/i915: Handle log buffer flush interrupt event from GuC akash.goel
2016-08-12  6:28   ` Chris Wilson
2016-08-12  6:44     ` Goel, Akash
2016-08-12  6:51       ` Chris Wilson
2016-08-12  7:00         ` Goel, Akash
2016-08-12 13:17   ` Tvrtko Ursulin
2016-08-12 13:45     ` Goel, Akash
2016-08-12 14:07       ` Tvrtko Ursulin
2016-08-12 16:17         ` Goel, Akash
2016-08-12  6:25 ` [PATCH 07/20] relay: Use per CPU constructs for the relay channel buffer pointers akash.goel
2016-08-12  6:25 ` [PATCH 08/20] drm/i915: Add a relay backed debugfs interface for capturing GuC logs akash.goel
2016-08-12 13:53   ` Tvrtko Ursulin
2016-08-12 16:10     ` Goel, Akash
2016-08-12  6:25 ` [PATCH 09/20] drm/i915: New lock to serialize the Host2GuC actions akash.goel
2016-08-12 13:55   ` Tvrtko Ursulin
2016-08-12 15:01     ` Goel, Akash
2016-08-12  6:25 ` [PATCH 10/20] drm/i915: Add stats for GuC log buffer flush interrupts akash.goel
2016-08-12 14:26   ` Tvrtko Ursulin
2016-08-12 14:56     ` Goel, Akash
2016-08-12  6:25 ` [PATCH 11/20] drm/i915: Optimization to reduce the sampling time of GuC log buffer akash.goel
2016-08-12 14:42   ` Tvrtko Ursulin
2016-08-12 14:48     ` Goel, Akash
2016-08-12 15:06       ` Tvrtko Ursulin
2016-08-12  6:25 ` [PATCH 12/20] drm/i915: Increase GuC log buffer size to reduce flush interrupts akash.goel
2016-08-12  6:25 ` [PATCH 13/20] drm/i915: Augment i915 error state to include the dump of GuC log buffer akash.goel
2016-08-12 15:20   ` Tvrtko Ursulin
2016-08-12 15:32     ` Chris Wilson
2016-08-12 15:46       ` Goel, Akash
2016-08-12 15:52         ` Chris Wilson
2016-08-12 16:04           ` Goel, Akash
2016-08-12 16:09             ` Chris Wilson
2016-08-12  6:25 ` [PATCH 14/20] drm/i915: Forcefully flush GuC log buffer on reset akash.goel
2016-08-12  6:33   ` Chris Wilson
2016-08-12  7:02     ` Goel, Akash
2016-08-12  6:25 ` [PATCH 15/20] drm/i915: Debugfs support for GuC logging control akash.goel
2016-08-12 15:57   ` Tvrtko Ursulin
2016-08-12 17:08     ` Goel, Akash
2016-08-12  6:25 ` [PATCH 16/20] drm/i915: Support to create write combined type vmaps akash.goel
2016-08-12 10:49   ` Tvrtko Ursulin
2016-08-12 15:13     ` Goel, Akash
2016-08-12 15:16       ` Chris Wilson
2016-08-12 16:46         ` Goel, Akash
2016-08-12  6:25 ` [PATCH 17/20] drm/i915: Use uncached(WC) mapping for acessing the GuC log buffer akash.goel
2016-08-12 16:05   ` Tvrtko Ursulin
2016-08-12  6:25 ` [PATCH 18/20] drm/i915: Use SSE4.1 movntdqa to accelerate reads from WC memory akash.goel
2016-08-12 10:54   ` Tvrtko Ursulin [this message]
2016-08-12 12:22     ` Chris Wilson
2016-08-12  6:25 ` [PATCH 19/20] drm/i915: Use SSE4.1 movntdqa based memcpy for sampling GuC log buffer akash.goel
2016-08-12 16:06   ` Tvrtko Ursulin
2016-08-12  6:25 ` [PATCH 20/20] drm/i915: Early creation of relay channel for capturing boot time logs akash.goel
2016-08-12 16:22   ` Tvrtko Ursulin
2016-08-12 16:31     ` Goel, Akash
2016-08-15  9:20       ` Tvrtko Ursulin
2016-08-15 10:20         ` Goel, Akash
2016-08-12  6:58 ` ✗ Ro.CI.BAT: warning for Support for sustained capturing of GuC firmware logs (rev6) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=57ADAACC.2030405@linux.intel.com \
    --to=tvrtko.ursulin@linux.intel.com \
    --cc=akash.goel@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=mika.kuoppala@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox