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From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Deak, Imre" <imre.deak@intel.com>
Subject: Re: [PATCH v2 1/7] drm/i915/dsc: Add helper to enable the DSC configuration for a CRTC
Date: Thu, 16 Oct 2025 16:39:43 +0000	[thread overview]
Message-ID: <5967dc926192967e33262a2d03c85d0a79c81e24.camel@intel.com> (raw)
In-Reply-To: <20251015161934.262108-2-imre.deak@intel.com>

On Wed, 2025-10-15 at 19:19 +0300, Imre Deak wrote:
> Add a helper to enable the DSC compression configuration for a CRTC.
> Follow-up changes will introduce tracking for the same DSC state on
> the
> whole link, which will need to be set whenever DSC is enabled for the
> CRTC. Also, according to the above, when querying the DSC state on
> the
> link, both the CRTC's and the link's DSC state must be considered.
> 
> Setting the DSC configuration for a CRTC and querying the DSC
> configuration for the link (added by follow-up changes) is better
> done
> via helper functions based on the above, prepare for that here.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c    | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c   | 3 ++-
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +++++
>  drivers/gpu/drm/i915/display/intel_vdsc.h | 1 +
>  4 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 37faa8f19f6e4..297368ff42a5e 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1655,7 +1655,7 @@ static int gen11_dsi_dsc_compute_config(struct
> intel_encoder *encoder,
>  	if (ret)
>  		return ret;
>  
> -	crtc_state->dsc.compression_enable = true;
> +	intel_dsc_enable_on_crtc(crtc_state);
>  
>  	return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index a723e846321fd..1d3ca1970f25f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2475,7 +2475,8 @@ int intel_dp_dsc_compute_config(struct intel_dp
> *intel_dp,
>  		return ret;
>  	}
>  
> -	pipe_config->dsc.compression_enable = true;
> +	intel_dsc_enable_on_crtc(pipe_config);
> +
>  	drm_dbg_kms(display->drm, "DP DSC computed with Input Bpp =
> %d "
>  		    "Compressed Bpp = " FXP_Q4_FMT " Slice Count =
> %d\n",
>  		    pipe_config->pipe_bpp,
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 8e799e225af17..64a1e9f0a1893 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -372,6 +372,11 @@ int intel_dsc_compute_params(struct
> intel_crtc_state *pipe_config)
>  	return 0;
>  }
>  
> +void intel_dsc_enable_on_crtc(struct intel_crtc_state *crtc_state)
> +{
> +	crtc_state->dsc.compression_enable = true;
> +}
> +
>  enum intel_display_power_domain
>  intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder
> cpu_transcoder)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h
> b/drivers/gpu/drm/i915/display/intel_vdsc.h
> index 9e2812f99dd74..240bef82d3576 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> @@ -20,6 +20,7 @@ void intel_uncompressed_joiner_enable(const struct
> intel_crtc_state *crtc_state)
>  void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
>  void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
>  int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
> +void intel_dsc_enable_on_crtc(struct intel_crtc_state *crtc_state);
>  void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
>  enum intel_display_power_domain
>  intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder
> cpu_transcoder);


  reply	other threads:[~2025-10-16 16:39 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-15 16:19 [PATCH v2 0/7] drm/i915/dp: Fix panel replay in DSC mode Imre Deak
2025-10-15 16:19 ` [PATCH v2 1/7] drm/i915/dsc: Add helper to enable the DSC configuration for a CRTC Imre Deak
2025-10-16 16:39   ` Hogander, Jouni [this message]
2025-10-15 16:19 ` [PATCH v2 2/7] drm/i915/dp: Ensure the FEC state stays disabled for UHBR links Imre Deak
2025-10-16 16:47   ` Hogander, Jouni
2025-10-15 16:19 ` [PATCH v2 3/7] drm/i915/dp: Export helper to determine if FEC on non-UHBR links is required Imre Deak
2025-10-16 16:56   ` Hogander, Jouni
2025-10-16 17:18     ` Imre Deak
2025-10-16 18:23       ` Hogander, Jouni
2025-10-16 20:00         ` Imre Deak
2025-10-17  4:00           ` Hogander, Jouni
2025-10-15 16:19 ` [PATCH v2 4/7] drm/i915/dp_mst: Reuse the DP-SST helper function to compute FEC config Imre Deak
2025-10-16 16:58   ` Hogander, Jouni
2025-10-15 16:19 ` [PATCH v2 5/7] drm/i915/dp_mst: Track DSC enabled status on the MST link Imre Deak
2025-10-16 17:01   ` Hogander, Jouni
2025-10-15 16:19 ` [PATCH v2 6/7] drm/i915/dp_mst: Recompute all MST link CRTCs if DSC gets enabled on the link Imre Deak
2025-10-16 17:04   ` Hogander, Jouni
2025-10-15 16:19 ` [PATCH v2 7/7] drm/i915/dp: Fix panel replay when DSC is enabled Imre Deak
2025-10-16  7:06   ` Hogander, Jouni
2025-10-15 20:24 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Fix panel replay in DSC mode (rev2) Patchwork
2025-10-17  9:30   ` Imre Deak
2025-10-17  9:43     ` Grabski, Mateusz
2025-10-17  9:44       ` Imre Deak
2025-10-17 17:57 ` ✗ i915.CI.Full: " Patchwork
2025-10-17 18:58   ` Imre Deak

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