From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nikula, Jani" <jani.nikula@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
"Nikula, Jani" <jani.nikula@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2 6/6] drm/i915/edp: use MSO pixel overlap from DisplayID data
Date: Mon, 13 Sep 2021 06:26:01 +0000 [thread overview]
Message-ID: <5a3ed8934466442895654a9adb1af9f3@intel.com> (raw)
In-Reply-To: <87d8d80ba205eb2ecb50f613219e0a821a842616.1630419362.git.jani.nikula@intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: Tuesday, August 31, 2021 7:48 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [Intel-gfx] [PATCH v2 6/6] drm/i915/edp: use MSO pixel overlap from
> DisplayID data
>
> Now that we have MSO pixel overlap in display info, use it.
>
Looks ok to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index df402f63b741..baf21f9aa40e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2420,6 +2420,8 @@ static void intel_edp_mso_mode_fixup(struct
> intel_connector *connector, static void intel_edp_mso_init(struct intel_dp
> *intel_dp) {
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> + struct intel_connector *connector = intel_dp->attached_connector;
> + struct drm_display_info *info = &connector->base.display_info;
> u8 mso;
>
> if (intel_dp->edp_dpcd[0] < DP_EDP_14) @@ -2438,8 +2440,9 @@ static
> void intel_edp_mso_init(struct intel_dp *intel_dp)
> }
>
> if (mso) {
> - drm_dbg_kms(&i915->drm, "Sink MSO %ux%u configuration\n",
> - mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso);
> + drm_dbg_kms(&i915->drm, "Sink MSO %ux%u configuration, pixel
> overlap %u\n",
> + mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso,
> + info->mso_pixel_overlap);
> if (!HAS_MSO(i915)) {
> drm_err(&i915->drm, "No source MSO support,
> disabling\n");
> mso = 0;
> @@ -2447,7 +2450,7 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
> }
>
> intel_dp->mso_link_count = mso;
> - intel_dp->mso_pixel_overlap = 0; /* FIXME: read from DisplayID v2.0 */
> + intel_dp->mso_pixel_overlap = mso ? info->mso_pixel_overlap : 0;
> }
>
> static bool
> --
> 2.30.2
next prev parent reply other threads:[~2021-09-13 6:26 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-31 14:17 [Intel-gfx] [PATCH v2 0/6] drm/displayid: VESA vendor block and drm/i915 MSO use of it Jani Nikula
2021-08-31 14:17 ` [Intel-gfx] [PATCH v2 1/6] drm/displayid: re-align data block macros Jani Nikula
2021-09-13 5:31 ` Shankar, Uma
2021-08-31 14:17 ` [Intel-gfx] [PATCH v2 2/6] drm/displayid: add DisplayID v2.0 data blocks and primary use cases Jani Nikula
2021-09-13 5:33 ` Shankar, Uma
2021-08-31 14:17 ` [Intel-gfx] [PATCH v2 3/6] drm/edid: abstract OUI conversion to 24-bit int Jani Nikula
2021-09-13 5:35 ` Shankar, Uma
2021-08-31 14:17 ` [Intel-gfx] [PATCH v2 4/6] drm/edid: parse the DisplayID v2.0 VESA vendor block for MSO Jani Nikula
2021-09-13 6:23 ` Shankar, Uma
2021-09-13 9:30 ` Jani Nikula
2021-09-13 11:21 ` Shankar, Uma
2021-08-31 14:17 ` [Intel-gfx] [PATCH v2 5/6] drm/i915/edp: postpone MSO init until after EDID read Jani Nikula
2021-09-13 6:24 ` Shankar, Uma
2021-08-31 14:17 ` [Intel-gfx] [PATCH v2 6/6] drm/i915/edp: use MSO pixel overlap from DisplayID data Jani Nikula
2021-09-13 6:26 ` Shankar, Uma [this message]
2021-08-31 15:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/displayid: VESA vendor block and drm/i915 MSO use of it (rev2) Patchwork
2021-08-31 15:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-31 19:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-13 16:45 ` [Intel-gfx] [PATCH v2 0/6] drm/displayid: VESA vendor block and drm/i915 MSO use of it Jani Nikula
2021-09-14 8:29 ` Maxime Ripard
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