Re: [Intel-gfx] [PATCH v2 0/4] More MTL WA and powerwell patches

[Andrzej Hajda <andrzej.hajda@intel.com>]

Hi,

On 19.04.2023 00:04, Radhakrishna Sripada wrote:
> This series adds 2 MTL WA's and 2 patches to fix re-use
> "DC off" power wells.
> 
> v2:
> Haridhar Kalvala (1):
>    drm/i915/mtl: WA to clear RDOP clock gating
> 
> Madhumitha Tolakanahalli Pradeep (1):
>    drm/i915/mtl: Extend Wa_22011802037 to MTL A-step
> 
> Matt Roper (2):
>    drm/i915: Use separate "DC off" power well for ADL-P and DG2
>    drm/i915/mtl: Re-use ADL-P's "DC off" power well

Apparently this patchset broke bat-dg2-11 machine on CI.
Both pre and post merge results suggests it [1][2].
Regarding bat-dg2-11, this machine contains DG2 AND ADL cards.
So the bug hits ADL card on bat-dg2-11 machine. No idea why only this 
one, there are multiple bat machines with ADL.

[1]: http://gfx-ci.igk.intel.com/tree/drm-tip/bat-dg2-11.html
[2]: http://gfx-ci.igk.intel.com/tree/drm-tip/Patchwork_115292v3/index.html?

Regards
Andrzej

> 
>   .../i915/display/intel_display_power_map.c    | 57 +++++++++++++------
>   drivers/gpu/drm/i915/gt/intel_workarounds.c   |  3 +
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 12 ++--
>   3 files changed, 48 insertions(+), 24 deletions(-)
>