From: Jani Nikula <jani.nikula@linux.intel.com>
To: imre.deak@intel.com, Gustavo Sousa <gustavo.sousa@intel.com>
Cc: James Xiong <james.xiong@intel.com>,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v3] drm/i915/dmc: fix assert_dmc_loaded WARN during async firmware load
Date: Tue, 12 May 2026 11:25:33 +0300 [thread overview]
Message-ID: <7f0894a1c5d2e7b276e5d039f6a240813fce8b81@intel.com> (raw)
In-Reply-To: <agHSpKZtCqmciCU9@ideak-desk.lan>
On Mon, 11 May 2026, Imre Deak <imre.deak@intel.com> wrote:
> On Mon, May 11, 2026 at 09:50:59AM -0300, Gustavo Sousa wrote:
>> Imre Deak <imre.deak@intel.com> writes:
>>
>> > On Mon, May 11, 2026 at 09:20:56AM -0300, Gustavo Sousa wrote:
>> >> James Xiong <james.xiong@intel.com> writes:
>> >>
>> >> > During driver probe, DMC firmware is loaded asynchronously via a
>> >> > workqueue. There is a race between parse_dmc_fw() setting the payload
>> >> > pointer (making has_dmc_id_fw() return true) and intel_dmc_load_program()
>> >> > writing the firmware to hardware registers. If the probe thread calls
>> >> > intel_dmc_enable_pipe() -> assert_dmc_loaded() in this window via
>> >> > intel_modeset_setup_hw_state(), it sees parsed payload but stale HW
>> >> > registers, triggering a ~20% intermittent WARNING on ADL-N warm boot.
>> >> >
>> >> > v2: Fix by calling intel_dmc_wait_fw_load() in
>> >> > intel_modeset_setup_hw_state() before iterating the CRTCs (Gustavo
>> >> > Sousa).
>> >> >
>> >> > v3: Move intel_dmc_wait_fw_load() into intel_dmc_enable_pipe() itself
>> >> > so the function is self-contained (Jani Nikula, Gustavo Sousa).
>> >> >
>> >> > Signed-off-by: James Xiong <james.xiong@intel.com>
>> >>
>> >> +Imre
>> >>
>> >> Perhaps this deserves a fixes tag?
>> >
>> > Since that would result in backporting the fix to -stable, it depends on
>> > whether enabling the pipe DMC functionality before the firmware is
>> > loaded is an actual functionality problem.
>>
>> I think we depend on pipe DMC for the flip queue functionality, so I
>> suspect it could be an issue.
>
> AFAIU stable rules require knowing that a fix fixes something for a
> user.
The rules may say that, but the reality doesn't match the rules. Lots
more stuff gets backported to stable nowadays.
BR,
Jani
> I suppose one way to make this sure would be reproducing a problem
> with PIPE DMC explicitly enabled early, before the firmware is loaded.
>
>> That said, I'm not very involved in that, so I can say for sure.
>>
>> --
>> Gustavo Sousa
>>
>> >
>> >> If so, maybe it should be this one:
>> >>
>> >> Fixes: 3af2ff0840be ("drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled")
>> >>
>> >> The change itself looks good to me, so
>> >>
>> >> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> >>
>> >> > ---
>> >> > drivers/gpu/drm/i915/display/intel_dmc.c | 7 ++++++-
>> >> > 1 file changed, 6 insertions(+), 1 deletion(-)
>> >> >
>> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> > index 0df4f42ba3e3..4151eae92744 100644
>> >> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> > @@ -786,7 +786,12 @@ void intel_dmc_enable_pipe(const struct intel_crtc_state *crtc_state)
>> >> > enum pipe pipe = crtc->pipe;
>> >> > enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);
>> >> >
>> >> > - if (!is_valid_dmc_id(dmc_id) || !has_dmc_id_fw(display, dmc_id))
>> >> > + if (!is_valid_dmc_id(dmc_id))
>> >> > + return;
>> >> > +
>> >> > + intel_dmc_wait_fw_load(display);
>> >> > +
>> >> > + if (!has_dmc_id_fw(display, dmc_id))
>> >> > return;
>> >> >
>> >> > if (!can_enable_pipedmc(crtc_state)) {
>> >> > --
>> >> > 2.34.1
--
Jani Nikula, Intel
prev parent reply other threads:[~2026-05-12 8:25 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-08 18:13 [PATCH v3] drm/i915/dmc: fix assert_dmc_loaded WARN during async firmware load James Xiong
2026-05-08 19:01 ` ✓ i915.CI.BAT: success for drm/i915/dmc: fix assert_dmc_loaded WARN during async firmware load (rev2) Patchwork
2026-05-09 17:17 ` ✗ i915.CI.Full: failure " Patchwork
2026-05-11 12:10 ` Gustavo Sousa
2026-05-11 12:20 ` [PATCH v3] drm/i915/dmc: fix assert_dmc_loaded WARN during async firmware load Gustavo Sousa
2026-05-11 12:39 ` Imre Deak
2026-05-11 12:50 ` Gustavo Sousa
2026-05-11 12:52 ` Gustavo Sousa
2026-05-11 12:59 ` Imre Deak
2026-05-12 8:25 ` Jani Nikula [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7f0894a1c5d2e7b276e5d039f6a240813fce8b81@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=gustavo.sousa@intel.com \
--cc=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=james.xiong@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox