Re: [PATCH v3] drm/i915/dmc: fix assert_dmc_loaded WARN during async firmware load

[Imre Deak <imre.deak@intel.com>]

On Mon, May 11, 2026 at 09:50:59AM -0300, Gustavo Sousa wrote:
> Imre Deak <imre.deak@intel.com> writes:
> 
> > On Mon, May 11, 2026 at 09:20:56AM -0300, Gustavo Sousa wrote:
> >> James Xiong <james.xiong@intel.com> writes:
> >> 
> >> > During driver probe, DMC firmware is loaded asynchronously via a
> >> > workqueue. There is a race between parse_dmc_fw() setting the payload
> >> > pointer (making has_dmc_id_fw() return true) and intel_dmc_load_program()
> >> > writing the firmware to hardware registers. If the probe thread calls
> >> > intel_dmc_enable_pipe() -> assert_dmc_loaded() in this window via
> >> > intel_modeset_setup_hw_state(), it sees parsed payload but stale HW
> >> > registers, triggering a ~20% intermittent WARNING on ADL-N warm boot.
> >> >
> >> > v2: Fix by calling intel_dmc_wait_fw_load() in
> >> >     intel_modeset_setup_hw_state() before iterating the CRTCs (Gustavo
> >> >     Sousa).
> >> >
> >> > v3: Move intel_dmc_wait_fw_load() into intel_dmc_enable_pipe() itself
> >> >     so the function is self-contained (Jani Nikula, Gustavo Sousa).
> >> >
> >> > Signed-off-by: James Xiong <james.xiong@intel.com>
> >> 
> >> +Imre
> >> 
> >> Perhaps this deserves a fixes tag?
> >
> > Since that would result in backporting the fix to -stable, it depends on
> > whether enabling the pipe DMC functionality before the firmware is
> > loaded is an actual functionality problem.
> 
> I think we depend on pipe DMC for the flip queue functionality, so I
> suspect it could be an issue.

AFAIU stable rules require knowing that a fix fixes something for a
user. I suppose one way to make this sure would be reproducing a problem
with PIPE DMC explicitly enabled early, before the firmware is loaded.

> That said, I'm not very involved in that, so I can say for sure.
> 
> --
> Gustavo Sousa
> 
> >
> >> If so, maybe it should be this one:
> >> 
> >> Fixes: 3af2ff0840be ("drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled")
> >> 
> >> The change itself looks good to me, so
> >> 
> >> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
> >> 
> >> > ---
> >> >  drivers/gpu/drm/i915/display/intel_dmc.c | 7 ++++++-
> >> >  1 file changed, 6 insertions(+), 1 deletion(-)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> > index 0df4f42ba3e3..4151eae92744 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> > @@ -786,7 +786,12 @@ void intel_dmc_enable_pipe(const struct intel_crtc_state *crtc_state)
> >> >  	enum pipe pipe = crtc->pipe;
> >> >  	enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);
> >> >  
> >> > -	if (!is_valid_dmc_id(dmc_id) || !has_dmc_id_fw(display, dmc_id))
> >> > +	if (!is_valid_dmc_id(dmc_id))
> >> > +		return;
> >> > +
> >> > +	intel_dmc_wait_fw_load(display);
> >> > +
> >> > +	if (!has_dmc_id_fw(display, dmc_id))
> >> >  		return;
> >> >  
> >> >  	if (!can_enable_pipedmc(crtc_state)) {
> >> > -- 
> >> > 2.34.1