Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com,
	chris.p.wilson@linux.intel.com, jonathan.cavitt@intel.com,
	matthew.d.roper@intel.com, nirmoy.das@intel.com
Subject: Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume
Date: Tue, 03 Oct 2023 14:48:15 +0300	[thread overview]
Message-ID: <8734ysgc5c.fsf@intel.com> (raw)
In-Reply-To: <20231002172419.1017044-3-jonathan.cavitt@intel.com>

On Mon, 02 Oct 2023, Jonathan Cavitt <jonathan.cavitt@intel.com> wrote:
> Consider multi-gt support when cancelling all tlb invalidations on
> suspend, and when submitting tlb invalidations on resume.
>
> Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Fei Yang <fei.yang@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> CC: John Harrison <John.C.Harrison@Intel.com>

I guess I'm wondering why the top level suspend hook needs to iterate
gts instead of some lower level thing. We should aim to reduce
gem/gt/display details from the top level.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/i915_driver.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index f5175103ea900..d7655a7b60eda 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1077,6 +1077,8 @@ static int i915_drm_suspend(struct drm_device *dev)
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
>  	pci_power_t opregion_target_state;
> +	struct intel_gt *gt;
> +	int i;
>  
>  	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
>  
> @@ -1094,7 +1096,8 @@ static int i915_drm_suspend(struct drm_device *dev)
>  
>  	intel_runtime_pm_disable_interrupts(dev_priv);
>  
> -	wake_up_all_tlb_invalidate(&to_gt(dev_priv)->uc.guc);
> +	for_each_gt(gt, dev_priv, i)
> +		wake_up_all_tlb_invalidate(&gt->uc.guc);
>  
>  	intel_hpd_cancel_work(dev_priv);
>  
> @@ -1267,9 +1270,11 @@ static int i915_drm_resume(struct drm_device *dev)
>  
>  	intel_gvt_resume(dev_priv);
>  
> -	if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(&to_gt(dev_priv)->uc.guc)) {
> -		intel_guc_invalidate_tlb_full(&to_gt(dev_priv)->uc.guc);
> -		intel_guc_invalidate_tlb(&to_gt(dev_priv)->uc.guc);
> +	for_each_gt(gt, dev_priv, i) {
> +		if (!INTEL_GUC_SUPPORTS_TLB_INVALIDATION(&gt->uc.guc))
> +			continue;
> +		intel_guc_invalidate_tlb_full(&gt->uc.guc);
> +		intel_guc_invalidate_tlb(&gt->uc.guc);
>  	}
>  
>  	enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);

-- 
Jani Nikula, Intel

  reply	other threads:[~2023-10-03 11:48 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-02 17:24 [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-02 17:24 ` [Intel-gfx] [PATCH v3 2/4] drm/i915: No TLB invalidation on wedged or suspended GT Jonathan Cavitt
2023-10-03 10:35   ` Tvrtko Ursulin
2023-10-03 11:50   ` Jani Nikula
2023-10-02 17:24 ` [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume Jonathan Cavitt
2023-10-03 11:48   ` Jani Nikula [this message]
2023-10-03 15:59     ` Andi Shyti
2023-10-03 18:52       ` John Harrison
2023-10-04  7:34         ` Jani Nikula
2023-10-02 17:24 ` [Intel-gfx] [PATCH v3 4/4] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck Jonathan Cavitt
2023-10-02 23:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines Patchwork
2023-10-02 23:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-03  0:01 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-03 10:28 ` [Intel-gfx] [PATCH v3 1/4] " Tvrtko Ursulin
2023-10-03 16:41   ` Andi Shyti
2023-10-03 20:29     ` John Harrison
2023-10-03 21:29       ` Andi Shyti
2023-10-04  7:54     ` Tvrtko Ursulin
2023-10-03 20:23   ` John Harrison
2023-10-04  8:12     ` Tvrtko Ursulin
2023-10-03 11:06 ` Tvrtko Ursulin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8734ysgc5c.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=andi.shyti@intel.com \
    --cc=chris.p.wilson@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=janusz.krzysztofik@intel.com \
    --cc=jonathan.cavitt@intel.com \
    --cc=matthew.d.roper@intel.com \
    --cc=nirmoy.das@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox