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* [Intel-gfx] [PATCH] drm/i915/hwmon: Enable PL1 power limit
@ 2023-02-03 15:53 Ashutosh Dixit
  2023-02-03 17:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/hwmon: Enable PL1 power limit (rev4) Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 11+ messages in thread
From: Ashutosh Dixit @ 2023-02-03 15:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel, Rodrigo Vivi

Previous documentation suggested that PL1 power limit is always
enabled. However we now find this not to be the case on some
platforms (such as ATSM). Therefore enable PL1 power limit during hwmon
initialization.

Bspec: 51864

v2: Add Bspec reference (Gwan-gyeong)
v3: Add Fixes tag

Fixes: 99f55efb79114 ("drm/i915/hwmon: Power PL1 limit and TDP setting")
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 drivers/gpu/drm/i915/i915_hwmon.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c
index 1225bc432f0d5..4683a5b96eff1 100644
--- a/drivers/gpu/drm/i915/i915_hwmon.c
+++ b/drivers/gpu/drm/i915/i915_hwmon.c
@@ -687,6 +687,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
 		for_each_gt(gt, i915, i)
 			hwm_energy(&hwmon->ddat_gt[i], &energy);
 	}
+
+	/* Enable PL1 power limit */
+	if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
+		hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
+						    PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
 }
 
 void i915_hwmon_register(struct drm_i915_private *i915)
-- 
2.38.0


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/hwmon: Enable PL1 power limit
@ 2023-02-02 16:24 Ashutosh Dixit
  0 siblings, 0 replies; 11+ messages in thread
From: Ashutosh Dixit @ 2023-02-02 16:24 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel

Previous documentation suggested that PL1 power limit is always
enabled. However we now find this not to be the case on some
platforms (such as ATSM). Therefore enable PL1 power limit during hwmon
initialization.

Bspec: 51864

v2: Add Bspec reference (Gwan-gyeong)

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 drivers/gpu/drm/i915/i915_hwmon.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c
index 1225bc432f0d5..4683a5b96eff1 100644
--- a/drivers/gpu/drm/i915/i915_hwmon.c
+++ b/drivers/gpu/drm/i915/i915_hwmon.c
@@ -687,6 +687,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
 		for_each_gt(gt, i915, i)
 			hwm_energy(&hwmon->ddat_gt[i], &energy);
 	}
+
+	/* Enable PL1 power limit */
+	if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
+		hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
+						    PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
 }
 
 void i915_hwmon_register(struct drm_i915_private *i915)
-- 
2.38.0


^ permalink raw reply related	[flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/hwmon: Enable PL1 power limit
@ 2023-02-02  2:52 Ashutosh Dixit
  2023-02-02  8:33 ` Gwan-gyeong Mun
  0 siblings, 1 reply; 11+ messages in thread
From: Ashutosh Dixit @ 2023-02-02  2:52 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel

Previous documentation suggested that PL1 power limit is always
enabled. However we now find this not to be the case on some
platforms (such as ATSM). Therefore enable PL1 power limit during hwmon
initialization.

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 drivers/gpu/drm/i915/i915_hwmon.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c
index 1225bc432f0d5..4683a5b96eff1 100644
--- a/drivers/gpu/drm/i915/i915_hwmon.c
+++ b/drivers/gpu/drm/i915/i915_hwmon.c
@@ -687,6 +687,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
 		for_each_gt(gt, i915, i)
 			hwm_energy(&hwmon->ddat_gt[i], &energy);
 	}
+
+	/* Enable PL1 power limit */
+	if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
+		hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
+						    PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
 }
 
 void i915_hwmon_register(struct drm_i915_private *i915)
-- 
2.38.0


^ permalink raw reply related	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2023-02-07 19:00 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-02-03 15:53 [Intel-gfx] [PATCH] drm/i915/hwmon: Enable PL1 power limit Ashutosh Dixit
2023-02-03 17:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/hwmon: Enable PL1 power limit (rev4) Patchwork
2023-02-03 18:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-02-05  2:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-02-07  9:32 ` [Intel-gfx] [PATCH] drm/i915/hwmon: Enable PL1 power limit Matthew Auld
2023-02-07 16:12   ` Dixit, Ashutosh
2023-02-07 17:14     ` Dixit, Ashutosh
2023-02-07 19:00       ` Matthew Auld
  -- strict thread matches above, loose matches on Subject: below --
2023-02-02 16:24 Ashutosh Dixit
2023-02-02  2:52 Ashutosh Dixit
2023-02-02  8:33 ` Gwan-gyeong Mun

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